1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * PPC64 Huge TLB Page Support for hash based MMUs (POWER4 and later)
4 *
5 * Copyright (C) 2003 David Gibson, IBM Corporation.
6 *
7 * Based on the IA-32 version:
8 * Copyright (C) 2002, Rohit Seth <rohit.seth@intel.com>
9 */
10
11 #include <linux/mm.h>
12 #include <linux/hugetlb.h>
13 #include <asm/pgtable.h>
14 #include <asm/pgalloc.h>
15 #include <asm/cacheflush.h>
16 #include <asm/machdep.h>
17
18 extern long hpte_insert_repeating(unsigned long hash, unsigned long vpn,
19 unsigned long pa, unsigned long rlags,
20 unsigned long vflags, int psize, int ssize);
21
__hash_page_huge(unsigned long ea,unsigned long access,unsigned long vsid,pte_t * ptep,unsigned long trap,unsigned long flags,int ssize,unsigned int shift,unsigned int mmu_psize)22 int __hash_page_huge(unsigned long ea, unsigned long access, unsigned long vsid,
23 pte_t *ptep, unsigned long trap, unsigned long flags,
24 int ssize, unsigned int shift, unsigned int mmu_psize)
25 {
26 unsigned long vpn;
27 unsigned long old_pte, new_pte;
28 unsigned long rflags, pa, sz;
29 long slot;
30
31 BUG_ON(shift != mmu_psize_defs[mmu_psize].shift);
32
33 /* Search the Linux page table for a match with va */
34 vpn = hpt_vpn(ea, vsid, ssize);
35
36 /* At this point, we have a pte (old_pte) which can be used to build
37 * or update an HPTE. There are 2 cases:
38 *
39 * 1. There is a valid (present) pte with no associated HPTE (this is
40 * the most common case)
41 * 2. There is a valid (present) pte with an associated HPTE. The
42 * current values of the pp bits in the HPTE prevent access
43 * because we are doing software DIRTY bit management and the
44 * page is currently not DIRTY.
45 */
46
47
48 do {
49 old_pte = pte_val(*ptep);
50 /* If PTE busy, retry the access */
51 if (unlikely(old_pte & H_PAGE_BUSY))
52 return 0;
53 /* If PTE permissions don't match, take page fault */
54 if (unlikely(!check_pte_access(access, old_pte)))
55 return 1;
56
57 /* Try to lock the PTE, add ACCESSED and DIRTY if it was
58 * a write access */
59 new_pte = old_pte | H_PAGE_BUSY | _PAGE_ACCESSED;
60 if (access & _PAGE_WRITE)
61 new_pte |= _PAGE_DIRTY;
62 } while(!pte_xchg(ptep, __pte(old_pte), __pte(new_pte)));
63
64 rflags = htab_convert_pte_flags(new_pte);
65
66 sz = ((1UL) << shift);
67 if (!cpu_has_feature(CPU_FTR_COHERENT_ICACHE))
68 /* No CPU has hugepages but lacks no execute, so we
69 * don't need to worry about that case */
70 rflags = hash_page_do_lazy_icache(rflags, __pte(old_pte), trap);
71
72 /* Check if pte already has an hpte (case 2) */
73 if (unlikely(old_pte & H_PAGE_HASHPTE)) {
74 /* There MIGHT be an HPTE for this pte */
75 unsigned long hash, slot;
76
77 hash = hpt_hash(vpn, shift, ssize);
78 if (old_pte & H_PAGE_F_SECOND)
79 hash = ~hash;
80 slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
81 slot += (old_pte & H_PAGE_F_GIX) >> H_PAGE_F_GIX_SHIFT;
82
83 if (mmu_hash_ops.hpte_updatepp(slot, rflags, vpn, mmu_psize,
84 mmu_psize, ssize, flags) == -1)
85 old_pte &= ~_PAGE_HPTEFLAGS;
86 }
87
88 if (likely(!(old_pte & H_PAGE_HASHPTE))) {
89 unsigned long hash = hpt_hash(vpn, shift, ssize);
90
91 pa = pte_pfn(__pte(old_pte)) << PAGE_SHIFT;
92
93 /* clear HPTE slot informations in new PTE */
94 new_pte = (new_pte & ~_PAGE_HPTEFLAGS) | H_PAGE_HASHPTE;
95
96 slot = hpte_insert_repeating(hash, vpn, pa, rflags, 0,
97 mmu_psize, ssize);
98
99 /*
100 * Hypervisor failure. Restore old pte and return -1
101 * similar to __hash_page_*
102 */
103 if (unlikely(slot == -2)) {
104 *ptep = __pte(old_pte);
105 hash_failure_debug(ea, access, vsid, trap, ssize,
106 mmu_psize, mmu_psize, old_pte);
107 return -1;
108 }
109
110 new_pte |= (slot << H_PAGE_F_GIX_SHIFT) &
111 (H_PAGE_F_SECOND | H_PAGE_F_GIX);
112 }
113
114 /*
115 * No need to use ldarx/stdcx here
116 */
117 *ptep = __pte(new_pte & ~H_PAGE_BUSY);
118 return 0;
119 }
120