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1 /*
2  * Routines providing a simple monitor for use on the PowerMac.
3  *
4  * Copyright (C) 1996-2005 Paul Mackerras.
5  * Copyright (C) 2001 PPC64 Team, IBM Corp
6  * Copyrignt (C) 2006 Michael Ellerman, IBM Corp
7  *
8  *      This program is free software; you can redistribute it and/or
9  *      modify it under the terms of the GNU General Public License
10  *      as published by the Free Software Foundation; either version
11  *      2 of the License, or (at your option) any later version.
12  */
13 
14 #include <linux/kernel.h>
15 #include <linux/errno.h>
16 #include <linux/sched/signal.h>
17 #include <linux/smp.h>
18 #include <linux/mm.h>
19 #include <linux/reboot.h>
20 #include <linux/delay.h>
21 #include <linux/kallsyms.h>
22 #include <linux/kmsg_dump.h>
23 #include <linux/cpumask.h>
24 #include <linux/export.h>
25 #include <linux/sysrq.h>
26 #include <linux/interrupt.h>
27 #include <linux/irq.h>
28 #include <linux/bug.h>
29 #include <linux/nmi.h>
30 #include <linux/ctype.h>
31 
32 #include <asm/debugfs.h>
33 #include <asm/ptrace.h>
34 #include <asm/smp.h>
35 #include <asm/string.h>
36 #include <asm/prom.h>
37 #include <asm/machdep.h>
38 #include <asm/xmon.h>
39 #include <asm/processor.h>
40 #include <asm/pgtable.h>
41 #include <asm/mmu.h>
42 #include <asm/mmu_context.h>
43 #include <asm/cputable.h>
44 #include <asm/rtas.h>
45 #include <asm/sstep.h>
46 #include <asm/irq_regs.h>
47 #include <asm/spu.h>
48 #include <asm/spu_priv1.h>
49 #include <asm/setjmp.h>
50 #include <asm/reg.h>
51 #include <asm/debug.h>
52 #include <asm/hw_breakpoint.h>
53 #include <asm/xive.h>
54 #include <asm/opal.h>
55 #include <asm/firmware.h>
56 #include <asm/code-patching.h>
57 
58 #ifdef CONFIG_PPC64
59 #include <asm/hvcall.h>
60 #include <asm/paca.h>
61 #endif
62 
63 #if defined(CONFIG_PPC_SPLPAR)
64 #include <asm/plpar_wrappers.h>
65 #else
plapr_set_ciabr(unsigned long ciabr)66 static inline long plapr_set_ciabr(unsigned long ciabr) {return 0; };
67 #endif
68 
69 #include "nonstdio.h"
70 #include "dis-asm.h"
71 
72 #ifdef CONFIG_SMP
73 static cpumask_t cpus_in_xmon = CPU_MASK_NONE;
74 static unsigned long xmon_taken = 1;
75 static int xmon_owner;
76 static int xmon_gate;
77 #else
78 #define xmon_owner 0
79 #endif /* CONFIG_SMP */
80 
81 #ifdef CONFIG_PPC_PSERIES
82 static int set_indicator_token = RTAS_UNKNOWN_SERVICE;
83 #endif
84 static unsigned long in_xmon __read_mostly = 0;
85 static int xmon_on = IS_ENABLED(CONFIG_XMON_DEFAULT);
86 
87 static unsigned long adrs;
88 static int size = 1;
89 #define MAX_DUMP (128 * 1024)
90 static unsigned long ndump = 64;
91 static unsigned long nidump = 16;
92 static unsigned long ncsum = 4096;
93 static int termch;
94 static char tmpstr[128];
95 static int tracing_enabled;
96 
97 static long bus_error_jmp[JMP_BUF_LEN];
98 static int catch_memory_errors;
99 static int catch_spr_faults;
100 static long *xmon_fault_jmp[NR_CPUS];
101 
102 /* Breakpoint stuff */
103 struct bpt {
104 	unsigned long	address;
105 	unsigned int	instr[2];
106 	atomic_t	ref_count;
107 	int		enabled;
108 	unsigned long	pad;
109 };
110 
111 /* Bits in bpt.enabled */
112 #define BP_CIABR	1
113 #define BP_TRAP		2
114 #define BP_DABR		4
115 
116 #define NBPTS	256
117 static struct bpt bpts[NBPTS];
118 static struct bpt dabr;
119 static struct bpt *iabr;
120 static unsigned bpinstr = 0x7fe00008;	/* trap */
121 
122 #define BP_NUM(bp)	((bp) - bpts + 1)
123 
124 /* Prototypes */
125 static int cmds(struct pt_regs *);
126 static int mread(unsigned long, void *, int);
127 static int mwrite(unsigned long, void *, int);
128 static int handle_fault(struct pt_regs *);
129 static void byterev(unsigned char *, int);
130 static void memex(void);
131 static int bsesc(void);
132 static void dump(void);
133 static void prdump(unsigned long, long);
134 static int ppc_inst_dump(unsigned long, long, int);
135 static void dump_log_buf(void);
136 
137 #ifdef CONFIG_PPC_POWERNV
138 static void dump_opal_msglog(void);
139 #else
dump_opal_msglog(void)140 static inline void dump_opal_msglog(void)
141 {
142 	printf("Machine is not running OPAL firmware.\n");
143 }
144 #endif
145 
146 static void backtrace(struct pt_regs *);
147 static void excprint(struct pt_regs *);
148 static void prregs(struct pt_regs *);
149 static void memops(int);
150 static void memlocate(void);
151 static void memzcan(void);
152 static void memdiffs(unsigned char *, unsigned char *, unsigned, unsigned);
153 int skipbl(void);
154 int scanhex(unsigned long *valp);
155 static void scannl(void);
156 static int hexdigit(int);
157 void getstring(char *, int);
158 static void flush_input(void);
159 static int inchar(void);
160 static void take_input(char *);
161 static int  read_spr(int, unsigned long *);
162 static void write_spr(int, unsigned long);
163 static void super_regs(void);
164 static void remove_bpts(void);
165 static void insert_bpts(void);
166 static void remove_cpu_bpts(void);
167 static void insert_cpu_bpts(void);
168 static struct bpt *at_breakpoint(unsigned long pc);
169 static struct bpt *in_breakpoint_table(unsigned long pc, unsigned long *offp);
170 static int  do_step(struct pt_regs *);
171 static void bpt_cmds(void);
172 static void cacheflush(void);
173 static int  cpu_cmd(void);
174 static void csum(void);
175 static void bootcmds(void);
176 static void proccall(void);
177 static void show_tasks(void);
178 void dump_segments(void);
179 static void symbol_lookup(void);
180 static void xmon_show_stack(unsigned long sp, unsigned long lr,
181 			    unsigned long pc);
182 static void xmon_print_symbol(unsigned long address, const char *mid,
183 			      const char *after);
184 static const char *getvecname(unsigned long vec);
185 
186 static int do_spu_cmd(void);
187 
188 #ifdef CONFIG_44x
189 static void dump_tlb_44x(void);
190 #endif
191 #ifdef CONFIG_PPC_BOOK3E
192 static void dump_tlb_book3e(void);
193 #endif
194 
195 #ifdef CONFIG_PPC64
196 #define REG		"%.16lx"
197 #else
198 #define REG		"%.8lx"
199 #endif
200 
201 #ifdef __LITTLE_ENDIAN__
202 #define GETWORD(v)	(((v)[3] << 24) + ((v)[2] << 16) + ((v)[1] << 8) + (v)[0])
203 #else
204 #define GETWORD(v)	(((v)[0] << 24) + ((v)[1] << 16) + ((v)[2] << 8) + (v)[3])
205 #endif
206 
207 static char *help_string = "\
208 Commands:\n\
209   b	show breakpoints\n\
210   bd	set data breakpoint\n\
211   bi	set instruction breakpoint\n\
212   bc	clear breakpoint\n"
213 #ifdef CONFIG_SMP
214   "\
215   c	print cpus stopped in xmon\n\
216   c#	try to switch to cpu number h (in hex)\n"
217 #endif
218   "\
219   C	checksum\n\
220   d	dump bytes\n\
221   d1	dump 1 byte values\n\
222   d2	dump 2 byte values\n\
223   d4	dump 4 byte values\n\
224   d8	dump 8 byte values\n\
225   di	dump instructions\n\
226   df	dump float values\n\
227   dd	dump double values\n\
228   dl    dump the kernel log buffer\n"
229 #ifdef CONFIG_PPC_POWERNV
230   "\
231   do    dump the OPAL message log\n"
232 #endif
233 #ifdef CONFIG_PPC64
234   "\
235   dp[#]	dump paca for current cpu, or cpu #\n\
236   dpa	dump paca for all possible cpus\n"
237 #endif
238   "\
239   dr	dump stream of raw bytes\n\
240   dt	dump the tracing buffers (uses printk)\n\
241   dtc	dump the tracing buffers for current CPU (uses printk)\n\
242 "
243 #ifdef CONFIG_PPC_POWERNV
244 "  dx#   dump xive on CPU #\n\
245   dxi#  dump xive irq state #\n\
246   dxa   dump xive on all CPUs\n"
247 #endif
248 "  e	print exception information\n\
249   f	flush cache\n\
250   la	lookup symbol+offset of specified address\n\
251   ls	lookup address of specified symbol\n\
252   m	examine/change memory\n\
253   mm	move a block of memory\n\
254   ms	set a block of memory\n\
255   md	compare two blocks of memory\n\
256   ml	locate a block of memory\n\
257   mz	zero a block of memory\n\
258   mi	show information about memory allocation\n\
259   p 	call a procedure\n\
260   P 	list processes/tasks\n\
261   r	print registers\n\
262   s	single step\n"
263 #ifdef CONFIG_SPU_BASE
264 "  ss	stop execution on all spus\n\
265   sr	restore execution on stopped spus\n\
266   sf  #	dump spu fields for spu # (in hex)\n\
267   sd  #	dump spu local store for spu # (in hex)\n\
268   sdi #	disassemble spu local store for spu # (in hex)\n"
269 #endif
270 "  S	print special registers\n\
271   Sa    print all SPRs\n\
272   Sr #	read SPR #\n\
273   Sw #v write v to SPR #\n\
274   t	print backtrace\n\
275   x	exit monitor and recover\n\
276   X	exit monitor and don't recover\n"
277 #if defined(CONFIG_PPC64) && !defined(CONFIG_PPC_BOOK3E)
278 "  u	dump segment table or SLB\n"
279 #elif defined(CONFIG_PPC_STD_MMU_32)
280 "  u	dump segment registers\n"
281 #elif defined(CONFIG_44x) || defined(CONFIG_PPC_BOOK3E)
282 "  u	dump TLB\n"
283 #endif
284 "  ?	help\n"
285 "  # n	limit output to n lines per page (for dp, dpa, dl)\n"
286 "  zr	reboot\n\
287   zh	halt\n"
288 ;
289 
290 static struct pt_regs *xmon_regs;
291 
sync(void)292 static inline void sync(void)
293 {
294 	asm volatile("sync; isync");
295 }
296 
store_inst(void * p)297 static inline void store_inst(void *p)
298 {
299 	asm volatile ("dcbst 0,%0; sync; icbi 0,%0; isync" : : "r" (p));
300 }
301 
cflush(void * p)302 static inline void cflush(void *p)
303 {
304 	asm volatile ("dcbf 0,%0; icbi 0,%0" : : "r" (p));
305 }
306 
cinval(void * p)307 static inline void cinval(void *p)
308 {
309 	asm volatile ("dcbi 0,%0; icbi 0,%0" : : "r" (p));
310 }
311 
312 /**
313  * write_ciabr() - write the CIABR SPR
314  * @ciabr:	The value to write.
315  *
316  * This function writes a value to the CIARB register either directly
317  * through mtspr instruction if the kernel is in HV privilege mode or
318  * call a hypervisor function to achieve the same in case the kernel
319  * is in supervisor privilege mode.
320  */
write_ciabr(unsigned long ciabr)321 static void write_ciabr(unsigned long ciabr)
322 {
323 	if (!cpu_has_feature(CPU_FTR_ARCH_207S))
324 		return;
325 
326 	if (cpu_has_feature(CPU_FTR_HVMODE)) {
327 		mtspr(SPRN_CIABR, ciabr);
328 		return;
329 	}
330 	plapr_set_ciabr(ciabr);
331 }
332 
333 /**
334  * set_ciabr() - set the CIABR
335  * @addr:	The value to set.
336  *
337  * This function sets the correct privilege value into the the HW
338  * breakpoint address before writing it up in the CIABR register.
339  */
set_ciabr(unsigned long addr)340 static void set_ciabr(unsigned long addr)
341 {
342 	addr &= ~CIABR_PRIV;
343 
344 	if (cpu_has_feature(CPU_FTR_HVMODE))
345 		addr |= CIABR_PRIV_HYPER;
346 	else
347 		addr |= CIABR_PRIV_SUPER;
348 	write_ciabr(addr);
349 }
350 
351 /*
352  * Disable surveillance (the service processor watchdog function)
353  * while we are in xmon.
354  * XXX we should re-enable it when we leave. :)
355  */
356 #define SURVEILLANCE_TOKEN	9000
357 
disable_surveillance(void)358 static inline void disable_surveillance(void)
359 {
360 #ifdef CONFIG_PPC_PSERIES
361 	/* Since this can't be a module, args should end up below 4GB. */
362 	static struct rtas_args args;
363 
364 	/*
365 	 * At this point we have got all the cpus we can into
366 	 * xmon, so there is hopefully no other cpu calling RTAS
367 	 * at the moment, even though we don't take rtas.lock.
368 	 * If we did try to take rtas.lock there would be a
369 	 * real possibility of deadlock.
370 	 */
371 	if (set_indicator_token == RTAS_UNKNOWN_SERVICE)
372 		return;
373 
374 	rtas_call_unlocked(&args, set_indicator_token, 3, 1, NULL,
375 			   SURVEILLANCE_TOKEN, 0, 0);
376 
377 #endif /* CONFIG_PPC_PSERIES */
378 }
379 
380 #ifdef CONFIG_SMP
381 static int xmon_speaker;
382 
get_output_lock(void)383 static void get_output_lock(void)
384 {
385 	int me = smp_processor_id() + 0x100;
386 	int last_speaker = 0, prev;
387 	long timeout;
388 
389 	if (xmon_speaker == me)
390 		return;
391 
392 	for (;;) {
393 		last_speaker = cmpxchg(&xmon_speaker, 0, me);
394 		if (last_speaker == 0)
395 			return;
396 
397 		/*
398 		 * Wait a full second for the lock, we might be on a slow
399 		 * console, but check every 100us.
400 		 */
401 		timeout = 10000;
402 		while (xmon_speaker == last_speaker) {
403 			if (--timeout > 0) {
404 				udelay(100);
405 				continue;
406 			}
407 
408 			/* hostile takeover */
409 			prev = cmpxchg(&xmon_speaker, last_speaker, me);
410 			if (prev == last_speaker)
411 				return;
412 			break;
413 		}
414 	}
415 }
416 
release_output_lock(void)417 static void release_output_lock(void)
418 {
419 	xmon_speaker = 0;
420 }
421 
cpus_are_in_xmon(void)422 int cpus_are_in_xmon(void)
423 {
424 	return !cpumask_empty(&cpus_in_xmon);
425 }
426 
wait_for_other_cpus(int ncpus)427 static bool wait_for_other_cpus(int ncpus)
428 {
429 	unsigned long timeout;
430 
431 	/* We wait for 2s, which is a metric "little while" */
432 	for (timeout = 20000; timeout != 0; --timeout) {
433 		if (cpumask_weight(&cpus_in_xmon) >= ncpus)
434 			return true;
435 		udelay(100);
436 		barrier();
437 	}
438 
439 	return false;
440 }
441 #endif /* CONFIG_SMP */
442 
unrecoverable_excp(struct pt_regs * regs)443 static inline int unrecoverable_excp(struct pt_regs *regs)
444 {
445 #if defined(CONFIG_4xx) || defined(CONFIG_PPC_BOOK3E)
446 	/* We have no MSR_RI bit on 4xx or Book3e, so we simply return false */
447 	return 0;
448 #else
449 	return ((regs->msr & MSR_RI) == 0);
450 #endif
451 }
452 
xmon_core(struct pt_regs * regs,int fromipi)453 static int xmon_core(struct pt_regs *regs, int fromipi)
454 {
455 	int cmd = 0;
456 	struct bpt *bp;
457 	long recurse_jmp[JMP_BUF_LEN];
458 	unsigned long offset;
459 	unsigned long flags;
460 #ifdef CONFIG_SMP
461 	int cpu;
462 	int secondary;
463 #endif
464 
465 	local_irq_save(flags);
466 	hard_irq_disable();
467 
468 	if (!fromipi) {
469 		tracing_enabled = tracing_is_on();
470 		tracing_off();
471 	}
472 
473 	bp = in_breakpoint_table(regs->nip, &offset);
474 	if (bp != NULL) {
475 		regs->nip = bp->address + offset;
476 		atomic_dec(&bp->ref_count);
477 	}
478 
479 	remove_cpu_bpts();
480 
481 #ifdef CONFIG_SMP
482 	cpu = smp_processor_id();
483 	if (cpumask_test_cpu(cpu, &cpus_in_xmon)) {
484 		/*
485 		 * We catch SPR read/write faults here because the 0x700, 0xf60
486 		 * etc. handlers don't call debugger_fault_handler().
487 		 */
488 		if (catch_spr_faults)
489 			longjmp(bus_error_jmp, 1);
490 		get_output_lock();
491 		excprint(regs);
492 		printf("cpu 0x%x: Exception %lx %s in xmon, "
493 		       "returning to main loop\n",
494 		       cpu, regs->trap, getvecname(TRAP(regs)));
495 		release_output_lock();
496 		longjmp(xmon_fault_jmp[cpu], 1);
497 	}
498 
499 	if (setjmp(recurse_jmp) != 0) {
500 		if (!in_xmon || !xmon_gate) {
501 			get_output_lock();
502 			printf("xmon: WARNING: bad recursive fault "
503 			       "on cpu 0x%x\n", cpu);
504 			release_output_lock();
505 			goto waiting;
506 		}
507 		secondary = !(xmon_taken && cpu == xmon_owner);
508 		goto cmdloop;
509 	}
510 
511 	xmon_fault_jmp[cpu] = recurse_jmp;
512 
513 	bp = NULL;
514 	if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT))
515 		bp = at_breakpoint(regs->nip);
516 	if (bp || unrecoverable_excp(regs))
517 		fromipi = 0;
518 
519 	if (!fromipi) {
520 		get_output_lock();
521 		excprint(regs);
522 		if (bp) {
523 			printf("cpu 0x%x stopped at breakpoint 0x%lx (",
524 			       cpu, BP_NUM(bp));
525 			xmon_print_symbol(regs->nip, " ", ")\n");
526 		}
527 		if (unrecoverable_excp(regs))
528 			printf("WARNING: exception is not recoverable, "
529 			       "can't continue\n");
530 		release_output_lock();
531 	}
532 
533 	cpumask_set_cpu(cpu, &cpus_in_xmon);
534 
535  waiting:
536 	secondary = 1;
537 	spin_begin();
538 	while (secondary && !xmon_gate) {
539 		if (in_xmon == 0) {
540 			if (fromipi) {
541 				spin_end();
542 				goto leave;
543 			}
544 			secondary = test_and_set_bit(0, &in_xmon);
545 		}
546 		spin_cpu_relax();
547 		touch_nmi_watchdog();
548 	}
549 	spin_end();
550 
551 	if (!secondary && !xmon_gate) {
552 		/* we are the first cpu to come in */
553 		/* interrupt other cpu(s) */
554 		int ncpus = num_online_cpus();
555 
556 		xmon_owner = cpu;
557 		mb();
558 		if (ncpus > 1) {
559 			/*
560 			 * A system reset (trap == 0x100) can be triggered on
561 			 * all CPUs, so when we come in via 0x100 try waiting
562 			 * for the other CPUs to come in before we send the
563 			 * debugger break (IPI). This is similar to
564 			 * crash_kexec_secondary().
565 			 */
566 			if (TRAP(regs) != 0x100 || !wait_for_other_cpus(ncpus))
567 				smp_send_debugger_break();
568 
569 			wait_for_other_cpus(ncpus);
570 		}
571 		remove_bpts();
572 		disable_surveillance();
573 		/* for breakpoint or single step, print the current instr. */
574 		if (bp || TRAP(regs) == 0xd00)
575 			ppc_inst_dump(regs->nip, 1, 0);
576 		printf("enter ? for help\n");
577 		mb();
578 		xmon_gate = 1;
579 		barrier();
580 		touch_nmi_watchdog();
581 	}
582 
583  cmdloop:
584 	while (in_xmon) {
585 		if (secondary) {
586 			spin_begin();
587 			if (cpu == xmon_owner) {
588 				if (!test_and_set_bit(0, &xmon_taken)) {
589 					secondary = 0;
590 					spin_end();
591 					continue;
592 				}
593 				/* missed it */
594 				while (cpu == xmon_owner)
595 					spin_cpu_relax();
596 			}
597 			spin_cpu_relax();
598 			touch_nmi_watchdog();
599 		} else {
600 			cmd = cmds(regs);
601 			if (cmd != 0) {
602 				/* exiting xmon */
603 				insert_bpts();
604 				xmon_gate = 0;
605 				wmb();
606 				in_xmon = 0;
607 				break;
608 			}
609 			/* have switched to some other cpu */
610 			secondary = 1;
611 		}
612 	}
613  leave:
614 	cpumask_clear_cpu(cpu, &cpus_in_xmon);
615 	xmon_fault_jmp[cpu] = NULL;
616 #else
617 	/* UP is simple... */
618 	if (in_xmon) {
619 		printf("Exception %lx %s in xmon, returning to main loop\n",
620 		       regs->trap, getvecname(TRAP(regs)));
621 		longjmp(xmon_fault_jmp[0], 1);
622 	}
623 	if (setjmp(recurse_jmp) == 0) {
624 		xmon_fault_jmp[0] = recurse_jmp;
625 		in_xmon = 1;
626 
627 		excprint(regs);
628 		bp = at_breakpoint(regs->nip);
629 		if (bp) {
630 			printf("Stopped at breakpoint %lx (", BP_NUM(bp));
631 			xmon_print_symbol(regs->nip, " ", ")\n");
632 		}
633 		if (unrecoverable_excp(regs))
634 			printf("WARNING: exception is not recoverable, "
635 			       "can't continue\n");
636 		remove_bpts();
637 		disable_surveillance();
638 		/* for breakpoint or single step, print the current instr. */
639 		if (bp || TRAP(regs) == 0xd00)
640 			ppc_inst_dump(regs->nip, 1, 0);
641 		printf("enter ? for help\n");
642 	}
643 
644 	cmd = cmds(regs);
645 
646 	insert_bpts();
647 	in_xmon = 0;
648 #endif
649 
650 #ifdef CONFIG_BOOKE
651 	if (regs->msr & MSR_DE) {
652 		bp = at_breakpoint(regs->nip);
653 		if (bp != NULL) {
654 			regs->nip = (unsigned long) &bp->instr[0];
655 			atomic_inc(&bp->ref_count);
656 		}
657 	}
658 #else
659 	if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) {
660 		bp = at_breakpoint(regs->nip);
661 		if (bp != NULL) {
662 			int stepped = emulate_step(regs, bp->instr[0]);
663 			if (stepped == 0) {
664 				regs->nip = (unsigned long) &bp->instr[0];
665 				atomic_inc(&bp->ref_count);
666 			} else if (stepped < 0) {
667 				printf("Couldn't single-step %s instruction\n",
668 				    (IS_RFID(bp->instr[0])? "rfid": "mtmsrd"));
669 			}
670 		}
671 	}
672 #endif
673 	insert_cpu_bpts();
674 
675 	touch_nmi_watchdog();
676 	local_irq_restore(flags);
677 
678 	return cmd != 'X' && cmd != EOF;
679 }
680 
xmon(struct pt_regs * excp)681 int xmon(struct pt_regs *excp)
682 {
683 	struct pt_regs regs;
684 
685 	if (excp == NULL) {
686 		ppc_save_regs(&regs);
687 		excp = &regs;
688 	}
689 
690 	return xmon_core(excp, 0);
691 }
692 EXPORT_SYMBOL(xmon);
693 
xmon_irq(int irq,void * d)694 irqreturn_t xmon_irq(int irq, void *d)
695 {
696 	unsigned long flags;
697 	local_irq_save(flags);
698 	printf("Keyboard interrupt\n");
699 	xmon(get_irq_regs());
700 	local_irq_restore(flags);
701 	return IRQ_HANDLED;
702 }
703 
xmon_bpt(struct pt_regs * regs)704 static int xmon_bpt(struct pt_regs *regs)
705 {
706 	struct bpt *bp;
707 	unsigned long offset;
708 
709 	if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT))
710 		return 0;
711 
712 	/* Are we at the trap at bp->instr[1] for some bp? */
713 	bp = in_breakpoint_table(regs->nip, &offset);
714 	if (bp != NULL && offset == 4) {
715 		regs->nip = bp->address + 4;
716 		atomic_dec(&bp->ref_count);
717 		return 1;
718 	}
719 
720 	/* Are we at a breakpoint? */
721 	bp = at_breakpoint(regs->nip);
722 	if (!bp)
723 		return 0;
724 
725 	xmon_core(regs, 0);
726 
727 	return 1;
728 }
729 
xmon_sstep(struct pt_regs * regs)730 static int xmon_sstep(struct pt_regs *regs)
731 {
732 	if (user_mode(regs))
733 		return 0;
734 	xmon_core(regs, 0);
735 	return 1;
736 }
737 
xmon_break_match(struct pt_regs * regs)738 static int xmon_break_match(struct pt_regs *regs)
739 {
740 	if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT))
741 		return 0;
742 	if (dabr.enabled == 0)
743 		return 0;
744 	xmon_core(regs, 0);
745 	return 1;
746 }
747 
xmon_iabr_match(struct pt_regs * regs)748 static int xmon_iabr_match(struct pt_regs *regs)
749 {
750 	if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT))
751 		return 0;
752 	if (iabr == NULL)
753 		return 0;
754 	xmon_core(regs, 0);
755 	return 1;
756 }
757 
xmon_ipi(struct pt_regs * regs)758 static int xmon_ipi(struct pt_regs *regs)
759 {
760 #ifdef CONFIG_SMP
761 	if (in_xmon && !cpumask_test_cpu(smp_processor_id(), &cpus_in_xmon))
762 		xmon_core(regs, 1);
763 #endif
764 	return 0;
765 }
766 
xmon_fault_handler(struct pt_regs * regs)767 static int xmon_fault_handler(struct pt_regs *regs)
768 {
769 	struct bpt *bp;
770 	unsigned long offset;
771 
772 	if (in_xmon && catch_memory_errors)
773 		handle_fault(regs);	/* doesn't return */
774 
775 	if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) {
776 		bp = in_breakpoint_table(regs->nip, &offset);
777 		if (bp != NULL) {
778 			regs->nip = bp->address + offset;
779 			atomic_dec(&bp->ref_count);
780 		}
781 	}
782 
783 	return 0;
784 }
785 
at_breakpoint(unsigned long pc)786 static struct bpt *at_breakpoint(unsigned long pc)
787 {
788 	int i;
789 	struct bpt *bp;
790 
791 	bp = bpts;
792 	for (i = 0; i < NBPTS; ++i, ++bp)
793 		if (bp->enabled && pc == bp->address)
794 			return bp;
795 	return NULL;
796 }
797 
in_breakpoint_table(unsigned long nip,unsigned long * offp)798 static struct bpt *in_breakpoint_table(unsigned long nip, unsigned long *offp)
799 {
800 	unsigned long off;
801 
802 	off = nip - (unsigned long) bpts;
803 	if (off >= sizeof(bpts))
804 		return NULL;
805 	off %= sizeof(struct bpt);
806 	if (off != offsetof(struct bpt, instr[0])
807 	    && off != offsetof(struct bpt, instr[1]))
808 		return NULL;
809 	*offp = off - offsetof(struct bpt, instr[0]);
810 	return (struct bpt *) (nip - off);
811 }
812 
new_breakpoint(unsigned long a)813 static struct bpt *new_breakpoint(unsigned long a)
814 {
815 	struct bpt *bp;
816 
817 	a &= ~3UL;
818 	bp = at_breakpoint(a);
819 	if (bp)
820 		return bp;
821 
822 	for (bp = bpts; bp < &bpts[NBPTS]; ++bp) {
823 		if (!bp->enabled && atomic_read(&bp->ref_count) == 0) {
824 			bp->address = a;
825 			bp->instr[1] = bpinstr;
826 			store_inst(&bp->instr[1]);
827 			return bp;
828 		}
829 	}
830 
831 	printf("Sorry, no free breakpoints.  Please clear one first.\n");
832 	return NULL;
833 }
834 
insert_bpts(void)835 static void insert_bpts(void)
836 {
837 	int i;
838 	struct bpt *bp;
839 
840 	bp = bpts;
841 	for (i = 0; i < NBPTS; ++i, ++bp) {
842 		if ((bp->enabled & (BP_TRAP|BP_CIABR)) == 0)
843 			continue;
844 		if (mread(bp->address, &bp->instr[0], 4) != 4) {
845 			printf("Couldn't read instruction at %lx, "
846 			       "disabling breakpoint there\n", bp->address);
847 			bp->enabled = 0;
848 			continue;
849 		}
850 		if (IS_MTMSRD(bp->instr[0]) || IS_RFID(bp->instr[0])) {
851 			printf("Breakpoint at %lx is on an mtmsrd or rfid "
852 			       "instruction, disabling it\n", bp->address);
853 			bp->enabled = 0;
854 			continue;
855 		}
856 		store_inst(&bp->instr[0]);
857 		if (bp->enabled & BP_CIABR)
858 			continue;
859 		if (patch_instruction((unsigned int *)bp->address,
860 							bpinstr) != 0) {
861 			printf("Couldn't write instruction at %lx, "
862 			       "disabling breakpoint there\n", bp->address);
863 			bp->enabled &= ~BP_TRAP;
864 			continue;
865 		}
866 		store_inst((void *)bp->address);
867 	}
868 }
869 
insert_cpu_bpts(void)870 static void insert_cpu_bpts(void)
871 {
872 	struct arch_hw_breakpoint brk;
873 
874 	if (dabr.enabled) {
875 		brk.address = dabr.address;
876 		brk.type = (dabr.enabled & HW_BRK_TYPE_DABR) | HW_BRK_TYPE_PRIV_ALL;
877 		brk.len = 8;
878 		__set_breakpoint(&brk);
879 	}
880 
881 	if (iabr)
882 		set_ciabr(iabr->address);
883 }
884 
remove_bpts(void)885 static void remove_bpts(void)
886 {
887 	int i;
888 	struct bpt *bp;
889 	unsigned instr;
890 
891 	bp = bpts;
892 	for (i = 0; i < NBPTS; ++i, ++bp) {
893 		if ((bp->enabled & (BP_TRAP|BP_CIABR)) != BP_TRAP)
894 			continue;
895 		if (mread(bp->address, &instr, 4) == 4
896 		    && instr == bpinstr
897 		    && patch_instruction(
898 			(unsigned int *)bp->address, bp->instr[0]) != 0)
899 			printf("Couldn't remove breakpoint at %lx\n",
900 			       bp->address);
901 		else
902 			store_inst((void *)bp->address);
903 	}
904 }
905 
remove_cpu_bpts(void)906 static void remove_cpu_bpts(void)
907 {
908 	hw_breakpoint_disable();
909 	write_ciabr(0);
910 }
911 
set_lpp_cmd(void)912 static void set_lpp_cmd(void)
913 {
914 	unsigned long lpp;
915 
916 	if (!scanhex(&lpp)) {
917 		printf("Invalid number.\n");
918 		lpp = 0;
919 	}
920 	xmon_set_pagination_lpp(lpp);
921 }
922 /* Command interpreting routine */
923 static char *last_cmd;
924 
925 static int
cmds(struct pt_regs * excp)926 cmds(struct pt_regs *excp)
927 {
928 	int cmd = 0;
929 
930 	last_cmd = NULL;
931 	xmon_regs = excp;
932 
933 	xmon_show_stack(excp->gpr[1], excp->link, excp->nip);
934 
935 	for(;;) {
936 #ifdef CONFIG_SMP
937 		printf("%x:", smp_processor_id());
938 #endif /* CONFIG_SMP */
939 		printf("mon> ");
940 		flush_input();
941 		termch = 0;
942 		cmd = skipbl();
943 		if( cmd == '\n' ) {
944 			if (last_cmd == NULL)
945 				continue;
946 			take_input(last_cmd);
947 			last_cmd = NULL;
948 			cmd = inchar();
949 		}
950 		switch (cmd) {
951 		case 'm':
952 			cmd = inchar();
953 			switch (cmd) {
954 			case 'm':
955 			case 's':
956 			case 'd':
957 				memops(cmd);
958 				break;
959 			case 'l':
960 				memlocate();
961 				break;
962 			case 'z':
963 				memzcan();
964 				break;
965 			case 'i':
966 				show_mem(0, NULL);
967 				break;
968 			default:
969 				termch = cmd;
970 				memex();
971 			}
972 			break;
973 		case 'd':
974 			dump();
975 			break;
976 		case 'l':
977 			symbol_lookup();
978 			break;
979 		case 'r':
980 			prregs(excp);	/* print regs */
981 			break;
982 		case 'e':
983 			excprint(excp);
984 			break;
985 		case 'S':
986 			super_regs();
987 			break;
988 		case 't':
989 			backtrace(excp);
990 			break;
991 		case 'f':
992 			cacheflush();
993 			break;
994 		case 's':
995 			if (do_spu_cmd() == 0)
996 				break;
997 			if (do_step(excp))
998 				return cmd;
999 			break;
1000 		case 'x':
1001 		case 'X':
1002 			if (tracing_enabled)
1003 				tracing_on();
1004 			return cmd;
1005 		case EOF:
1006 			printf(" <no input ...>\n");
1007 			mdelay(2000);
1008 			return cmd;
1009 		case '?':
1010 			xmon_puts(help_string);
1011 			break;
1012 		case '#':
1013 			set_lpp_cmd();
1014 			break;
1015 		case 'b':
1016 			bpt_cmds();
1017 			break;
1018 		case 'C':
1019 			csum();
1020 			break;
1021 		case 'c':
1022 			if (cpu_cmd())
1023 				return 0;
1024 			break;
1025 		case 'z':
1026 			bootcmds();
1027 			break;
1028 		case 'p':
1029 			proccall();
1030 			break;
1031 		case 'P':
1032 			show_tasks();
1033 			break;
1034 #ifdef CONFIG_PPC_STD_MMU
1035 		case 'u':
1036 			dump_segments();
1037 			break;
1038 #elif defined(CONFIG_44x)
1039 		case 'u':
1040 			dump_tlb_44x();
1041 			break;
1042 #elif defined(CONFIG_PPC_BOOK3E)
1043 		case 'u':
1044 			dump_tlb_book3e();
1045 			break;
1046 #endif
1047 		default:
1048 			printf("Unrecognized command: ");
1049 			do {
1050 				if (' ' < cmd && cmd <= '~')
1051 					putchar(cmd);
1052 				else
1053 					printf("\\x%x", cmd);
1054 				cmd = inchar();
1055 			} while (cmd != '\n');
1056 			printf(" (type ? for help)\n");
1057 			break;
1058 		}
1059 	}
1060 }
1061 
1062 #ifdef CONFIG_BOOKE
do_step(struct pt_regs * regs)1063 static int do_step(struct pt_regs *regs)
1064 {
1065 	regs->msr |= MSR_DE;
1066 	mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) | DBCR0_IC | DBCR0_IDM);
1067 	return 1;
1068 }
1069 #else
1070 /*
1071  * Step a single instruction.
1072  * Some instructions we emulate, others we execute with MSR_SE set.
1073  */
do_step(struct pt_regs * regs)1074 static int do_step(struct pt_regs *regs)
1075 {
1076 	unsigned int instr;
1077 	int stepped;
1078 
1079 	/* check we are in 64-bit kernel mode, translation enabled */
1080 	if ((regs->msr & (MSR_64BIT|MSR_PR|MSR_IR)) == (MSR_64BIT|MSR_IR)) {
1081 		if (mread(regs->nip, &instr, 4) == 4) {
1082 			stepped = emulate_step(regs, instr);
1083 			if (stepped < 0) {
1084 				printf("Couldn't single-step %s instruction\n",
1085 				       (IS_RFID(instr)? "rfid": "mtmsrd"));
1086 				return 0;
1087 			}
1088 			if (stepped > 0) {
1089 				regs->trap = 0xd00 | (regs->trap & 1);
1090 				printf("stepped to ");
1091 				xmon_print_symbol(regs->nip, " ", "\n");
1092 				ppc_inst_dump(regs->nip, 1, 0);
1093 				return 0;
1094 			}
1095 		}
1096 	}
1097 	regs->msr |= MSR_SE;
1098 	return 1;
1099 }
1100 #endif
1101 
bootcmds(void)1102 static void bootcmds(void)
1103 {
1104 	int cmd;
1105 
1106 	cmd = inchar();
1107 	if (cmd == 'r')
1108 		ppc_md.restart(NULL);
1109 	else if (cmd == 'h')
1110 		ppc_md.halt();
1111 	else if (cmd == 'p')
1112 		if (pm_power_off)
1113 			pm_power_off();
1114 }
1115 
cpu_cmd(void)1116 static int cpu_cmd(void)
1117 {
1118 #ifdef CONFIG_SMP
1119 	unsigned long cpu, first_cpu, last_cpu;
1120 	int timeout;
1121 
1122 	if (!scanhex(&cpu)) {
1123 		/* print cpus waiting or in xmon */
1124 		printf("cpus stopped:");
1125 		last_cpu = first_cpu = NR_CPUS;
1126 		for_each_possible_cpu(cpu) {
1127 			if (cpumask_test_cpu(cpu, &cpus_in_xmon)) {
1128 				if (cpu == last_cpu + 1) {
1129 					last_cpu = cpu;
1130 				} else {
1131 					if (last_cpu != first_cpu)
1132 						printf("-0x%lx", last_cpu);
1133 					last_cpu = first_cpu = cpu;
1134 					printf(" 0x%lx", cpu);
1135 				}
1136 			}
1137 		}
1138 		if (last_cpu != first_cpu)
1139 			printf("-0x%lx", last_cpu);
1140 		printf("\n");
1141 		return 0;
1142 	}
1143 	/* try to switch to cpu specified */
1144 	if (!cpumask_test_cpu(cpu, &cpus_in_xmon)) {
1145 		printf("cpu 0x%x isn't in xmon\n", cpu);
1146 		return 0;
1147 	}
1148 	xmon_taken = 0;
1149 	mb();
1150 	xmon_owner = cpu;
1151 	timeout = 10000000;
1152 	while (!xmon_taken) {
1153 		if (--timeout == 0) {
1154 			if (test_and_set_bit(0, &xmon_taken))
1155 				break;
1156 			/* take control back */
1157 			mb();
1158 			xmon_owner = smp_processor_id();
1159 			printf("cpu 0x%x didn't take control\n", cpu);
1160 			return 0;
1161 		}
1162 		barrier();
1163 	}
1164 	return 1;
1165 #else
1166 	return 0;
1167 #endif /* CONFIG_SMP */
1168 }
1169 
1170 static unsigned short fcstab[256] = {
1171 	0x0000, 0x1189, 0x2312, 0x329b, 0x4624, 0x57ad, 0x6536, 0x74bf,
1172 	0x8c48, 0x9dc1, 0xaf5a, 0xbed3, 0xca6c, 0xdbe5, 0xe97e, 0xf8f7,
1173 	0x1081, 0x0108, 0x3393, 0x221a, 0x56a5, 0x472c, 0x75b7, 0x643e,
1174 	0x9cc9, 0x8d40, 0xbfdb, 0xae52, 0xdaed, 0xcb64, 0xf9ff, 0xe876,
1175 	0x2102, 0x308b, 0x0210, 0x1399, 0x6726, 0x76af, 0x4434, 0x55bd,
1176 	0xad4a, 0xbcc3, 0x8e58, 0x9fd1, 0xeb6e, 0xfae7, 0xc87c, 0xd9f5,
1177 	0x3183, 0x200a, 0x1291, 0x0318, 0x77a7, 0x662e, 0x54b5, 0x453c,
1178 	0xbdcb, 0xac42, 0x9ed9, 0x8f50, 0xfbef, 0xea66, 0xd8fd, 0xc974,
1179 	0x4204, 0x538d, 0x6116, 0x709f, 0x0420, 0x15a9, 0x2732, 0x36bb,
1180 	0xce4c, 0xdfc5, 0xed5e, 0xfcd7, 0x8868, 0x99e1, 0xab7a, 0xbaf3,
1181 	0x5285, 0x430c, 0x7197, 0x601e, 0x14a1, 0x0528, 0x37b3, 0x263a,
1182 	0xdecd, 0xcf44, 0xfddf, 0xec56, 0x98e9, 0x8960, 0xbbfb, 0xaa72,
1183 	0x6306, 0x728f, 0x4014, 0x519d, 0x2522, 0x34ab, 0x0630, 0x17b9,
1184 	0xef4e, 0xfec7, 0xcc5c, 0xddd5, 0xa96a, 0xb8e3, 0x8a78, 0x9bf1,
1185 	0x7387, 0x620e, 0x5095, 0x411c, 0x35a3, 0x242a, 0x16b1, 0x0738,
1186 	0xffcf, 0xee46, 0xdcdd, 0xcd54, 0xb9eb, 0xa862, 0x9af9, 0x8b70,
1187 	0x8408, 0x9581, 0xa71a, 0xb693, 0xc22c, 0xd3a5, 0xe13e, 0xf0b7,
1188 	0x0840, 0x19c9, 0x2b52, 0x3adb, 0x4e64, 0x5fed, 0x6d76, 0x7cff,
1189 	0x9489, 0x8500, 0xb79b, 0xa612, 0xd2ad, 0xc324, 0xf1bf, 0xe036,
1190 	0x18c1, 0x0948, 0x3bd3, 0x2a5a, 0x5ee5, 0x4f6c, 0x7df7, 0x6c7e,
1191 	0xa50a, 0xb483, 0x8618, 0x9791, 0xe32e, 0xf2a7, 0xc03c, 0xd1b5,
1192 	0x2942, 0x38cb, 0x0a50, 0x1bd9, 0x6f66, 0x7eef, 0x4c74, 0x5dfd,
1193 	0xb58b, 0xa402, 0x9699, 0x8710, 0xf3af, 0xe226, 0xd0bd, 0xc134,
1194 	0x39c3, 0x284a, 0x1ad1, 0x0b58, 0x7fe7, 0x6e6e, 0x5cf5, 0x4d7c,
1195 	0xc60c, 0xd785, 0xe51e, 0xf497, 0x8028, 0x91a1, 0xa33a, 0xb2b3,
1196 	0x4a44, 0x5bcd, 0x6956, 0x78df, 0x0c60, 0x1de9, 0x2f72, 0x3efb,
1197 	0xd68d, 0xc704, 0xf59f, 0xe416, 0x90a9, 0x8120, 0xb3bb, 0xa232,
1198 	0x5ac5, 0x4b4c, 0x79d7, 0x685e, 0x1ce1, 0x0d68, 0x3ff3, 0x2e7a,
1199 	0xe70e, 0xf687, 0xc41c, 0xd595, 0xa12a, 0xb0a3, 0x8238, 0x93b1,
1200 	0x6b46, 0x7acf, 0x4854, 0x59dd, 0x2d62, 0x3ceb, 0x0e70, 0x1ff9,
1201 	0xf78f, 0xe606, 0xd49d, 0xc514, 0xb1ab, 0xa022, 0x92b9, 0x8330,
1202 	0x7bc7, 0x6a4e, 0x58d5, 0x495c, 0x3de3, 0x2c6a, 0x1ef1, 0x0f78
1203 };
1204 
1205 #define FCS(fcs, c)	(((fcs) >> 8) ^ fcstab[((fcs) ^ (c)) & 0xff])
1206 
1207 static void
csum(void)1208 csum(void)
1209 {
1210 	unsigned int i;
1211 	unsigned short fcs;
1212 	unsigned char v;
1213 
1214 	if (!scanhex(&adrs))
1215 		return;
1216 	if (!scanhex(&ncsum))
1217 		return;
1218 	fcs = 0xffff;
1219 	for (i = 0; i < ncsum; ++i) {
1220 		if (mread(adrs+i, &v, 1) == 0) {
1221 			printf("csum stopped at "REG"\n", adrs+i);
1222 			break;
1223 		}
1224 		fcs = FCS(fcs, v);
1225 	}
1226 	printf("%x\n", fcs);
1227 }
1228 
1229 /*
1230  * Check if this is a suitable place to put a breakpoint.
1231  */
check_bp_loc(unsigned long addr)1232 static long check_bp_loc(unsigned long addr)
1233 {
1234 	unsigned int instr;
1235 
1236 	addr &= ~3;
1237 	if (!is_kernel_addr(addr)) {
1238 		printf("Breakpoints may only be placed at kernel addresses\n");
1239 		return 0;
1240 	}
1241 	if (!mread(addr, &instr, sizeof(instr))) {
1242 		printf("Can't read instruction at address %lx\n", addr);
1243 		return 0;
1244 	}
1245 	if (IS_MTMSRD(instr) || IS_RFID(instr)) {
1246 		printf("Breakpoints may not be placed on mtmsrd or rfid "
1247 		       "instructions\n");
1248 		return 0;
1249 	}
1250 	return 1;
1251 }
1252 
1253 static char *breakpoint_help_string =
1254     "Breakpoint command usage:\n"
1255     "b                show breakpoints\n"
1256     "b <addr> [cnt]   set breakpoint at given instr addr\n"
1257     "bc               clear all breakpoints\n"
1258     "bc <n/addr>      clear breakpoint number n or at addr\n"
1259     "bi <addr> [cnt]  set hardware instr breakpoint (POWER8 only)\n"
1260     "bd <addr> [cnt]  set hardware data breakpoint\n"
1261     "";
1262 
1263 static void
bpt_cmds(void)1264 bpt_cmds(void)
1265 {
1266 	int cmd;
1267 	unsigned long a;
1268 	int i;
1269 	struct bpt *bp;
1270 
1271 	cmd = inchar();
1272 	switch (cmd) {
1273 #ifndef CONFIG_PPC_8xx
1274 	static const char badaddr[] = "Only kernel addresses are permitted for breakpoints\n";
1275 	int mode;
1276 	case 'd':	/* bd - hardware data breakpoint */
1277 		mode = 7;
1278 		cmd = inchar();
1279 		if (cmd == 'r')
1280 			mode = 5;
1281 		else if (cmd == 'w')
1282 			mode = 6;
1283 		else
1284 			termch = cmd;
1285 		dabr.address = 0;
1286 		dabr.enabled = 0;
1287 		if (scanhex(&dabr.address)) {
1288 			if (!is_kernel_addr(dabr.address)) {
1289 				printf(badaddr);
1290 				break;
1291 			}
1292 			dabr.address &= ~HW_BRK_TYPE_DABR;
1293 			dabr.enabled = mode | BP_DABR;
1294 		}
1295 		break;
1296 
1297 	case 'i':	/* bi - hardware instr breakpoint */
1298 		if (!cpu_has_feature(CPU_FTR_ARCH_207S)) {
1299 			printf("Hardware instruction breakpoint "
1300 			       "not supported on this cpu\n");
1301 			break;
1302 		}
1303 		if (iabr) {
1304 			iabr->enabled &= ~BP_CIABR;
1305 			iabr = NULL;
1306 		}
1307 		if (!scanhex(&a))
1308 			break;
1309 		if (!check_bp_loc(a))
1310 			break;
1311 		bp = new_breakpoint(a);
1312 		if (bp != NULL) {
1313 			bp->enabled |= BP_CIABR;
1314 			iabr = bp;
1315 		}
1316 		break;
1317 #endif
1318 
1319 	case 'c':
1320 		if (!scanhex(&a)) {
1321 			/* clear all breakpoints */
1322 			for (i = 0; i < NBPTS; ++i)
1323 				bpts[i].enabled = 0;
1324 			iabr = NULL;
1325 			dabr.enabled = 0;
1326 			printf("All breakpoints cleared\n");
1327 			break;
1328 		}
1329 
1330 		if (a <= NBPTS && a >= 1) {
1331 			/* assume a breakpoint number */
1332 			bp = &bpts[a-1];	/* bp nums are 1 based */
1333 		} else {
1334 			/* assume a breakpoint address */
1335 			bp = at_breakpoint(a);
1336 			if (bp == NULL) {
1337 				printf("No breakpoint at %lx\n", a);
1338 				break;
1339 			}
1340 		}
1341 
1342 		printf("Cleared breakpoint %lx (", BP_NUM(bp));
1343 		xmon_print_symbol(bp->address, " ", ")\n");
1344 		bp->enabled = 0;
1345 		break;
1346 
1347 	default:
1348 		termch = cmd;
1349 		cmd = skipbl();
1350 		if (cmd == '?') {
1351 			printf(breakpoint_help_string);
1352 			break;
1353 		}
1354 		termch = cmd;
1355 		if (!scanhex(&a)) {
1356 			/* print all breakpoints */
1357 			printf("   type            address\n");
1358 			if (dabr.enabled) {
1359 				printf("   data   "REG"  [", dabr.address);
1360 				if (dabr.enabled & 1)
1361 					printf("r");
1362 				if (dabr.enabled & 2)
1363 					printf("w");
1364 				printf("]\n");
1365 			}
1366 			for (bp = bpts; bp < &bpts[NBPTS]; ++bp) {
1367 				if (!bp->enabled)
1368 					continue;
1369 				printf("%2x %s   ", BP_NUM(bp),
1370 				    (bp->enabled & BP_CIABR) ? "inst": "trap");
1371 				xmon_print_symbol(bp->address, "  ", "\n");
1372 			}
1373 			break;
1374 		}
1375 
1376 		if (!check_bp_loc(a))
1377 			break;
1378 		bp = new_breakpoint(a);
1379 		if (bp != NULL)
1380 			bp->enabled |= BP_TRAP;
1381 		break;
1382 	}
1383 }
1384 
1385 /* Very cheap human name for vector lookup. */
1386 static
getvecname(unsigned long vec)1387 const char *getvecname(unsigned long vec)
1388 {
1389 	char *ret;
1390 
1391 	switch (vec) {
1392 	case 0x100:	ret = "(System Reset)"; break;
1393 	case 0x200:	ret = "(Machine Check)"; break;
1394 	case 0x300:	ret = "(Data Access)"; break;
1395 	case 0x380:
1396 		if (radix_enabled())
1397 			ret = "(Data Access Out of Range)";
1398 		else
1399 			ret = "(Data SLB Access)";
1400 		break;
1401 	case 0x400:	ret = "(Instruction Access)"; break;
1402 	case 0x480:
1403 		if (radix_enabled())
1404 			ret = "(Instruction Access Out of Range)";
1405 		else
1406 			ret = "(Instruction SLB Access)";
1407 		break;
1408 	case 0x500:	ret = "(Hardware Interrupt)"; break;
1409 	case 0x600:	ret = "(Alignment)"; break;
1410 	case 0x700:	ret = "(Program Check)"; break;
1411 	case 0x800:	ret = "(FPU Unavailable)"; break;
1412 	case 0x900:	ret = "(Decrementer)"; break;
1413 	case 0x980:	ret = "(Hypervisor Decrementer)"; break;
1414 	case 0xa00:	ret = "(Doorbell)"; break;
1415 	case 0xc00:	ret = "(System Call)"; break;
1416 	case 0xd00:	ret = "(Single Step)"; break;
1417 	case 0xe40:	ret = "(Emulation Assist)"; break;
1418 	case 0xe60:	ret = "(HMI)"; break;
1419 	case 0xe80:	ret = "(Hypervisor Doorbell)"; break;
1420 	case 0xf00:	ret = "(Performance Monitor)"; break;
1421 	case 0xf20:	ret = "(Altivec Unavailable)"; break;
1422 	case 0x1300:	ret = "(Instruction Breakpoint)"; break;
1423 	case 0x1500:	ret = "(Denormalisation)"; break;
1424 	case 0x1700:	ret = "(Altivec Assist)"; break;
1425 	default: ret = "";
1426 	}
1427 	return ret;
1428 }
1429 
get_function_bounds(unsigned long pc,unsigned long * startp,unsigned long * endp)1430 static void get_function_bounds(unsigned long pc, unsigned long *startp,
1431 				unsigned long *endp)
1432 {
1433 	unsigned long size, offset;
1434 	const char *name;
1435 
1436 	*startp = *endp = 0;
1437 	if (pc == 0)
1438 		return;
1439 	if (setjmp(bus_error_jmp) == 0) {
1440 		catch_memory_errors = 1;
1441 		sync();
1442 		name = kallsyms_lookup(pc, &size, &offset, NULL, tmpstr);
1443 		if (name != NULL) {
1444 			*startp = pc - offset;
1445 			*endp = pc - offset + size;
1446 		}
1447 		sync();
1448 	}
1449 	catch_memory_errors = 0;
1450 }
1451 
1452 #define LRSAVE_OFFSET		(STACK_FRAME_LR_SAVE * sizeof(unsigned long))
1453 #define MARKER_OFFSET		(STACK_FRAME_MARKER * sizeof(unsigned long))
1454 
xmon_show_stack(unsigned long sp,unsigned long lr,unsigned long pc)1455 static void xmon_show_stack(unsigned long sp, unsigned long lr,
1456 			    unsigned long pc)
1457 {
1458 	int max_to_print = 64;
1459 	unsigned long ip;
1460 	unsigned long newsp;
1461 	unsigned long marker;
1462 	struct pt_regs regs;
1463 
1464 	while (max_to_print--) {
1465 		if (!is_kernel_addr(sp)) {
1466 			if (sp != 0)
1467 				printf("SP (%lx) is in userspace\n", sp);
1468 			break;
1469 		}
1470 
1471 		if (!mread(sp + LRSAVE_OFFSET, &ip, sizeof(unsigned long))
1472 		    || !mread(sp, &newsp, sizeof(unsigned long))) {
1473 			printf("Couldn't read stack frame at %lx\n", sp);
1474 			break;
1475 		}
1476 
1477 		/*
1478 		 * For the first stack frame, try to work out if
1479 		 * LR and/or the saved LR value in the bottommost
1480 		 * stack frame are valid.
1481 		 */
1482 		if ((pc | lr) != 0) {
1483 			unsigned long fnstart, fnend;
1484 			unsigned long nextip;
1485 			int printip = 1;
1486 
1487 			get_function_bounds(pc, &fnstart, &fnend);
1488 			nextip = 0;
1489 			if (newsp > sp)
1490 				mread(newsp + LRSAVE_OFFSET, &nextip,
1491 				      sizeof(unsigned long));
1492 			if (lr == ip) {
1493 				if (!is_kernel_addr(lr)
1494 				    || (fnstart <= lr && lr < fnend))
1495 					printip = 0;
1496 			} else if (lr == nextip) {
1497 				printip = 0;
1498 			} else if (is_kernel_addr(lr)
1499 				   && !(fnstart <= lr && lr < fnend)) {
1500 				printf("[link register   ] ");
1501 				xmon_print_symbol(lr, " ", "\n");
1502 			}
1503 			if (printip) {
1504 				printf("["REG"] ", sp);
1505 				xmon_print_symbol(ip, " ", " (unreliable)\n");
1506 			}
1507 			pc = lr = 0;
1508 
1509 		} else {
1510 			printf("["REG"] ", sp);
1511 			xmon_print_symbol(ip, " ", "\n");
1512 		}
1513 
1514 		/* Look for "regshere" marker to see if this is
1515 		   an exception frame. */
1516 		if (mread(sp + MARKER_OFFSET, &marker, sizeof(unsigned long))
1517 		    && marker == STACK_FRAME_REGS_MARKER) {
1518 			if (mread(sp + STACK_FRAME_OVERHEAD, &regs, sizeof(regs))
1519 			    != sizeof(regs)) {
1520 				printf("Couldn't read registers at %lx\n",
1521 				       sp + STACK_FRAME_OVERHEAD);
1522 				break;
1523 			}
1524 			printf("--- Exception: %lx %s at ", regs.trap,
1525 			       getvecname(TRAP(&regs)));
1526 			pc = regs.nip;
1527 			lr = regs.link;
1528 			xmon_print_symbol(pc, " ", "\n");
1529 		}
1530 
1531 		if (newsp == 0)
1532 			break;
1533 
1534 		sp = newsp;
1535 	}
1536 }
1537 
backtrace(struct pt_regs * excp)1538 static void backtrace(struct pt_regs *excp)
1539 {
1540 	unsigned long sp;
1541 
1542 	if (scanhex(&sp))
1543 		xmon_show_stack(sp, 0, 0);
1544 	else
1545 		xmon_show_stack(excp->gpr[1], excp->link, excp->nip);
1546 	scannl();
1547 }
1548 
print_bug_trap(struct pt_regs * regs)1549 static void print_bug_trap(struct pt_regs *regs)
1550 {
1551 #ifdef CONFIG_BUG
1552 	const struct bug_entry *bug;
1553 	unsigned long addr;
1554 
1555 	if (regs->msr & MSR_PR)
1556 		return;		/* not in kernel */
1557 	addr = regs->nip;	/* address of trap instruction */
1558 	if (!is_kernel_addr(addr))
1559 		return;
1560 	bug = find_bug(regs->nip);
1561 	if (bug == NULL)
1562 		return;
1563 	if (is_warning_bug(bug))
1564 		return;
1565 
1566 #ifdef CONFIG_DEBUG_BUGVERBOSE
1567 	printf("kernel BUG at %s:%u!\n",
1568 	       bug->file, bug->line);
1569 #else
1570 	printf("kernel BUG at %p!\n", (void *)bug->bug_addr);
1571 #endif
1572 #endif /* CONFIG_BUG */
1573 }
1574 
excprint(struct pt_regs * fp)1575 static void excprint(struct pt_regs *fp)
1576 {
1577 	unsigned long trap;
1578 
1579 #ifdef CONFIG_SMP
1580 	printf("cpu 0x%x: ", smp_processor_id());
1581 #endif /* CONFIG_SMP */
1582 
1583 	trap = TRAP(fp);
1584 	printf("Vector: %lx %s at [%lx]\n", fp->trap, getvecname(trap), fp);
1585 	printf("    pc: ");
1586 	xmon_print_symbol(fp->nip, ": ", "\n");
1587 
1588 	printf("    lr: ", fp->link);
1589 	xmon_print_symbol(fp->link, ": ", "\n");
1590 
1591 	printf("    sp: %lx\n", fp->gpr[1]);
1592 	printf("   msr: %lx\n", fp->msr);
1593 
1594 	if (trap == 0x300 || trap == 0x380 || trap == 0x600 || trap == 0x200) {
1595 		printf("   dar: %lx\n", fp->dar);
1596 		if (trap != 0x380)
1597 			printf(" dsisr: %lx\n", fp->dsisr);
1598 	}
1599 
1600 	printf("  current = 0x%lx\n", current);
1601 #ifdef CONFIG_PPC64
1602 	printf("  paca    = 0x%lx\t softe: %d\t irq_happened: 0x%02x\n",
1603 	       local_paca, local_paca->soft_enabled, local_paca->irq_happened);
1604 #endif
1605 	if (current) {
1606 		printf("    pid   = %ld, comm = %s\n",
1607 		       current->pid, current->comm);
1608 	}
1609 
1610 	if (trap == 0x700)
1611 		print_bug_trap(fp);
1612 
1613 	printf(linux_banner);
1614 }
1615 
prregs(struct pt_regs * fp)1616 static void prregs(struct pt_regs *fp)
1617 {
1618 	int n, trap;
1619 	unsigned long base;
1620 	struct pt_regs regs;
1621 
1622 	if (scanhex(&base)) {
1623 		if (setjmp(bus_error_jmp) == 0) {
1624 			catch_memory_errors = 1;
1625 			sync();
1626 			regs = *(struct pt_regs *)base;
1627 			sync();
1628 			__delay(200);
1629 		} else {
1630 			catch_memory_errors = 0;
1631 			printf("*** Error reading registers from "REG"\n",
1632 			       base);
1633 			return;
1634 		}
1635 		catch_memory_errors = 0;
1636 		fp = &regs;
1637 	}
1638 
1639 #ifdef CONFIG_PPC64
1640 	if (FULL_REGS(fp)) {
1641 		for (n = 0; n < 16; ++n)
1642 			printf("R%.2ld = "REG"   R%.2ld = "REG"\n",
1643 			       n, fp->gpr[n], n+16, fp->gpr[n+16]);
1644 	} else {
1645 		for (n = 0; n < 7; ++n)
1646 			printf("R%.2ld = "REG"   R%.2ld = "REG"\n",
1647 			       n, fp->gpr[n], n+7, fp->gpr[n+7]);
1648 	}
1649 #else
1650 	for (n = 0; n < 32; ++n) {
1651 		printf("R%.2d = %.8x%s", n, fp->gpr[n],
1652 		       (n & 3) == 3? "\n": "   ");
1653 		if (n == 12 && !FULL_REGS(fp)) {
1654 			printf("\n");
1655 			break;
1656 		}
1657 	}
1658 #endif
1659 	printf("pc  = ");
1660 	xmon_print_symbol(fp->nip, " ", "\n");
1661 	if (TRAP(fp) != 0xc00 && cpu_has_feature(CPU_FTR_CFAR)) {
1662 		printf("cfar= ");
1663 		xmon_print_symbol(fp->orig_gpr3, " ", "\n");
1664 	}
1665 	printf("lr  = ");
1666 	xmon_print_symbol(fp->link, " ", "\n");
1667 	printf("msr = "REG"   cr  = %.8lx\n", fp->msr, fp->ccr);
1668 	printf("ctr = "REG"   xer = "REG"   trap = %4lx\n",
1669 	       fp->ctr, fp->xer, fp->trap);
1670 	trap = TRAP(fp);
1671 	if (trap == 0x300 || trap == 0x380 || trap == 0x600)
1672 		printf("dar = "REG"   dsisr = %.8lx\n", fp->dar, fp->dsisr);
1673 }
1674 
cacheflush(void)1675 static void cacheflush(void)
1676 {
1677 	int cmd;
1678 	unsigned long nflush;
1679 
1680 	cmd = inchar();
1681 	if (cmd != 'i')
1682 		termch = cmd;
1683 	scanhex((void *)&adrs);
1684 	if (termch != '\n')
1685 		termch = 0;
1686 	nflush = 1;
1687 	scanhex(&nflush);
1688 	nflush = (nflush + L1_CACHE_BYTES - 1) / L1_CACHE_BYTES;
1689 	if (setjmp(bus_error_jmp) == 0) {
1690 		catch_memory_errors = 1;
1691 		sync();
1692 
1693 		if (cmd != 'i') {
1694 			for (; nflush > 0; --nflush, adrs += L1_CACHE_BYTES)
1695 				cflush((void *) adrs);
1696 		} else {
1697 			for (; nflush > 0; --nflush, adrs += L1_CACHE_BYTES)
1698 				cinval((void *) adrs);
1699 		}
1700 		sync();
1701 		/* wait a little while to see if we get a machine check */
1702 		__delay(200);
1703 	}
1704 	catch_memory_errors = 0;
1705 }
1706 
1707 extern unsigned long xmon_mfspr(int spr, unsigned long default_value);
1708 extern void xmon_mtspr(int spr, unsigned long value);
1709 
1710 static int
read_spr(int n,unsigned long * vp)1711 read_spr(int n, unsigned long *vp)
1712 {
1713 	unsigned long ret = -1UL;
1714 	int ok = 0;
1715 
1716 	if (setjmp(bus_error_jmp) == 0) {
1717 		catch_spr_faults = 1;
1718 		sync();
1719 
1720 		ret = xmon_mfspr(n, *vp);
1721 
1722 		sync();
1723 		*vp = ret;
1724 		ok = 1;
1725 	}
1726 	catch_spr_faults = 0;
1727 
1728 	return ok;
1729 }
1730 
1731 static void
write_spr(int n,unsigned long val)1732 write_spr(int n, unsigned long val)
1733 {
1734 	if (setjmp(bus_error_jmp) == 0) {
1735 		catch_spr_faults = 1;
1736 		sync();
1737 
1738 		xmon_mtspr(n, val);
1739 
1740 		sync();
1741 	} else {
1742 		printf("SPR 0x%03x (%4d) Faulted during write\n", n, n);
1743 	}
1744 	catch_spr_faults = 0;
1745 }
1746 
dump_206_sprs(void)1747 static void dump_206_sprs(void)
1748 {
1749 #ifdef CONFIG_PPC64
1750 	if (!cpu_has_feature(CPU_FTR_ARCH_206))
1751 		return;
1752 
1753 	/* Actually some of these pre-date 2.06, but whatevs */
1754 
1755 	printf("srr0   = %.16lx  srr1  = %.16lx dsisr  = %.8x\n",
1756 		mfspr(SPRN_SRR0), mfspr(SPRN_SRR1), mfspr(SPRN_DSISR));
1757 	printf("dscr   = %.16lx  ppr   = %.16lx pir    = %.8x\n",
1758 		mfspr(SPRN_DSCR), mfspr(SPRN_PPR), mfspr(SPRN_PIR));
1759 	printf("amr    = %.16lx  uamor = %.16lx\n",
1760 		mfspr(SPRN_AMR), mfspr(SPRN_UAMOR));
1761 
1762 	if (!(mfmsr() & MSR_HV))
1763 		return;
1764 
1765 	printf("sdr1   = %.16lx  hdar  = %.16lx hdsisr = %.8x\n",
1766 		mfspr(SPRN_SDR1), mfspr(SPRN_HDAR), mfspr(SPRN_HDSISR));
1767 	printf("hsrr0  = %.16lx hsrr1  = %.16lx hdec   = %.16lx\n",
1768 		mfspr(SPRN_HSRR0), mfspr(SPRN_HSRR1), mfspr(SPRN_HDEC));
1769 	printf("lpcr   = %.16lx  pcr   = %.16lx lpidr  = %.8x\n",
1770 		mfspr(SPRN_LPCR), mfspr(SPRN_PCR), mfspr(SPRN_LPID));
1771 	printf("hsprg0 = %.16lx hsprg1 = %.16lx amor   = %.16lx\n",
1772 		mfspr(SPRN_HSPRG0), mfspr(SPRN_HSPRG1), mfspr(SPRN_AMOR));
1773 	printf("dabr   = %.16lx dabrx  = %.16lx\n",
1774 		mfspr(SPRN_DABR), mfspr(SPRN_DABRX));
1775 #endif
1776 }
1777 
dump_207_sprs(void)1778 static void dump_207_sprs(void)
1779 {
1780 #ifdef CONFIG_PPC64
1781 	unsigned long msr;
1782 
1783 	if (!cpu_has_feature(CPU_FTR_ARCH_207S))
1784 		return;
1785 
1786 	printf("dpdes  = %.16lx  tir   = %.16lx cir    = %.8x\n",
1787 		mfspr(SPRN_DPDES), mfspr(SPRN_TIR), mfspr(SPRN_CIR));
1788 
1789 	printf("fscr   = %.16lx  tar   = %.16lx pspb   = %.8x\n",
1790 		mfspr(SPRN_FSCR), mfspr(SPRN_TAR), mfspr(SPRN_PSPB));
1791 
1792 	msr = mfmsr();
1793 	if (msr & MSR_TM) {
1794 		/* Only if TM has been enabled in the kernel */
1795 		printf("tfhar  = %.16lx  tfiar = %.16lx texasr = %.16lx\n",
1796 			mfspr(SPRN_TFHAR), mfspr(SPRN_TFIAR),
1797 			mfspr(SPRN_TEXASR));
1798 	}
1799 
1800 	printf("mmcr0  = %.16lx  mmcr1 = %.16lx mmcr2  = %.16lx\n",
1801 		mfspr(SPRN_MMCR0), mfspr(SPRN_MMCR1), mfspr(SPRN_MMCR2));
1802 	printf("pmc1   = %.8x pmc2 = %.8x  pmc3 = %.8x  pmc4   = %.8x\n",
1803 		mfspr(SPRN_PMC1), mfspr(SPRN_PMC2),
1804 		mfspr(SPRN_PMC3), mfspr(SPRN_PMC4));
1805 	printf("mmcra  = %.16lx   siar = %.16lx pmc5   = %.8x\n",
1806 		mfspr(SPRN_MMCRA), mfspr(SPRN_SIAR), mfspr(SPRN_PMC5));
1807 	printf("sdar   = %.16lx   sier = %.16lx pmc6   = %.8x\n",
1808 		mfspr(SPRN_SDAR), mfspr(SPRN_SIER), mfspr(SPRN_PMC6));
1809 	printf("ebbhr  = %.16lx  ebbrr = %.16lx bescr  = %.16lx\n",
1810 		mfspr(SPRN_EBBHR), mfspr(SPRN_EBBRR), mfspr(SPRN_BESCR));
1811 	printf("iamr   = %.16lx\n", mfspr(SPRN_IAMR));
1812 
1813 	if (!(msr & MSR_HV))
1814 		return;
1815 
1816 	printf("hfscr  = %.16lx  dhdes = %.16lx rpr    = %.16lx\n",
1817 		mfspr(SPRN_HFSCR), mfspr(SPRN_DHDES), mfspr(SPRN_RPR));
1818 	printf("dawr   = %.16lx  dawrx = %.16lx ciabr  = %.16lx\n",
1819 		mfspr(SPRN_DAWR), mfspr(SPRN_DAWRX), mfspr(SPRN_CIABR));
1820 #endif
1821 }
1822 
dump_300_sprs(void)1823 static void dump_300_sprs(void)
1824 {
1825 #ifdef CONFIG_PPC64
1826 	bool hv = mfmsr() & MSR_HV;
1827 
1828 	if (!cpu_has_feature(CPU_FTR_ARCH_300))
1829 		return;
1830 
1831 	printf("pidr   = %.16lx  tidr  = %.16lx\n",
1832 		mfspr(SPRN_PID), mfspr(SPRN_TIDR));
1833 	printf("psscr  = %.16lx\n",
1834 		hv ? mfspr(SPRN_PSSCR) : mfspr(SPRN_PSSCR_PR));
1835 
1836 	if (!hv)
1837 		return;
1838 
1839 	printf("ptcr   = %.16lx  asdr  = %.16lx\n",
1840 		mfspr(SPRN_PTCR), mfspr(SPRN_ASDR));
1841 #endif
1842 }
1843 
dump_one_spr(int spr,bool show_unimplemented)1844 static void dump_one_spr(int spr, bool show_unimplemented)
1845 {
1846 	unsigned long val;
1847 
1848 	val = 0xdeadbeef;
1849 	if (!read_spr(spr, &val)) {
1850 		printf("SPR 0x%03x (%4d) Faulted during read\n", spr, spr);
1851 		return;
1852 	}
1853 
1854 	if (val == 0xdeadbeef) {
1855 		/* Looks like read was a nop, confirm */
1856 		val = 0x0badcafe;
1857 		if (!read_spr(spr, &val)) {
1858 			printf("SPR 0x%03x (%4d) Faulted during read\n", spr, spr);
1859 			return;
1860 		}
1861 
1862 		if (val == 0x0badcafe) {
1863 			if (show_unimplemented)
1864 				printf("SPR 0x%03x (%4d) Unimplemented\n", spr, spr);
1865 			return;
1866 		}
1867 	}
1868 
1869 	printf("SPR 0x%03x (%4d) = 0x%lx\n", spr, spr, val);
1870 }
1871 
super_regs(void)1872 static void super_regs(void)
1873 {
1874 	static unsigned long regno;
1875 	int cmd;
1876 	int spr;
1877 
1878 	cmd = skipbl();
1879 
1880 	switch (cmd) {
1881 	case '\n': {
1882 		unsigned long sp, toc;
1883 		asm("mr %0,1" : "=r" (sp) :);
1884 		asm("mr %0,2" : "=r" (toc) :);
1885 
1886 		printf("msr    = "REG"  sprg0 = "REG"\n",
1887 		       mfmsr(), mfspr(SPRN_SPRG0));
1888 		printf("pvr    = "REG"  sprg1 = "REG"\n",
1889 		       mfspr(SPRN_PVR), mfspr(SPRN_SPRG1));
1890 		printf("dec    = "REG"  sprg2 = "REG"\n",
1891 		       mfspr(SPRN_DEC), mfspr(SPRN_SPRG2));
1892 		printf("sp     = "REG"  sprg3 = "REG"\n", sp, mfspr(SPRN_SPRG3));
1893 		printf("toc    = "REG"  dar   = "REG"\n", toc, mfspr(SPRN_DAR));
1894 
1895 		dump_206_sprs();
1896 		dump_207_sprs();
1897 		dump_300_sprs();
1898 
1899 		return;
1900 	}
1901 	case 'w': {
1902 		unsigned long val;
1903 		scanhex(&regno);
1904 		val = 0;
1905 		read_spr(regno, &val);
1906 		scanhex(&val);
1907 		write_spr(regno, val);
1908 		dump_one_spr(regno, true);
1909 		break;
1910 	}
1911 	case 'r':
1912 		scanhex(&regno);
1913 		dump_one_spr(regno, true);
1914 		break;
1915 	case 'a':
1916 		/* dump ALL SPRs */
1917 		for (spr = 1; spr < 1024; ++spr)
1918 			dump_one_spr(spr, false);
1919 		break;
1920 	}
1921 
1922 	scannl();
1923 }
1924 
1925 /*
1926  * Stuff for reading and writing memory safely
1927  */
1928 static int
mread(unsigned long adrs,void * buf,int size)1929 mread(unsigned long adrs, void *buf, int size)
1930 {
1931 	volatile int n;
1932 	char *p, *q;
1933 
1934 	n = 0;
1935 	if (setjmp(bus_error_jmp) == 0) {
1936 		catch_memory_errors = 1;
1937 		sync();
1938 		p = (char *)adrs;
1939 		q = (char *)buf;
1940 		switch (size) {
1941 		case 2:
1942 			*(u16 *)q = *(u16 *)p;
1943 			break;
1944 		case 4:
1945 			*(u32 *)q = *(u32 *)p;
1946 			break;
1947 		case 8:
1948 			*(u64 *)q = *(u64 *)p;
1949 			break;
1950 		default:
1951 			for( ; n < size; ++n) {
1952 				*q++ = *p++;
1953 				sync();
1954 			}
1955 		}
1956 		sync();
1957 		/* wait a little while to see if we get a machine check */
1958 		__delay(200);
1959 		n = size;
1960 	}
1961 	catch_memory_errors = 0;
1962 	return n;
1963 }
1964 
1965 static int
mwrite(unsigned long adrs,void * buf,int size)1966 mwrite(unsigned long adrs, void *buf, int size)
1967 {
1968 	volatile int n;
1969 	char *p, *q;
1970 
1971 	n = 0;
1972 	if (setjmp(bus_error_jmp) == 0) {
1973 		catch_memory_errors = 1;
1974 		sync();
1975 		p = (char *) adrs;
1976 		q = (char *) buf;
1977 		switch (size) {
1978 		case 2:
1979 			*(u16 *)p = *(u16 *)q;
1980 			break;
1981 		case 4:
1982 			*(u32 *)p = *(u32 *)q;
1983 			break;
1984 		case 8:
1985 			*(u64 *)p = *(u64 *)q;
1986 			break;
1987 		default:
1988 			for ( ; n < size; ++n) {
1989 				*p++ = *q++;
1990 				sync();
1991 			}
1992 		}
1993 		sync();
1994 		/* wait a little while to see if we get a machine check */
1995 		__delay(200);
1996 		n = size;
1997 	} else {
1998 		printf("*** Error writing address "REG"\n", adrs + n);
1999 	}
2000 	catch_memory_errors = 0;
2001 	return n;
2002 }
2003 
2004 static int fault_type;
2005 static int fault_except;
2006 static char *fault_chars[] = { "--", "**", "##" };
2007 
handle_fault(struct pt_regs * regs)2008 static int handle_fault(struct pt_regs *regs)
2009 {
2010 	fault_except = TRAP(regs);
2011 	switch (TRAP(regs)) {
2012 	case 0x200:
2013 		fault_type = 0;
2014 		break;
2015 	case 0x300:
2016 	case 0x380:
2017 		fault_type = 1;
2018 		break;
2019 	default:
2020 		fault_type = 2;
2021 	}
2022 
2023 	longjmp(bus_error_jmp, 1);
2024 
2025 	return 0;
2026 }
2027 
2028 #define SWAP(a, b, t)	((t) = (a), (a) = (b), (b) = (t))
2029 
2030 static void
byterev(unsigned char * val,int size)2031 byterev(unsigned char *val, int size)
2032 {
2033 	int t;
2034 
2035 	switch (size) {
2036 	case 2:
2037 		SWAP(val[0], val[1], t);
2038 		break;
2039 	case 4:
2040 		SWAP(val[0], val[3], t);
2041 		SWAP(val[1], val[2], t);
2042 		break;
2043 	case 8: /* is there really any use for this? */
2044 		SWAP(val[0], val[7], t);
2045 		SWAP(val[1], val[6], t);
2046 		SWAP(val[2], val[5], t);
2047 		SWAP(val[3], val[4], t);
2048 		break;
2049 	}
2050 }
2051 
2052 static int brev;
2053 static int mnoread;
2054 
2055 static char *memex_help_string =
2056     "Memory examine command usage:\n"
2057     "m [addr] [flags] examine/change memory\n"
2058     "  addr is optional.  will start where left off.\n"
2059     "  flags may include chars from this set:\n"
2060     "    b   modify by bytes (default)\n"
2061     "    w   modify by words (2 byte)\n"
2062     "    l   modify by longs (4 byte)\n"
2063     "    d   modify by doubleword (8 byte)\n"
2064     "    r   toggle reverse byte order mode\n"
2065     "    n   do not read memory (for i/o spaces)\n"
2066     "    .   ok to read (default)\n"
2067     "NOTE: flags are saved as defaults\n"
2068     "";
2069 
2070 static char *memex_subcmd_help_string =
2071     "Memory examine subcommands:\n"
2072     "  hexval   write this val to current location\n"
2073     "  'string' write chars from string to this location\n"
2074     "  '        increment address\n"
2075     "  ^        decrement address\n"
2076     "  /        increment addr by 0x10.  //=0x100, ///=0x1000, etc\n"
2077     "  \\        decrement addr by 0x10.  \\\\=0x100, \\\\\\=0x1000, etc\n"
2078     "  `        clear no-read flag\n"
2079     "  ;        stay at this addr\n"
2080     "  v        change to byte mode\n"
2081     "  w        change to word (2 byte) mode\n"
2082     "  l        change to long (4 byte) mode\n"
2083     "  u        change to doubleword (8 byte) mode\n"
2084     "  m addr   change current addr\n"
2085     "  n        toggle no-read flag\n"
2086     "  r        toggle byte reverse flag\n"
2087     "  < count  back up count bytes\n"
2088     "  > count  skip forward count bytes\n"
2089     "  x        exit this mode\n"
2090     "";
2091 
2092 static void
memex(void)2093 memex(void)
2094 {
2095 	int cmd, inc, i, nslash;
2096 	unsigned long n;
2097 	unsigned char val[16];
2098 
2099 	scanhex((void *)&adrs);
2100 	cmd = skipbl();
2101 	if (cmd == '?') {
2102 		printf(memex_help_string);
2103 		return;
2104 	} else {
2105 		termch = cmd;
2106 	}
2107 	last_cmd = "m\n";
2108 	while ((cmd = skipbl()) != '\n') {
2109 		switch( cmd ){
2110 		case 'b':	size = 1;	break;
2111 		case 'w':	size = 2;	break;
2112 		case 'l':	size = 4;	break;
2113 		case 'd':	size = 8;	break;
2114 		case 'r': 	brev = !brev;	break;
2115 		case 'n':	mnoread = 1;	break;
2116 		case '.':	mnoread = 0;	break;
2117 		}
2118 	}
2119 	if( size <= 0 )
2120 		size = 1;
2121 	else if( size > 8 )
2122 		size = 8;
2123 	for(;;){
2124 		if (!mnoread)
2125 			n = mread(adrs, val, size);
2126 		printf(REG"%c", adrs, brev? 'r': ' ');
2127 		if (!mnoread) {
2128 			if (brev)
2129 				byterev(val, size);
2130 			putchar(' ');
2131 			for (i = 0; i < n; ++i)
2132 				printf("%.2x", val[i]);
2133 			for (; i < size; ++i)
2134 				printf("%s", fault_chars[fault_type]);
2135 		}
2136 		putchar(' ');
2137 		inc = size;
2138 		nslash = 0;
2139 		for(;;){
2140 			if( scanhex(&n) ){
2141 				for (i = 0; i < size; ++i)
2142 					val[i] = n >> (i * 8);
2143 				if (!brev)
2144 					byterev(val, size);
2145 				mwrite(adrs, val, size);
2146 				inc = size;
2147 			}
2148 			cmd = skipbl();
2149 			if (cmd == '\n')
2150 				break;
2151 			inc = 0;
2152 			switch (cmd) {
2153 			case '\'':
2154 				for(;;){
2155 					n = inchar();
2156 					if( n == '\\' )
2157 						n = bsesc();
2158 					else if( n == '\'' )
2159 						break;
2160 					for (i = 0; i < size; ++i)
2161 						val[i] = n >> (i * 8);
2162 					if (!brev)
2163 						byterev(val, size);
2164 					mwrite(adrs, val, size);
2165 					adrs += size;
2166 				}
2167 				adrs -= size;
2168 				inc = size;
2169 				break;
2170 			case ',':
2171 				adrs += size;
2172 				break;
2173 			case '.':
2174 				mnoread = 0;
2175 				break;
2176 			case ';':
2177 				break;
2178 			case 'x':
2179 			case EOF:
2180 				scannl();
2181 				return;
2182 			case 'b':
2183 			case 'v':
2184 				size = 1;
2185 				break;
2186 			case 'w':
2187 				size = 2;
2188 				break;
2189 			case 'l':
2190 				size = 4;
2191 				break;
2192 			case 'u':
2193 				size = 8;
2194 				break;
2195 			case '^':
2196 				adrs -= size;
2197 				break;
2198 			case '/':
2199 				if (nslash > 0)
2200 					adrs -= 1 << nslash;
2201 				else
2202 					nslash = 0;
2203 				nslash += 4;
2204 				adrs += 1 << nslash;
2205 				break;
2206 			case '\\':
2207 				if (nslash < 0)
2208 					adrs += 1 << -nslash;
2209 				else
2210 					nslash = 0;
2211 				nslash -= 4;
2212 				adrs -= 1 << -nslash;
2213 				break;
2214 			case 'm':
2215 				scanhex((void *)&adrs);
2216 				break;
2217 			case 'n':
2218 				mnoread = 1;
2219 				break;
2220 			case 'r':
2221 				brev = !brev;
2222 				break;
2223 			case '<':
2224 				n = size;
2225 				scanhex(&n);
2226 				adrs -= n;
2227 				break;
2228 			case '>':
2229 				n = size;
2230 				scanhex(&n);
2231 				adrs += n;
2232 				break;
2233 			case '?':
2234 				printf(memex_subcmd_help_string);
2235 				break;
2236 			}
2237 		}
2238 		adrs += inc;
2239 	}
2240 }
2241 
2242 static int
bsesc(void)2243 bsesc(void)
2244 {
2245 	int c;
2246 
2247 	c = inchar();
2248 	switch( c ){
2249 	case 'n':	c = '\n';	break;
2250 	case 'r':	c = '\r';	break;
2251 	case 'b':	c = '\b';	break;
2252 	case 't':	c = '\t';	break;
2253 	}
2254 	return c;
2255 }
2256 
xmon_rawdump(unsigned long adrs,long ndump)2257 static void xmon_rawdump (unsigned long adrs, long ndump)
2258 {
2259 	long n, m, r, nr;
2260 	unsigned char temp[16];
2261 
2262 	for (n = ndump; n > 0;) {
2263 		r = n < 16? n: 16;
2264 		nr = mread(adrs, temp, r);
2265 		adrs += nr;
2266 		for (m = 0; m < r; ++m) {
2267 			if (m < nr)
2268 				printf("%.2x", temp[m]);
2269 			else
2270 				printf("%s", fault_chars[fault_type]);
2271 		}
2272 		n -= r;
2273 		if (nr < r)
2274 			break;
2275 	}
2276 	printf("\n");
2277 }
2278 
dump_tracing(void)2279 static void dump_tracing(void)
2280 {
2281 	int c;
2282 
2283 	c = inchar();
2284 	if (c == 'c')
2285 		ftrace_dump(DUMP_ORIG);
2286 	else
2287 		ftrace_dump(DUMP_ALL);
2288 }
2289 
2290 #ifdef CONFIG_PPC64
dump_one_paca(int cpu)2291 static void dump_one_paca(int cpu)
2292 {
2293 	struct paca_struct *p;
2294 #ifdef CONFIG_PPC_STD_MMU_64
2295 	int i = 0;
2296 #endif
2297 
2298 	if (setjmp(bus_error_jmp) != 0) {
2299 		printf("*** Error dumping paca for cpu 0x%x!\n", cpu);
2300 		return;
2301 	}
2302 
2303 	catch_memory_errors = 1;
2304 	sync();
2305 
2306 	p = &paca[cpu];
2307 
2308 	printf("paca for cpu 0x%x @ %p:\n", cpu, p);
2309 
2310 	printf(" %-*s = %s\n", 20, "possible", cpu_possible(cpu) ? "yes" : "no");
2311 	printf(" %-*s = %s\n", 20, "present", cpu_present(cpu) ? "yes" : "no");
2312 	printf(" %-*s = %s\n", 20, "online", cpu_online(cpu) ? "yes" : "no");
2313 
2314 #define DUMP(paca, name, format) \
2315 	printf(" %-*s = %#-*"format"\t(0x%lx)\n", 20, #name, 18, paca->name, \
2316 		offsetof(struct paca_struct, name));
2317 
2318 	DUMP(p, lock_token, "x");
2319 	DUMP(p, paca_index, "x");
2320 	DUMP(p, kernel_toc, "lx");
2321 	DUMP(p, kernelbase, "lx");
2322 	DUMP(p, kernel_msr, "lx");
2323 	DUMP(p, emergency_sp, "p");
2324 #ifdef CONFIG_PPC_BOOK3S_64
2325 	DUMP(p, nmi_emergency_sp, "p");
2326 	DUMP(p, mc_emergency_sp, "p");
2327 	DUMP(p, in_nmi, "x");
2328 	DUMP(p, in_mce, "x");
2329 	DUMP(p, hmi_event_available, "x");
2330 #endif
2331 	DUMP(p, data_offset, "lx");
2332 	DUMP(p, hw_cpu_id, "x");
2333 	DUMP(p, cpu_start, "x");
2334 	DUMP(p, kexec_state, "x");
2335 #ifdef CONFIG_PPC_STD_MMU_64
2336 	for (i = 0; i < SLB_NUM_BOLTED; i++) {
2337 		u64 esid, vsid;
2338 
2339 		if (!p->slb_shadow_ptr)
2340 			continue;
2341 
2342 		esid = be64_to_cpu(p->slb_shadow_ptr->save_area[i].esid);
2343 		vsid = be64_to_cpu(p->slb_shadow_ptr->save_area[i].vsid);
2344 
2345 		if (esid || vsid) {
2346 			printf(" slb_shadow[%d]:       = 0x%016lx 0x%016lx\n",
2347 				i, esid, vsid);
2348 		}
2349 	}
2350 	DUMP(p, vmalloc_sllp, "x");
2351 	DUMP(p, slb_cache_ptr, "x");
2352 	for (i = 0; i < SLB_CACHE_ENTRIES; i++)
2353 		printf(" slb_cache[%d]:        = 0x%016lx\n", i, p->slb_cache[i]);
2354 
2355 	DUMP(p, rfi_flush_fallback_area, "px");
2356 #endif
2357 	DUMP(p, dscr_default, "llx");
2358 #ifdef CONFIG_PPC_BOOK3E
2359 	DUMP(p, pgd, "p");
2360 	DUMP(p, kernel_pgd, "p");
2361 	DUMP(p, tcd_ptr, "p");
2362 	DUMP(p, mc_kstack, "p");
2363 	DUMP(p, crit_kstack, "p");
2364 	DUMP(p, dbg_kstack, "p");
2365 #endif
2366 	DUMP(p, __current, "p");
2367 	DUMP(p, kstack, "lx");
2368 	DUMP(p, stab_rr, "lx");
2369 	DUMP(p, saved_r1, "lx");
2370 	DUMP(p, trap_save, "x");
2371 	DUMP(p, soft_enabled, "x");
2372 	DUMP(p, irq_happened, "x");
2373 	DUMP(p, io_sync, "x");
2374 	DUMP(p, irq_work_pending, "x");
2375 	DUMP(p, nap_state_lost, "x");
2376 	DUMP(p, sprg_vdso, "llx");
2377 
2378 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
2379 	DUMP(p, tm_scratch, "llx");
2380 #endif
2381 
2382 #ifdef CONFIG_PPC_POWERNV
2383 	DUMP(p, core_idle_state_ptr, "p");
2384 	DUMP(p, thread_idle_state, "x");
2385 	DUMP(p, thread_mask, "x");
2386 	DUMP(p, subcore_sibling_mask, "x");
2387 #endif
2388 
2389 	DUMP(p, accounting.utime, "llx");
2390 	DUMP(p, accounting.stime, "llx");
2391 	DUMP(p, accounting.utime_scaled, "llx");
2392 	DUMP(p, accounting.starttime, "llx");
2393 	DUMP(p, accounting.starttime_user, "llx");
2394 	DUMP(p, accounting.startspurr, "llx");
2395 	DUMP(p, accounting.utime_sspurr, "llx");
2396 	DUMP(p, accounting.steal_time, "llx");
2397 #undef DUMP
2398 
2399 	catch_memory_errors = 0;
2400 	sync();
2401 }
2402 
dump_all_pacas(void)2403 static void dump_all_pacas(void)
2404 {
2405 	int cpu;
2406 
2407 	if (num_possible_cpus() == 0) {
2408 		printf("No possible cpus, use 'dp #' to dump individual cpus\n");
2409 		return;
2410 	}
2411 
2412 	for_each_possible_cpu(cpu)
2413 		dump_one_paca(cpu);
2414 }
2415 
dump_pacas(void)2416 static void dump_pacas(void)
2417 {
2418 	unsigned long num;
2419 	int c;
2420 
2421 	c = inchar();
2422 	if (c == 'a') {
2423 		dump_all_pacas();
2424 		return;
2425 	}
2426 
2427 	termch = c;	/* Put c back, it wasn't 'a' */
2428 
2429 	if (scanhex(&num))
2430 		dump_one_paca(num);
2431 	else
2432 		dump_one_paca(xmon_owner);
2433 }
2434 #endif
2435 
2436 #ifdef CONFIG_PPC_POWERNV
dump_one_xive(int cpu)2437 static void dump_one_xive(int cpu)
2438 {
2439 	unsigned int hwid = get_hard_smp_processor_id(cpu);
2440 	bool hv = cpu_has_feature(CPU_FTR_HVMODE);
2441 
2442 	if (hv) {
2443 		opal_xive_dump(XIVE_DUMP_TM_HYP, hwid);
2444 		opal_xive_dump(XIVE_DUMP_TM_POOL, hwid);
2445 		opal_xive_dump(XIVE_DUMP_TM_OS, hwid);
2446 		opal_xive_dump(XIVE_DUMP_TM_USER, hwid);
2447 		opal_xive_dump(XIVE_DUMP_VP, hwid);
2448 		opal_xive_dump(XIVE_DUMP_EMU_STATE, hwid);
2449 	}
2450 
2451 	if (setjmp(bus_error_jmp) != 0) {
2452 		catch_memory_errors = 0;
2453 		printf("*** Error dumping xive on cpu %d\n", cpu);
2454 		return;
2455 	}
2456 
2457 	catch_memory_errors = 1;
2458 	sync();
2459 	xmon_xive_do_dump(cpu);
2460 	sync();
2461 	__delay(200);
2462 	catch_memory_errors = 0;
2463 }
2464 
dump_all_xives(void)2465 static void dump_all_xives(void)
2466 {
2467 	int cpu;
2468 
2469 	if (num_possible_cpus() == 0) {
2470 		printf("No possible cpus, use 'dx #' to dump individual cpus\n");
2471 		return;
2472 	}
2473 
2474 	for_each_possible_cpu(cpu)
2475 		dump_one_xive(cpu);
2476 }
2477 
dump_one_xive_irq(u32 num)2478 static void dump_one_xive_irq(u32 num)
2479 {
2480 	s64 rc;
2481 	__be64 vp;
2482 	u8 prio;
2483 	__be32 lirq;
2484 
2485 	rc = opal_xive_get_irq_config(num, &vp, &prio, &lirq);
2486 	xmon_printf("IRQ 0x%x config: vp=0x%llx prio=%d lirq=0x%x (rc=%lld)\n",
2487 		    num, be64_to_cpu(vp), prio, be32_to_cpu(lirq), rc);
2488 }
2489 
dump_xives(void)2490 static void dump_xives(void)
2491 {
2492 	unsigned long num;
2493 	int c;
2494 
2495 	if (!xive_enabled()) {
2496 		printf("Xive disabled on this system\n");
2497 		return;
2498 	}
2499 
2500 	c = inchar();
2501 	if (c == 'a') {
2502 		dump_all_xives();
2503 		return;
2504 	} else if (c == 'i') {
2505 		if (scanhex(&num))
2506 			dump_one_xive_irq(num);
2507 		return;
2508 	}
2509 
2510 	termch = c;	/* Put c back, it wasn't 'a' */
2511 
2512 	if (scanhex(&num))
2513 		dump_one_xive(num);
2514 	else
2515 		dump_one_xive(xmon_owner);
2516 }
2517 #endif /* CONFIG_PPC_POWERNV */
2518 
dump_by_size(unsigned long addr,long count,int size)2519 static void dump_by_size(unsigned long addr, long count, int size)
2520 {
2521 	unsigned char temp[16];
2522 	int i, j;
2523 	u64 val;
2524 
2525 	count = ALIGN(count, 16);
2526 
2527 	for (i = 0; i < count; i += 16, addr += 16) {
2528 		printf(REG, addr);
2529 
2530 		if (mread(addr, temp, 16) != 16) {
2531 			printf("\nFaulted reading %d bytes from 0x"REG"\n", 16, addr);
2532 			return;
2533 		}
2534 
2535 		for (j = 0; j < 16; j += size) {
2536 			putchar(' ');
2537 			switch (size) {
2538 			case 1: val = temp[j]; break;
2539 			case 2: val = *(u16 *)&temp[j]; break;
2540 			case 4: val = *(u32 *)&temp[j]; break;
2541 			case 8: val = *(u64 *)&temp[j]; break;
2542 			default: val = 0;
2543 			}
2544 
2545 			printf("%0*lx", size * 2, val);
2546 		}
2547 		printf("\n");
2548 	}
2549 }
2550 
2551 static void
dump(void)2552 dump(void)
2553 {
2554 	static char last[] = { "d?\n" };
2555 	int c;
2556 
2557 	c = inchar();
2558 
2559 #ifdef CONFIG_PPC64
2560 	if (c == 'p') {
2561 		xmon_start_pagination();
2562 		dump_pacas();
2563 		xmon_end_pagination();
2564 		return;
2565 	}
2566 #endif
2567 #ifdef CONFIG_PPC_POWERNV
2568 	if (c == 'x') {
2569 		xmon_start_pagination();
2570 		dump_xives();
2571 		xmon_end_pagination();
2572 		return;
2573 	}
2574 #endif
2575 
2576 	if (c == 't') {
2577 		dump_tracing();
2578 		return;
2579 	}
2580 
2581 	if (c == '\n')
2582 		termch = c;
2583 
2584 	scanhex((void *)&adrs);
2585 	if (termch != '\n')
2586 		termch = 0;
2587 	if (c == 'i') {
2588 		scanhex(&nidump);
2589 		if (nidump == 0)
2590 			nidump = 16;
2591 		else if (nidump > MAX_DUMP)
2592 			nidump = MAX_DUMP;
2593 		adrs += ppc_inst_dump(adrs, nidump, 1);
2594 		last_cmd = "di\n";
2595 	} else if (c == 'l') {
2596 		dump_log_buf();
2597 	} else if (c == 'o') {
2598 		dump_opal_msglog();
2599 	} else if (c == 'r') {
2600 		scanhex(&ndump);
2601 		if (ndump == 0)
2602 			ndump = 64;
2603 		xmon_rawdump(adrs, ndump);
2604 		adrs += ndump;
2605 		last_cmd = "dr\n";
2606 	} else {
2607 		scanhex(&ndump);
2608 		if (ndump == 0)
2609 			ndump = 64;
2610 		else if (ndump > MAX_DUMP)
2611 			ndump = MAX_DUMP;
2612 
2613 		switch (c) {
2614 		case '8':
2615 		case '4':
2616 		case '2':
2617 		case '1':
2618 			ndump = ALIGN(ndump, 16);
2619 			dump_by_size(adrs, ndump, c - '0');
2620 			last[1] = c;
2621 			last_cmd = last;
2622 			break;
2623 		default:
2624 			prdump(adrs, ndump);
2625 			last_cmd = "d\n";
2626 		}
2627 
2628 		adrs += ndump;
2629 	}
2630 }
2631 
2632 static void
prdump(unsigned long adrs,long ndump)2633 prdump(unsigned long adrs, long ndump)
2634 {
2635 	long n, m, c, r, nr;
2636 	unsigned char temp[16];
2637 
2638 	for (n = ndump; n > 0;) {
2639 		printf(REG, adrs);
2640 		putchar(' ');
2641 		r = n < 16? n: 16;
2642 		nr = mread(adrs, temp, r);
2643 		adrs += nr;
2644 		for (m = 0; m < r; ++m) {
2645 			if ((m & (sizeof(long) - 1)) == 0 && m > 0)
2646 				putchar(' ');
2647 			if (m < nr)
2648 				printf("%.2x", temp[m]);
2649 			else
2650 				printf("%s", fault_chars[fault_type]);
2651 		}
2652 		for (; m < 16; ++m) {
2653 			if ((m & (sizeof(long) - 1)) == 0)
2654 				putchar(' ');
2655 			printf("  ");
2656 		}
2657 		printf("  |");
2658 		for (m = 0; m < r; ++m) {
2659 			if (m < nr) {
2660 				c = temp[m];
2661 				putchar(' ' <= c && c <= '~'? c: '.');
2662 			} else
2663 				putchar(' ');
2664 		}
2665 		n -= r;
2666 		for (; m < 16; ++m)
2667 			putchar(' ');
2668 		printf("|\n");
2669 		if (nr < r)
2670 			break;
2671 	}
2672 }
2673 
2674 typedef int (*instruction_dump_func)(unsigned long inst, unsigned long addr);
2675 
2676 static int
generic_inst_dump(unsigned long adr,long count,int praddr,instruction_dump_func dump_func)2677 generic_inst_dump(unsigned long adr, long count, int praddr,
2678 			instruction_dump_func dump_func)
2679 {
2680 	int nr, dotted;
2681 	unsigned long first_adr;
2682 	unsigned long inst, last_inst = 0;
2683 	unsigned char val[4];
2684 
2685 	dotted = 0;
2686 	for (first_adr = adr; count > 0; --count, adr += 4) {
2687 		nr = mread(adr, val, 4);
2688 		if (nr == 0) {
2689 			if (praddr) {
2690 				const char *x = fault_chars[fault_type];
2691 				printf(REG"  %s%s%s%s\n", adr, x, x, x, x);
2692 			}
2693 			break;
2694 		}
2695 		inst = GETWORD(val);
2696 		if (adr > first_adr && inst == last_inst) {
2697 			if (!dotted) {
2698 				printf(" ...\n");
2699 				dotted = 1;
2700 			}
2701 			continue;
2702 		}
2703 		dotted = 0;
2704 		last_inst = inst;
2705 		if (praddr)
2706 			printf(REG"  %.8x", adr, inst);
2707 		printf("\t");
2708 		dump_func(inst, adr);
2709 		printf("\n");
2710 	}
2711 	return adr - first_adr;
2712 }
2713 
2714 static int
ppc_inst_dump(unsigned long adr,long count,int praddr)2715 ppc_inst_dump(unsigned long adr, long count, int praddr)
2716 {
2717 	return generic_inst_dump(adr, count, praddr, print_insn_powerpc);
2718 }
2719 
2720 void
print_address(unsigned long addr)2721 print_address(unsigned long addr)
2722 {
2723 	xmon_print_symbol(addr, "\t# ", "");
2724 }
2725 
2726 void
dump_log_buf(void)2727 dump_log_buf(void)
2728 {
2729 	struct kmsg_dumper dumper = { .active = 1 };
2730 	unsigned char buf[128];
2731 	size_t len;
2732 
2733 	if (setjmp(bus_error_jmp) != 0) {
2734 		printf("Error dumping printk buffer!\n");
2735 		return;
2736 	}
2737 
2738 	catch_memory_errors = 1;
2739 	sync();
2740 
2741 	kmsg_dump_rewind_nolock(&dumper);
2742 	xmon_start_pagination();
2743 	while (kmsg_dump_get_line_nolock(&dumper, false, buf, sizeof(buf), &len)) {
2744 		buf[len] = '\0';
2745 		printf("%s", buf);
2746 	}
2747 	xmon_end_pagination();
2748 
2749 	sync();
2750 	/* wait a little while to see if we get a machine check */
2751 	__delay(200);
2752 	catch_memory_errors = 0;
2753 }
2754 
2755 #ifdef CONFIG_PPC_POWERNV
dump_opal_msglog(void)2756 static void dump_opal_msglog(void)
2757 {
2758 	unsigned char buf[128];
2759 	ssize_t res;
2760 	loff_t pos = 0;
2761 
2762 	if (!firmware_has_feature(FW_FEATURE_OPAL)) {
2763 		printf("Machine is not running OPAL firmware.\n");
2764 		return;
2765 	}
2766 
2767 	if (setjmp(bus_error_jmp) != 0) {
2768 		printf("Error dumping OPAL msglog!\n");
2769 		return;
2770 	}
2771 
2772 	catch_memory_errors = 1;
2773 	sync();
2774 
2775 	xmon_start_pagination();
2776 	while ((res = opal_msglog_copy(buf, pos, sizeof(buf) - 1))) {
2777 		if (res < 0) {
2778 			printf("Error dumping OPAL msglog! Error: %zd\n", res);
2779 			break;
2780 		}
2781 		buf[res] = '\0';
2782 		printf("%s", buf);
2783 		pos += res;
2784 	}
2785 	xmon_end_pagination();
2786 
2787 	sync();
2788 	/* wait a little while to see if we get a machine check */
2789 	__delay(200);
2790 	catch_memory_errors = 0;
2791 }
2792 #endif
2793 
2794 /*
2795  * Memory operations - move, set, print differences
2796  */
2797 static unsigned long mdest;		/* destination address */
2798 static unsigned long msrc;		/* source address */
2799 static unsigned long mval;		/* byte value to set memory to */
2800 static unsigned long mcount;		/* # bytes to affect */
2801 static unsigned long mdiffs;		/* max # differences to print */
2802 
2803 static void
memops(int cmd)2804 memops(int cmd)
2805 {
2806 	scanhex((void *)&mdest);
2807 	if( termch != '\n' )
2808 		termch = 0;
2809 	scanhex((void *)(cmd == 's'? &mval: &msrc));
2810 	if( termch != '\n' )
2811 		termch = 0;
2812 	scanhex((void *)&mcount);
2813 	switch( cmd ){
2814 	case 'm':
2815 		memmove((void *)mdest, (void *)msrc, mcount);
2816 		break;
2817 	case 's':
2818 		memset((void *)mdest, mval, mcount);
2819 		break;
2820 	case 'd':
2821 		if( termch != '\n' )
2822 			termch = 0;
2823 		scanhex((void *)&mdiffs);
2824 		memdiffs((unsigned char *)mdest, (unsigned char *)msrc, mcount, mdiffs);
2825 		break;
2826 	}
2827 }
2828 
2829 static void
memdiffs(unsigned char * p1,unsigned char * p2,unsigned nb,unsigned maxpr)2830 memdiffs(unsigned char *p1, unsigned char *p2, unsigned nb, unsigned maxpr)
2831 {
2832 	unsigned n, prt;
2833 
2834 	prt = 0;
2835 	for( n = nb; n > 0; --n )
2836 		if( *p1++ != *p2++ )
2837 			if( ++prt <= maxpr )
2838 				printf("%.16x %.2x # %.16x %.2x\n", p1 - 1,
2839 					p1[-1], p2 - 1, p2[-1]);
2840 	if( prt > maxpr )
2841 		printf("Total of %d differences\n", prt);
2842 }
2843 
2844 static unsigned mend;
2845 static unsigned mask;
2846 
2847 static void
memlocate(void)2848 memlocate(void)
2849 {
2850 	unsigned a, n;
2851 	unsigned char val[4];
2852 
2853 	last_cmd = "ml";
2854 	scanhex((void *)&mdest);
2855 	if (termch != '\n') {
2856 		termch = 0;
2857 		scanhex((void *)&mend);
2858 		if (termch != '\n') {
2859 			termch = 0;
2860 			scanhex((void *)&mval);
2861 			mask = ~0;
2862 			if (termch != '\n') termch = 0;
2863 			scanhex((void *)&mask);
2864 		}
2865 	}
2866 	n = 0;
2867 	for (a = mdest; a < mend; a += 4) {
2868 		if (mread(a, val, 4) == 4
2869 			&& ((GETWORD(val) ^ mval) & mask) == 0) {
2870 			printf("%.16x:  %.16x\n", a, GETWORD(val));
2871 			if (++n >= 10)
2872 				break;
2873 		}
2874 	}
2875 }
2876 
2877 static unsigned long mskip = 0x1000;
2878 static unsigned long mlim = 0xffffffff;
2879 
2880 static void
memzcan(void)2881 memzcan(void)
2882 {
2883 	unsigned char v;
2884 	unsigned a;
2885 	int ok, ook;
2886 
2887 	scanhex(&mdest);
2888 	if (termch != '\n') termch = 0;
2889 	scanhex(&mskip);
2890 	if (termch != '\n') termch = 0;
2891 	scanhex(&mlim);
2892 	ook = 0;
2893 	for (a = mdest; a < mlim; a += mskip) {
2894 		ok = mread(a, &v, 1);
2895 		if (ok && !ook) {
2896 			printf("%.8x .. ", a);
2897 		} else if (!ok && ook)
2898 			printf("%.8x\n", a - mskip);
2899 		ook = ok;
2900 		if (a + mskip < a)
2901 			break;
2902 	}
2903 	if (ook)
2904 		printf("%.8x\n", a - mskip);
2905 }
2906 
show_task(struct task_struct * tsk)2907 static void show_task(struct task_struct *tsk)
2908 {
2909 	char state;
2910 
2911 	/*
2912 	 * Cloned from kdb_task_state_char(), which is not entirely
2913 	 * appropriate for calling from xmon. This could be moved
2914 	 * to a common, generic, routine used by both.
2915 	 */
2916 	state = (tsk->state == 0) ? 'R' :
2917 		(tsk->state < 0) ? 'U' :
2918 		(tsk->state & TASK_UNINTERRUPTIBLE) ? 'D' :
2919 		(tsk->state & TASK_STOPPED) ? 'T' :
2920 		(tsk->state & TASK_TRACED) ? 'C' :
2921 		(tsk->exit_state & EXIT_ZOMBIE) ? 'Z' :
2922 		(tsk->exit_state & EXIT_DEAD) ? 'E' :
2923 		(tsk->state & TASK_INTERRUPTIBLE) ? 'S' : '?';
2924 
2925 	printf("%p %016lx %6d %6d %c %2d %s\n", tsk,
2926 		tsk->thread.ksp,
2927 		tsk->pid, tsk->parent->pid,
2928 		state, task_thread_info(tsk)->cpu,
2929 		tsk->comm);
2930 }
2931 
show_tasks(void)2932 static void show_tasks(void)
2933 {
2934 	unsigned long tskv;
2935 	struct task_struct *tsk = NULL;
2936 
2937 	printf("     task_struct     ->thread.ksp    PID   PPID S  P CMD\n");
2938 
2939 	if (scanhex(&tskv))
2940 		tsk = (struct task_struct *)tskv;
2941 
2942 	if (setjmp(bus_error_jmp) != 0) {
2943 		catch_memory_errors = 0;
2944 		printf("*** Error dumping task %p\n", tsk);
2945 		return;
2946 	}
2947 
2948 	catch_memory_errors = 1;
2949 	sync();
2950 
2951 	if (tsk)
2952 		show_task(tsk);
2953 	else
2954 		for_each_process(tsk)
2955 			show_task(tsk);
2956 
2957 	sync();
2958 	__delay(200);
2959 	catch_memory_errors = 0;
2960 }
2961 
proccall(void)2962 static void proccall(void)
2963 {
2964 	unsigned long args[8];
2965 	unsigned long ret;
2966 	int i;
2967 	typedef unsigned long (*callfunc_t)(unsigned long, unsigned long,
2968 			unsigned long, unsigned long, unsigned long,
2969 			unsigned long, unsigned long, unsigned long);
2970 	callfunc_t func;
2971 
2972 	if (!scanhex(&adrs))
2973 		return;
2974 	if (termch != '\n')
2975 		termch = 0;
2976 	for (i = 0; i < 8; ++i)
2977 		args[i] = 0;
2978 	for (i = 0; i < 8; ++i) {
2979 		if (!scanhex(&args[i]) || termch == '\n')
2980 			break;
2981 		termch = 0;
2982 	}
2983 	func = (callfunc_t) adrs;
2984 	ret = 0;
2985 	if (setjmp(bus_error_jmp) == 0) {
2986 		catch_memory_errors = 1;
2987 		sync();
2988 		ret = func(args[0], args[1], args[2], args[3],
2989 			   args[4], args[5], args[6], args[7]);
2990 		sync();
2991 		printf("return value is 0x%lx\n", ret);
2992 	} else {
2993 		printf("*** %x exception occurred\n", fault_except);
2994 	}
2995 	catch_memory_errors = 0;
2996 }
2997 
2998 /* Input scanning routines */
2999 int
skipbl(void)3000 skipbl(void)
3001 {
3002 	int c;
3003 
3004 	if( termch != 0 ){
3005 		c = termch;
3006 		termch = 0;
3007 	} else
3008 		c = inchar();
3009 	while( c == ' ' || c == '\t' )
3010 		c = inchar();
3011 	return c;
3012 }
3013 
3014 #define N_PTREGS	44
3015 static char *regnames[N_PTREGS] = {
3016 	"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3017 	"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
3018 	"r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
3019 	"r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
3020 	"pc", "msr", "or3", "ctr", "lr", "xer", "ccr",
3021 #ifdef CONFIG_PPC64
3022 	"softe",
3023 #else
3024 	"mq",
3025 #endif
3026 	"trap", "dar", "dsisr", "res"
3027 };
3028 
3029 int
scanhex(unsigned long * vp)3030 scanhex(unsigned long *vp)
3031 {
3032 	int c, d;
3033 	unsigned long v;
3034 
3035 	c = skipbl();
3036 	if (c == '%') {
3037 		/* parse register name */
3038 		char regname[8];
3039 		int i;
3040 
3041 		for (i = 0; i < sizeof(regname) - 1; ++i) {
3042 			c = inchar();
3043 			if (!isalnum(c)) {
3044 				termch = c;
3045 				break;
3046 			}
3047 			regname[i] = c;
3048 		}
3049 		regname[i] = 0;
3050 		for (i = 0; i < N_PTREGS; ++i) {
3051 			if (strcmp(regnames[i], regname) == 0) {
3052 				if (xmon_regs == NULL) {
3053 					printf("regs not available\n");
3054 					return 0;
3055 				}
3056 				*vp = ((unsigned long *)xmon_regs)[i];
3057 				return 1;
3058 			}
3059 		}
3060 		printf("invalid register name '%%%s'\n", regname);
3061 		return 0;
3062 	}
3063 
3064 	/* skip leading "0x" if any */
3065 
3066 	if (c == '0') {
3067 		c = inchar();
3068 		if (c == 'x') {
3069 			c = inchar();
3070 		} else {
3071 			d = hexdigit(c);
3072 			if (d == EOF) {
3073 				termch = c;
3074 				*vp = 0;
3075 				return 1;
3076 			}
3077 		}
3078 	} else if (c == '$') {
3079 		int i;
3080 		for (i=0; i<63; i++) {
3081 			c = inchar();
3082 			if (isspace(c) || c == '\0') {
3083 				termch = c;
3084 				break;
3085 			}
3086 			tmpstr[i] = c;
3087 		}
3088 		tmpstr[i++] = 0;
3089 		*vp = 0;
3090 		if (setjmp(bus_error_jmp) == 0) {
3091 			catch_memory_errors = 1;
3092 			sync();
3093 			*vp = kallsyms_lookup_name(tmpstr);
3094 			sync();
3095 		}
3096 		catch_memory_errors = 0;
3097 		if (!(*vp)) {
3098 			printf("unknown symbol '%s'\n", tmpstr);
3099 			return 0;
3100 		}
3101 		return 1;
3102 	}
3103 
3104 	d = hexdigit(c);
3105 	if (d == EOF) {
3106 		termch = c;
3107 		return 0;
3108 	}
3109 	v = 0;
3110 	do {
3111 		v = (v << 4) + d;
3112 		c = inchar();
3113 		d = hexdigit(c);
3114 	} while (d != EOF);
3115 	termch = c;
3116 	*vp = v;
3117 	return 1;
3118 }
3119 
3120 static void
scannl(void)3121 scannl(void)
3122 {
3123 	int c;
3124 
3125 	c = termch;
3126 	termch = 0;
3127 	while( c != '\n' )
3128 		c = inchar();
3129 }
3130 
hexdigit(int c)3131 static int hexdigit(int c)
3132 {
3133 	if( '0' <= c && c <= '9' )
3134 		return c - '0';
3135 	if( 'A' <= c && c <= 'F' )
3136 		return c - ('A' - 10);
3137 	if( 'a' <= c && c <= 'f' )
3138 		return c - ('a' - 10);
3139 	return EOF;
3140 }
3141 
3142 void
getstring(char * s,int size)3143 getstring(char *s, int size)
3144 {
3145 	int c;
3146 
3147 	c = skipbl();
3148 	do {
3149 		if( size > 1 ){
3150 			*s++ = c;
3151 			--size;
3152 		}
3153 		c = inchar();
3154 	} while( c != ' ' && c != '\t' && c != '\n' );
3155 	termch = c;
3156 	*s = 0;
3157 }
3158 
3159 static char line[256];
3160 static char *lineptr;
3161 
3162 static void
flush_input(void)3163 flush_input(void)
3164 {
3165 	lineptr = NULL;
3166 }
3167 
3168 static int
inchar(void)3169 inchar(void)
3170 {
3171 	if (lineptr == NULL || *lineptr == 0) {
3172 		if (xmon_gets(line, sizeof(line)) == NULL) {
3173 			lineptr = NULL;
3174 			return EOF;
3175 		}
3176 		lineptr = line;
3177 	}
3178 	return *lineptr++;
3179 }
3180 
3181 static void
take_input(char * str)3182 take_input(char *str)
3183 {
3184 	lineptr = str;
3185 }
3186 
3187 
3188 static void
symbol_lookup(void)3189 symbol_lookup(void)
3190 {
3191 	int type = inchar();
3192 	unsigned long addr;
3193 	static char tmp[64];
3194 
3195 	switch (type) {
3196 	case 'a':
3197 		if (scanhex(&addr))
3198 			xmon_print_symbol(addr, ": ", "\n");
3199 		termch = 0;
3200 		break;
3201 	case 's':
3202 		getstring(tmp, 64);
3203 		if (setjmp(bus_error_jmp) == 0) {
3204 			catch_memory_errors = 1;
3205 			sync();
3206 			addr = kallsyms_lookup_name(tmp);
3207 			if (addr)
3208 				printf("%s: %lx\n", tmp, addr);
3209 			else
3210 				printf("Symbol '%s' not found.\n", tmp);
3211 			sync();
3212 		}
3213 		catch_memory_errors = 0;
3214 		termch = 0;
3215 		break;
3216 	}
3217 }
3218 
3219 
3220 /* Print an address in numeric and symbolic form (if possible) */
xmon_print_symbol(unsigned long address,const char * mid,const char * after)3221 static void xmon_print_symbol(unsigned long address, const char *mid,
3222 			      const char *after)
3223 {
3224 	char *modname;
3225 	const char *name = NULL;
3226 	unsigned long offset, size;
3227 
3228 	printf(REG, address);
3229 	if (setjmp(bus_error_jmp) == 0) {
3230 		catch_memory_errors = 1;
3231 		sync();
3232 		name = kallsyms_lookup(address, &size, &offset, &modname,
3233 				       tmpstr);
3234 		sync();
3235 		/* wait a little while to see if we get a machine check */
3236 		__delay(200);
3237 	}
3238 
3239 	catch_memory_errors = 0;
3240 
3241 	if (name) {
3242 		printf("%s%s+%#lx/%#lx", mid, name, offset, size);
3243 		if (modname)
3244 			printf(" [%s]", modname);
3245 	}
3246 	printf("%s", after);
3247 }
3248 
3249 #ifdef CONFIG_PPC_STD_MMU_64
dump_segments(void)3250 void dump_segments(void)
3251 {
3252 	int i;
3253 	unsigned long esid,vsid;
3254 	unsigned long llp;
3255 
3256 	printf("SLB contents of cpu 0x%x\n", smp_processor_id());
3257 
3258 	for (i = 0; i < mmu_slb_size; i++) {
3259 		asm volatile("slbmfee  %0,%1" : "=r" (esid) : "r" (i));
3260 		asm volatile("slbmfev  %0,%1" : "=r" (vsid) : "r" (i));
3261 
3262 		if (!esid && !vsid)
3263 			continue;
3264 
3265 		printf("%02d %016lx %016lx", i, esid, vsid);
3266 
3267 		if (!(esid & SLB_ESID_V)) {
3268 			printf("\n");
3269 			continue;
3270 		}
3271 
3272 		llp = vsid & SLB_VSID_LLP;
3273 		if (vsid & SLB_VSID_B_1T) {
3274 			printf("  1T  ESID=%9lx  VSID=%13lx LLP:%3lx \n",
3275 				GET_ESID_1T(esid),
3276 				(vsid & ~SLB_VSID_B) >> SLB_VSID_SHIFT_1T,
3277 				llp);
3278 		} else {
3279 			printf(" 256M ESID=%9lx  VSID=%13lx LLP:%3lx \n",
3280 				GET_ESID(esid),
3281 				(vsid & ~SLB_VSID_B) >> SLB_VSID_SHIFT,
3282 				llp);
3283 		}
3284 	}
3285 }
3286 #endif
3287 
3288 #ifdef CONFIG_PPC_STD_MMU_32
dump_segments(void)3289 void dump_segments(void)
3290 {
3291 	int i;
3292 
3293 	printf("sr0-15 =");
3294 	for (i = 0; i < 16; ++i)
3295 		printf(" %x", mfsrin(i << 28));
3296 	printf("\n");
3297 }
3298 #endif
3299 
3300 #ifdef CONFIG_44x
dump_tlb_44x(void)3301 static void dump_tlb_44x(void)
3302 {
3303 	int i;
3304 
3305 	for (i = 0; i < PPC44x_TLB_SIZE; i++) {
3306 		unsigned long w0,w1,w2;
3307 		asm volatile("tlbre  %0,%1,0" : "=r" (w0) : "r" (i));
3308 		asm volatile("tlbre  %0,%1,1" : "=r" (w1) : "r" (i));
3309 		asm volatile("tlbre  %0,%1,2" : "=r" (w2) : "r" (i));
3310 		printf("[%02x] %08x %08x %08x ", i, w0, w1, w2);
3311 		if (w0 & PPC44x_TLB_VALID) {
3312 			printf("V %08x -> %01x%08x %c%c%c%c%c",
3313 			       w0 & PPC44x_TLB_EPN_MASK,
3314 			       w1 & PPC44x_TLB_ERPN_MASK,
3315 			       w1 & PPC44x_TLB_RPN_MASK,
3316 			       (w2 & PPC44x_TLB_W) ? 'W' : 'w',
3317 			       (w2 & PPC44x_TLB_I) ? 'I' : 'i',
3318 			       (w2 & PPC44x_TLB_M) ? 'M' : 'm',
3319 			       (w2 & PPC44x_TLB_G) ? 'G' : 'g',
3320 			       (w2 & PPC44x_TLB_E) ? 'E' : 'e');
3321 		}
3322 		printf("\n");
3323 	}
3324 }
3325 #endif /* CONFIG_44x */
3326 
3327 #ifdef CONFIG_PPC_BOOK3E
dump_tlb_book3e(void)3328 static void dump_tlb_book3e(void)
3329 {
3330 	u32 mmucfg, pidmask, lpidmask;
3331 	u64 ramask;
3332 	int i, tlb, ntlbs, pidsz, lpidsz, rasz, lrat = 0;
3333 	int mmu_version;
3334 	static const char *pgsz_names[] = {
3335 		"  1K",
3336 		"  2K",
3337 		"  4K",
3338 		"  8K",
3339 		" 16K",
3340 		" 32K",
3341 		" 64K",
3342 		"128K",
3343 		"256K",
3344 		"512K",
3345 		"  1M",
3346 		"  2M",
3347 		"  4M",
3348 		"  8M",
3349 		" 16M",
3350 		" 32M",
3351 		" 64M",
3352 		"128M",
3353 		"256M",
3354 		"512M",
3355 		"  1G",
3356 		"  2G",
3357 		"  4G",
3358 		"  8G",
3359 		" 16G",
3360 		" 32G",
3361 		" 64G",
3362 		"128G",
3363 		"256G",
3364 		"512G",
3365 		"  1T",
3366 		"  2T",
3367 	};
3368 
3369 	/* Gather some infos about the MMU */
3370 	mmucfg = mfspr(SPRN_MMUCFG);
3371 	mmu_version = (mmucfg & 3) + 1;
3372 	ntlbs = ((mmucfg >> 2) & 3) + 1;
3373 	pidsz = ((mmucfg >> 6) & 0x1f) + 1;
3374 	lpidsz = (mmucfg >> 24) & 0xf;
3375 	rasz = (mmucfg >> 16) & 0x7f;
3376 	if ((mmu_version > 1) && (mmucfg & 0x10000))
3377 		lrat = 1;
3378 	printf("Book3E MMU MAV=%d.0,%d TLBs,%d-bit PID,%d-bit LPID,%d-bit RA\n",
3379 	       mmu_version, ntlbs, pidsz, lpidsz, rasz);
3380 	pidmask = (1ul << pidsz) - 1;
3381 	lpidmask = (1ul << lpidsz) - 1;
3382 	ramask = (1ull << rasz) - 1;
3383 
3384 	for (tlb = 0; tlb < ntlbs; tlb++) {
3385 		u32 tlbcfg;
3386 		int nent, assoc, new_cc = 1;
3387 		printf("TLB %d:\n------\n", tlb);
3388 		switch(tlb) {
3389 		case 0:
3390 			tlbcfg = mfspr(SPRN_TLB0CFG);
3391 			break;
3392 		case 1:
3393 			tlbcfg = mfspr(SPRN_TLB1CFG);
3394 			break;
3395 		case 2:
3396 			tlbcfg = mfspr(SPRN_TLB2CFG);
3397 			break;
3398 		case 3:
3399 			tlbcfg = mfspr(SPRN_TLB3CFG);
3400 			break;
3401 		default:
3402 			printf("Unsupported TLB number !\n");
3403 			continue;
3404 		}
3405 		nent = tlbcfg & 0xfff;
3406 		assoc = (tlbcfg >> 24) & 0xff;
3407 		for (i = 0; i < nent; i++) {
3408 			u32 mas0 = MAS0_TLBSEL(tlb);
3409 			u32 mas1 = MAS1_TSIZE(BOOK3E_PAGESZ_4K);
3410 			u64 mas2 = 0;
3411 			u64 mas7_mas3;
3412 			int esel = i, cc = i;
3413 
3414 			if (assoc != 0) {
3415 				cc = i / assoc;
3416 				esel = i % assoc;
3417 				mas2 = cc * 0x1000;
3418 			}
3419 
3420 			mas0 |= MAS0_ESEL(esel);
3421 			mtspr(SPRN_MAS0, mas0);
3422 			mtspr(SPRN_MAS1, mas1);
3423 			mtspr(SPRN_MAS2, mas2);
3424 			asm volatile("tlbre  0,0,0" : : : "memory");
3425 			mas1 = mfspr(SPRN_MAS1);
3426 			mas2 = mfspr(SPRN_MAS2);
3427 			mas7_mas3 = mfspr(SPRN_MAS7_MAS3);
3428 			if (assoc && (i % assoc) == 0)
3429 				new_cc = 1;
3430 			if (!(mas1 & MAS1_VALID))
3431 				continue;
3432 			if (assoc == 0)
3433 				printf("%04x- ", i);
3434 			else if (new_cc)
3435 				printf("%04x-%c", cc, 'A' + esel);
3436 			else
3437 				printf("    |%c", 'A' + esel);
3438 			new_cc = 0;
3439 			printf(" %016llx %04x %s %c%c AS%c",
3440 			       mas2 & ~0x3ffull,
3441 			       (mas1 >> 16) & 0x3fff,
3442 			       pgsz_names[(mas1 >> 7) & 0x1f],
3443 			       mas1 & MAS1_IND ? 'I' : ' ',
3444 			       mas1 & MAS1_IPROT ? 'P' : ' ',
3445 			       mas1 & MAS1_TS ? '1' : '0');
3446 			printf(" %c%c%c%c%c%c%c",
3447 			       mas2 & MAS2_X0 ? 'a' : ' ',
3448 			       mas2 & MAS2_X1 ? 'v' : ' ',
3449 			       mas2 & MAS2_W  ? 'w' : ' ',
3450 			       mas2 & MAS2_I  ? 'i' : ' ',
3451 			       mas2 & MAS2_M  ? 'm' : ' ',
3452 			       mas2 & MAS2_G  ? 'g' : ' ',
3453 			       mas2 & MAS2_E  ? 'e' : ' ');
3454 			printf(" %016llx", mas7_mas3 & ramask & ~0x7ffull);
3455 			if (mas1 & MAS1_IND)
3456 				printf(" %s\n",
3457 				       pgsz_names[(mas7_mas3 >> 1) & 0x1f]);
3458 			else
3459 				printf(" U%c%c%c S%c%c%c\n",
3460 				       mas7_mas3 & MAS3_UX ? 'x' : ' ',
3461 				       mas7_mas3 & MAS3_UW ? 'w' : ' ',
3462 				       mas7_mas3 & MAS3_UR ? 'r' : ' ',
3463 				       mas7_mas3 & MAS3_SX ? 'x' : ' ',
3464 				       mas7_mas3 & MAS3_SW ? 'w' : ' ',
3465 				       mas7_mas3 & MAS3_SR ? 'r' : ' ');
3466 		}
3467 	}
3468 }
3469 #endif /* CONFIG_PPC_BOOK3E */
3470 
xmon_init(int enable)3471 static void xmon_init(int enable)
3472 {
3473 	if (enable) {
3474 		__debugger = xmon;
3475 		__debugger_ipi = xmon_ipi;
3476 		__debugger_bpt = xmon_bpt;
3477 		__debugger_sstep = xmon_sstep;
3478 		__debugger_iabr_match = xmon_iabr_match;
3479 		__debugger_break_match = xmon_break_match;
3480 		__debugger_fault_handler = xmon_fault_handler;
3481 
3482 #ifdef CONFIG_PPC_PSERIES
3483 		/*
3484 		 * Get the token here to avoid trying to get a lock
3485 		 * during the crash, causing a deadlock.
3486 		 */
3487 		set_indicator_token = rtas_token("set-indicator");
3488 #endif
3489 	} else {
3490 		__debugger = NULL;
3491 		__debugger_ipi = NULL;
3492 		__debugger_bpt = NULL;
3493 		__debugger_sstep = NULL;
3494 		__debugger_iabr_match = NULL;
3495 		__debugger_break_match = NULL;
3496 		__debugger_fault_handler = NULL;
3497 	}
3498 }
3499 
3500 #ifdef CONFIG_MAGIC_SYSRQ
sysrq_handle_xmon(int key)3501 static void sysrq_handle_xmon(int key)
3502 {
3503 	/* ensure xmon is enabled */
3504 	xmon_init(1);
3505 	debugger(get_irq_regs());
3506 	if (!xmon_on)
3507 		xmon_init(0);
3508 }
3509 
3510 static struct sysrq_key_op sysrq_xmon_op = {
3511 	.handler =	sysrq_handle_xmon,
3512 	.help_msg =	"xmon(x)",
3513 	.action_msg =	"Entering xmon",
3514 };
3515 
setup_xmon_sysrq(void)3516 static int __init setup_xmon_sysrq(void)
3517 {
3518 	register_sysrq_key('x', &sysrq_xmon_op);
3519 	return 0;
3520 }
3521 device_initcall(setup_xmon_sysrq);
3522 #endif /* CONFIG_MAGIC_SYSRQ */
3523 
3524 #ifdef CONFIG_DEBUG_FS
xmon_dbgfs_set(void * data,u64 val)3525 static int xmon_dbgfs_set(void *data, u64 val)
3526 {
3527 	xmon_on = !!val;
3528 	xmon_init(xmon_on);
3529 
3530 	return 0;
3531 }
3532 
xmon_dbgfs_get(void * data,u64 * val)3533 static int xmon_dbgfs_get(void *data, u64 *val)
3534 {
3535 	*val = xmon_on;
3536 	return 0;
3537 }
3538 
3539 DEFINE_SIMPLE_ATTRIBUTE(xmon_dbgfs_ops, xmon_dbgfs_get,
3540 			xmon_dbgfs_set, "%llu\n");
3541 
setup_xmon_dbgfs(void)3542 static int __init setup_xmon_dbgfs(void)
3543 {
3544 	debugfs_create_file("xmon", 0600, powerpc_debugfs_root, NULL,
3545 				&xmon_dbgfs_ops);
3546 	return 0;
3547 }
3548 device_initcall(setup_xmon_dbgfs);
3549 #endif /* CONFIG_DEBUG_FS */
3550 
3551 static int xmon_early __initdata;
3552 
early_parse_xmon(char * p)3553 static int __init early_parse_xmon(char *p)
3554 {
3555 	if (!p || strncmp(p, "early", 5) == 0) {
3556 		/* just "xmon" is equivalent to "xmon=early" */
3557 		xmon_init(1);
3558 		xmon_early = 1;
3559 		xmon_on = 1;
3560 	} else if (strncmp(p, "on", 2) == 0) {
3561 		xmon_init(1);
3562 		xmon_on = 1;
3563 	} else if (strncmp(p, "off", 3) == 0)
3564 		xmon_on = 0;
3565 	else
3566 		return 1;
3567 
3568 	return 0;
3569 }
3570 early_param("xmon", early_parse_xmon);
3571 
xmon_setup(void)3572 void __init xmon_setup(void)
3573 {
3574 	if (xmon_on)
3575 		xmon_init(1);
3576 	if (xmon_early)
3577 		debugger(NULL);
3578 }
3579 
3580 #ifdef CONFIG_SPU_BASE
3581 
3582 struct spu_info {
3583 	struct spu *spu;
3584 	u64 saved_mfc_sr1_RW;
3585 	u32 saved_spu_runcntl_RW;
3586 	unsigned long dump_addr;
3587 	u8 stopped_ok;
3588 };
3589 
3590 #define XMON_NUM_SPUS	16	/* Enough for current hardware */
3591 
3592 static struct spu_info spu_info[XMON_NUM_SPUS];
3593 
xmon_register_spus(struct list_head * list)3594 void xmon_register_spus(struct list_head *list)
3595 {
3596 	struct spu *spu;
3597 
3598 	list_for_each_entry(spu, list, full_list) {
3599 		if (spu->number >= XMON_NUM_SPUS) {
3600 			WARN_ON(1);
3601 			continue;
3602 		}
3603 
3604 		spu_info[spu->number].spu = spu;
3605 		spu_info[spu->number].stopped_ok = 0;
3606 		spu_info[spu->number].dump_addr = (unsigned long)
3607 				spu_info[spu->number].spu->local_store;
3608 	}
3609 }
3610 
stop_spus(void)3611 static void stop_spus(void)
3612 {
3613 	struct spu *spu;
3614 	int i;
3615 	u64 tmp;
3616 
3617 	for (i = 0; i < XMON_NUM_SPUS; i++) {
3618 		if (!spu_info[i].spu)
3619 			continue;
3620 
3621 		if (setjmp(bus_error_jmp) == 0) {
3622 			catch_memory_errors = 1;
3623 			sync();
3624 
3625 			spu = spu_info[i].spu;
3626 
3627 			spu_info[i].saved_spu_runcntl_RW =
3628 				in_be32(&spu->problem->spu_runcntl_RW);
3629 
3630 			tmp = spu_mfc_sr1_get(spu);
3631 			spu_info[i].saved_mfc_sr1_RW = tmp;
3632 
3633 			tmp &= ~MFC_STATE1_MASTER_RUN_CONTROL_MASK;
3634 			spu_mfc_sr1_set(spu, tmp);
3635 
3636 			sync();
3637 			__delay(200);
3638 
3639 			spu_info[i].stopped_ok = 1;
3640 
3641 			printf("Stopped spu %.2d (was %s)\n", i,
3642 					spu_info[i].saved_spu_runcntl_RW ?
3643 					"running" : "stopped");
3644 		} else {
3645 			catch_memory_errors = 0;
3646 			printf("*** Error stopping spu %.2d\n", i);
3647 		}
3648 		catch_memory_errors = 0;
3649 	}
3650 }
3651 
restart_spus(void)3652 static void restart_spus(void)
3653 {
3654 	struct spu *spu;
3655 	int i;
3656 
3657 	for (i = 0; i < XMON_NUM_SPUS; i++) {
3658 		if (!spu_info[i].spu)
3659 			continue;
3660 
3661 		if (!spu_info[i].stopped_ok) {
3662 			printf("*** Error, spu %d was not successfully stopped"
3663 					", not restarting\n", i);
3664 			continue;
3665 		}
3666 
3667 		if (setjmp(bus_error_jmp) == 0) {
3668 			catch_memory_errors = 1;
3669 			sync();
3670 
3671 			spu = spu_info[i].spu;
3672 			spu_mfc_sr1_set(spu, spu_info[i].saved_mfc_sr1_RW);
3673 			out_be32(&spu->problem->spu_runcntl_RW,
3674 					spu_info[i].saved_spu_runcntl_RW);
3675 
3676 			sync();
3677 			__delay(200);
3678 
3679 			printf("Restarted spu %.2d\n", i);
3680 		} else {
3681 			catch_memory_errors = 0;
3682 			printf("*** Error restarting spu %.2d\n", i);
3683 		}
3684 		catch_memory_errors = 0;
3685 	}
3686 }
3687 
3688 #define DUMP_WIDTH	23
3689 #define DUMP_VALUE(format, field, value)				\
3690 do {									\
3691 	if (setjmp(bus_error_jmp) == 0) {				\
3692 		catch_memory_errors = 1;				\
3693 		sync();							\
3694 		printf("  %-*s = "format"\n", DUMP_WIDTH,		\
3695 				#field, value);				\
3696 		sync();							\
3697 		__delay(200);						\
3698 	} else {							\
3699 		catch_memory_errors = 0;				\
3700 		printf("  %-*s = *** Error reading field.\n",		\
3701 					DUMP_WIDTH, #field);		\
3702 	}								\
3703 	catch_memory_errors = 0;					\
3704 } while (0)
3705 
3706 #define DUMP_FIELD(obj, format, field)	\
3707 	DUMP_VALUE(format, field, obj->field)
3708 
dump_spu_fields(struct spu * spu)3709 static void dump_spu_fields(struct spu *spu)
3710 {
3711 	printf("Dumping spu fields at address %p:\n", spu);
3712 
3713 	DUMP_FIELD(spu, "0x%x", number);
3714 	DUMP_FIELD(spu, "%s", name);
3715 	DUMP_FIELD(spu, "0x%lx", local_store_phys);
3716 	DUMP_FIELD(spu, "0x%p", local_store);
3717 	DUMP_FIELD(spu, "0x%lx", ls_size);
3718 	DUMP_FIELD(spu, "0x%x", node);
3719 	DUMP_FIELD(spu, "0x%lx", flags);
3720 	DUMP_FIELD(spu, "%d", class_0_pending);
3721 	DUMP_FIELD(spu, "0x%lx", class_0_dar);
3722 	DUMP_FIELD(spu, "0x%lx", class_1_dar);
3723 	DUMP_FIELD(spu, "0x%lx", class_1_dsisr);
3724 	DUMP_FIELD(spu, "0x%lx", irqs[0]);
3725 	DUMP_FIELD(spu, "0x%lx", irqs[1]);
3726 	DUMP_FIELD(spu, "0x%lx", irqs[2]);
3727 	DUMP_FIELD(spu, "0x%x", slb_replace);
3728 	DUMP_FIELD(spu, "%d", pid);
3729 	DUMP_FIELD(spu, "0x%p", mm);
3730 	DUMP_FIELD(spu, "0x%p", ctx);
3731 	DUMP_FIELD(spu, "0x%p", rq);
3732 	DUMP_FIELD(spu, "0x%p", timestamp);
3733 	DUMP_FIELD(spu, "0x%lx", problem_phys);
3734 	DUMP_FIELD(spu, "0x%p", problem);
3735 	DUMP_VALUE("0x%x", problem->spu_runcntl_RW,
3736 			in_be32(&spu->problem->spu_runcntl_RW));
3737 	DUMP_VALUE("0x%x", problem->spu_status_R,
3738 			in_be32(&spu->problem->spu_status_R));
3739 	DUMP_VALUE("0x%x", problem->spu_npc_RW,
3740 			in_be32(&spu->problem->spu_npc_RW));
3741 	DUMP_FIELD(spu, "0x%p", priv2);
3742 	DUMP_FIELD(spu, "0x%p", pdata);
3743 }
3744 
3745 int
spu_inst_dump(unsigned long adr,long count,int praddr)3746 spu_inst_dump(unsigned long adr, long count, int praddr)
3747 {
3748 	return generic_inst_dump(adr, count, praddr, print_insn_spu);
3749 }
3750 
dump_spu_ls(unsigned long num,int subcmd)3751 static void dump_spu_ls(unsigned long num, int subcmd)
3752 {
3753 	unsigned long offset, addr, ls_addr;
3754 
3755 	if (setjmp(bus_error_jmp) == 0) {
3756 		catch_memory_errors = 1;
3757 		sync();
3758 		ls_addr = (unsigned long)spu_info[num].spu->local_store;
3759 		sync();
3760 		__delay(200);
3761 	} else {
3762 		catch_memory_errors = 0;
3763 		printf("*** Error: accessing spu info for spu %d\n", num);
3764 		return;
3765 	}
3766 	catch_memory_errors = 0;
3767 
3768 	if (scanhex(&offset))
3769 		addr = ls_addr + offset;
3770 	else
3771 		addr = spu_info[num].dump_addr;
3772 
3773 	if (addr >= ls_addr + LS_SIZE) {
3774 		printf("*** Error: address outside of local store\n");
3775 		return;
3776 	}
3777 
3778 	switch (subcmd) {
3779 	case 'i':
3780 		addr += spu_inst_dump(addr, 16, 1);
3781 		last_cmd = "sdi\n";
3782 		break;
3783 	default:
3784 		prdump(addr, 64);
3785 		addr += 64;
3786 		last_cmd = "sd\n";
3787 		break;
3788 	}
3789 
3790 	spu_info[num].dump_addr = addr;
3791 }
3792 
do_spu_cmd(void)3793 static int do_spu_cmd(void)
3794 {
3795 	static unsigned long num = 0;
3796 	int cmd, subcmd = 0;
3797 
3798 	cmd = inchar();
3799 	switch (cmd) {
3800 	case 's':
3801 		stop_spus();
3802 		break;
3803 	case 'r':
3804 		restart_spus();
3805 		break;
3806 	case 'd':
3807 		subcmd = inchar();
3808 		if (isxdigit(subcmd) || subcmd == '\n')
3809 			termch = subcmd;
3810 	case 'f':
3811 		scanhex(&num);
3812 		if (num >= XMON_NUM_SPUS || !spu_info[num].spu) {
3813 			printf("*** Error: invalid spu number\n");
3814 			return 0;
3815 		}
3816 
3817 		switch (cmd) {
3818 		case 'f':
3819 			dump_spu_fields(spu_info[num].spu);
3820 			break;
3821 		default:
3822 			dump_spu_ls(num, subcmd);
3823 			break;
3824 		}
3825 
3826 		break;
3827 	default:
3828 		return -1;
3829 	}
3830 
3831 	return 0;
3832 }
3833 #else /* ! CONFIG_SPU_BASE */
do_spu_cmd(void)3834 static int do_spu_cmd(void)
3835 {
3836 	return -1;
3837 }
3838 #endif
3839