1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __ALPHA_PCI_H
3 #define __ALPHA_PCI_H
4
5 #ifdef __KERNEL__
6
7 #include <linux/spinlock.h>
8 #include <linux/dma-mapping.h>
9 #include <linux/scatterlist.h>
10 #include <asm/machvec.h>
11
12 /*
13 * The following structure is used to manage multiple PCI busses.
14 */
15
16 struct pci_dev;
17 struct pci_bus;
18 struct resource;
19 struct pci_iommu_arena;
20 struct page;
21
22 /* A controller. Used to manage multiple PCI busses. */
23
24 struct pci_controller {
25 struct pci_controller *next;
26 struct pci_bus *bus;
27 struct resource *io_space;
28 struct resource *mem_space;
29
30 /* The following are for reporting to userland. The invariant is
31 that if we report a BWX-capable dense memory, we do not report
32 a sparse memory at all, even if it exists. */
33 unsigned long sparse_mem_base;
34 unsigned long dense_mem_base;
35 unsigned long sparse_io_base;
36 unsigned long dense_io_base;
37
38 /* This one's for the kernel only. It's in KSEG somewhere. */
39 unsigned long config_space_base;
40
41 unsigned int index;
42 /* For compatibility with current (as of July 2003) pciutils
43 and XFree86. Eventually will be removed. */
44 unsigned int need_domain_info;
45
46 struct pci_iommu_arena *sg_pci;
47 struct pci_iommu_arena *sg_isa;
48
49 void *sysdata;
50 };
51
52 /* Override the logic in pci_scan_bus for skipping already-configured
53 bus numbers. */
54
55 #define pcibios_assign_all_busses() 1
56
57 #define PCIBIOS_MIN_IO alpha_mv.min_io_address
58 #define PCIBIOS_MIN_MEM alpha_mv.min_mem_address
59
60 extern void pcibios_set_master(struct pci_dev *dev);
61
62 /* IOMMU controls. */
63
64 /* The PCI address space does not equal the physical memory address space.
65 The networking and block device layers use this boolean for bounce buffer
66 decisions. */
67 #define PCI_DMA_BUS_IS_PHYS 0
68
69 /* TODO: integrate with include/asm-generic/pci.h ? */
pci_get_legacy_ide_irq(struct pci_dev * dev,int channel)70 static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
71 {
72 return channel ? 15 : 14;
73 }
74
75 #define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
76
pci_proc_domain(struct pci_bus * bus)77 static inline int pci_proc_domain(struct pci_bus *bus)
78 {
79 struct pci_controller *hose = bus->sysdata;
80 return hose->need_domain_info;
81 }
82
83 #endif /* __KERNEL__ */
84
85 /* Values for the `which' argument to sys_pciconfig_iobase. */
86 #define IOBASE_HOSE 0
87 #define IOBASE_SPARSE_MEM 1
88 #define IOBASE_DENSE_MEM 2
89 #define IOBASE_SPARSE_IO 3
90 #define IOBASE_DENSE_IO 4
91 #define IOBASE_ROOT_BUS 5
92 #define IOBASE_FROM_HOSE 0x10000
93
94 extern struct pci_dev *isa_bridge;
95
96 extern int pci_legacy_read(struct pci_bus *bus, loff_t port, u32 *val,
97 size_t count);
98 extern int pci_legacy_write(struct pci_bus *bus, loff_t port, u32 val,
99 size_t count);
100 extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
101 struct vm_area_struct *vma,
102 enum pci_mmap_state mmap_state);
103 extern void pci_adjust_legacy_attr(struct pci_bus *bus,
104 enum pci_mmap_state mmap_type);
105 #define HAVE_PCI_LEGACY 1
106
107 extern int pci_create_resource_files(struct pci_dev *dev);
108 extern void pci_remove_resource_files(struct pci_dev *dev);
109
110 #endif /* __ALPHA_PCI_H */
111