1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Check for extended topology enumeration cpuid leaf 0xb and if it
4 * exists, use it for populating initial_apicid and cpu topology
5 * detection.
6 */
7
8 #include <linux/cpu.h>
9 #include <asm/apic.h>
10 #include <asm/pat.h>
11 #include <asm/processor.h>
12
13 /* leaf 0xb SMT level */
14 #define SMT_LEVEL 0
15
16 /* leaf 0xb sub-leaf types */
17 #define INVALID_TYPE 0
18 #define SMT_TYPE 1
19 #define CORE_TYPE 2
20
21 #define LEAFB_SUBTYPE(ecx) (((ecx) >> 8) & 0xff)
22 #define BITS_SHIFT_NEXT_LEVEL(eax) ((eax) & 0x1f)
23 #define LEVEL_MAX_SIBLINGS(ebx) ((ebx) & 0xffff)
24
25 /*
26 * Check for extended topology enumeration cpuid leaf 0xb and if it
27 * exists, use it for populating initial_apicid and cpu topology
28 * detection.
29 */
detect_extended_topology_early(struct cpuinfo_x86 * c)30 int detect_extended_topology_early(struct cpuinfo_x86 *c)
31 {
32 #ifdef CONFIG_SMP
33 unsigned int eax, ebx, ecx, edx;
34
35 if (c->cpuid_level < 0xb)
36 return -1;
37
38 cpuid_count(0xb, SMT_LEVEL, &eax, &ebx, &ecx, &edx);
39
40 /*
41 * check if the cpuid leaf 0xb is actually implemented.
42 */
43 if (ebx == 0 || (LEAFB_SUBTYPE(ecx) != SMT_TYPE))
44 return -1;
45
46 set_cpu_cap(c, X86_FEATURE_XTOPOLOGY);
47
48 /*
49 * initial apic id, which also represents 32-bit extended x2apic id.
50 */
51 c->initial_apicid = edx;
52 smp_num_siblings = LEVEL_MAX_SIBLINGS(ebx);
53 #endif
54 return 0;
55 }
56
57 /*
58 * Check for extended topology enumeration cpuid leaf 0xb and if it
59 * exists, use it for populating initial_apicid and cpu topology
60 * detection.
61 */
detect_extended_topology(struct cpuinfo_x86 * c)62 void detect_extended_topology(struct cpuinfo_x86 *c)
63 {
64 #ifdef CONFIG_SMP
65 unsigned int eax, ebx, ecx, edx, sub_index;
66 unsigned int ht_mask_width, core_plus_mask_width;
67 unsigned int core_select_mask, core_level_siblings;
68
69 if (detect_extended_topology_early(c) < 0)
70 return;
71
72 /*
73 * Populate HT related information from sub-leaf level 0.
74 */
75 cpuid_count(0xb, SMT_LEVEL, &eax, &ebx, &ecx, &edx);
76 core_level_siblings = smp_num_siblings = LEVEL_MAX_SIBLINGS(ebx);
77 core_plus_mask_width = ht_mask_width = BITS_SHIFT_NEXT_LEVEL(eax);
78
79 sub_index = 1;
80 do {
81 cpuid_count(0xb, sub_index, &eax, &ebx, &ecx, &edx);
82
83 /*
84 * Check for the Core type in the implemented sub leaves.
85 */
86 if (LEAFB_SUBTYPE(ecx) == CORE_TYPE) {
87 core_level_siblings = LEVEL_MAX_SIBLINGS(ebx);
88 core_plus_mask_width = BITS_SHIFT_NEXT_LEVEL(eax);
89 break;
90 }
91
92 sub_index++;
93 } while (LEAFB_SUBTYPE(ecx) != INVALID_TYPE);
94
95 core_select_mask = (~(-1 << core_plus_mask_width)) >> ht_mask_width;
96
97 c->cpu_core_id = apic->phys_pkg_id(c->initial_apicid, ht_mask_width)
98 & core_select_mask;
99 c->phys_proc_id = apic->phys_pkg_id(c->initial_apicid, core_plus_mask_width);
100 /*
101 * Reinit the apicid, now that we have extended initial_apicid.
102 */
103 c->apicid = apic->phys_pkg_id(c->initial_apicid, 0);
104
105 c->x86_max_cores = (core_level_siblings / smp_num_siblings);
106 #endif
107 }
108