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1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright (C) 2004 IBM
4  *
5  * Implements the generic device dma API for powerpc.
6  * the pci and vio busses
7  */
8 #ifndef _ASM_DMA_MAPPING_H
9 #define _ASM_DMA_MAPPING_H
10 #ifdef __KERNEL__
11 
12 #include <linux/types.h>
13 #include <linux/cache.h>
14 /* need struct page definitions */
15 #include <linux/mm.h>
16 #include <linux/scatterlist.h>
17 #include <linux/dma-debug.h>
18 #include <asm/io.h>
19 #include <asm/swiotlb.h>
20 
21 /* Some dma direct funcs must be visible for use in other dma_ops */
22 extern void *__dma_direct_alloc_coherent(struct device *dev, size_t size,
23 					 dma_addr_t *dma_handle, gfp_t flag,
24 					 unsigned long attrs);
25 extern void __dma_direct_free_coherent(struct device *dev, size_t size,
26 				       void *vaddr, dma_addr_t dma_handle,
27 				       unsigned long attrs);
28 extern int dma_direct_mmap_coherent(struct device *dev,
29 				    struct vm_area_struct *vma,
30 				    void *cpu_addr, dma_addr_t handle,
31 				    size_t size, unsigned long attrs);
32 
33 #ifdef CONFIG_NOT_COHERENT_CACHE
34 /*
35  * DMA-consistent mapping functions for PowerPCs that don't support
36  * cache snooping.  These allocate/free a region of uncached mapped
37  * memory space for use with DMA devices.  Alternatively, you could
38  * allocate the space "normally" and use the cache management functions
39  * to ensure it is consistent.
40  */
41 struct device;
42 extern void *__dma_alloc_coherent(struct device *dev, size_t size,
43 				  dma_addr_t *handle, gfp_t gfp);
44 extern void __dma_free_coherent(size_t size, void *vaddr);
45 extern void __dma_sync(void *vaddr, size_t size, int direction);
46 extern void __dma_sync_page(struct page *page, unsigned long offset,
47 				 size_t size, int direction);
48 extern unsigned long __dma_get_coherent_pfn(unsigned long cpu_addr);
49 
50 #else /* ! CONFIG_NOT_COHERENT_CACHE */
51 /*
52  * Cache coherent cores.
53  */
54 
55 #define __dma_alloc_coherent(dev, gfp, size, handle)	NULL
56 #define __dma_free_coherent(size, addr)		((void)0)
57 #define __dma_sync(addr, size, rw)		((void)0)
58 #define __dma_sync_page(pg, off, sz, rw)	((void)0)
59 
60 #endif /* ! CONFIG_NOT_COHERENT_CACHE */
61 
device_to_mask(struct device * dev)62 static inline unsigned long device_to_mask(struct device *dev)
63 {
64 	if (dev->dma_mask && *dev->dma_mask)
65 		return *dev->dma_mask;
66 	/* Assume devices without mask can take 32 bit addresses */
67 	return 0xfffffffful;
68 }
69 
70 /*
71  * Available generic sets of operations
72  */
73 #ifdef CONFIG_PPC64
74 extern struct dma_map_ops dma_iommu_ops;
75 #endif
76 extern const struct dma_map_ops dma_direct_ops;
77 
get_arch_dma_ops(struct bus_type * bus)78 static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)
79 {
80 	/* We don't handle the NULL dev case for ISA for now. We could
81 	 * do it via an out of line call but it is not needed for now. The
82 	 * only ISA DMA device we support is the floppy and we have a hack
83 	 * in the floppy driver directly to get a device for us.
84 	 */
85 	return NULL;
86 }
87 
88 /*
89  * get_dma_offset()
90  *
91  * Get the dma offset on configurations where the dma address can be determined
92  * from the physical address by looking at a simple offset.  Direct dma and
93  * swiotlb use this function, but it is typically not used by implementations
94  * with an iommu.
95  */
get_dma_offset(struct device * dev)96 static inline dma_addr_t get_dma_offset(struct device *dev)
97 {
98 	if (dev)
99 		return dev->archdata.dma_offset;
100 
101 	return PCI_DRAM_OFFSET;
102 }
103 
set_dma_offset(struct device * dev,dma_addr_t off)104 static inline void set_dma_offset(struct device *dev, dma_addr_t off)
105 {
106 	if (dev)
107 		dev->archdata.dma_offset = off;
108 }
109 
110 /* this will be removed soon */
111 #define flush_write_buffers()
112 
113 #define HAVE_ARCH_DMA_SET_MASK 1
114 extern int dma_set_mask(struct device *dev, u64 dma_mask);
115 
116 extern u64 __dma_get_required_mask(struct device *dev);
117 
dma_capable(struct device * dev,dma_addr_t addr,size_t size)118 static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
119 {
120 #ifdef CONFIG_SWIOTLB
121 	struct dev_archdata *sd = &dev->archdata;
122 
123 	if (sd->max_direct_dma_addr && addr + size > sd->max_direct_dma_addr)
124 		return false;
125 #endif
126 
127 	if (!dev->dma_mask)
128 		return false;
129 
130 	return addr + size - 1 <= *dev->dma_mask;
131 }
132 
phys_to_dma(struct device * dev,phys_addr_t paddr)133 static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
134 {
135 	return paddr + get_dma_offset(dev);
136 }
137 
dma_to_phys(struct device * dev,dma_addr_t daddr)138 static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr)
139 {
140 	return daddr - get_dma_offset(dev);
141 }
142 
143 #define ARCH_HAS_DMA_MMAP_COHERENT
144 
dma_cache_sync(struct device * dev,void * vaddr,size_t size,enum dma_data_direction direction)145 static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
146 		enum dma_data_direction direction)
147 {
148 	BUG_ON(direction == DMA_NONE);
149 	__dma_sync(vaddr, size, (int)direction);
150 }
151 
152 #endif /* __KERNEL__ */
153 #endif	/* _ASM_DMA_MAPPING_H */
154