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1 /*
2  * Copyright (C) 2012-2017 ARM Limited or its affiliates.
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 as
6  * published by the Free Software Foundation.
7  *
8  * This program is distributed in the hope that it will be useful,
9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11  * GNU General Public License for more details.
12  *
13  * You should have received a copy of the GNU General Public License
14  * along with this program; if not, see <http://www.gnu.org/licenses/>.
15  */
16 
17 /* \file ssi_aead.h
18  * ARM CryptoCell AEAD Crypto API
19  */
20 
21 #ifndef __SSI_AEAD_H__
22 #define __SSI_AEAD_H__
23 
24 #include <linux/kernel.h>
25 #include <crypto/algapi.h>
26 #include <crypto/ctr.h>
27 
28 /* mac_cmp - HW writes 8 B but all bytes hold the same value */
29 #define ICV_CMP_SIZE 8
30 #define CCM_CONFIG_BUF_SIZE (AES_BLOCK_SIZE * 3)
31 #define MAX_MAC_SIZE MAX(SHA256_DIGEST_SIZE, AES_BLOCK_SIZE)
32 
33 /* defines for AES GCM configuration buffer */
34 #define GCM_BLOCK_LEN_SIZE 8
35 
36 #define GCM_BLOCK_RFC4_IV_OFFSET	4
37 #define GCM_BLOCK_RFC4_IV_SIZE		8  /* IV size for rfc's */
38 #define GCM_BLOCK_RFC4_NONCE_OFFSET	0
39 #define GCM_BLOCK_RFC4_NONCE_SIZE	4
40 
41 /* Offsets into AES CCM configuration buffer */
42 #define CCM_B0_OFFSET 0
43 #define CCM_A0_OFFSET 16
44 #define CCM_CTR_COUNT_0_OFFSET 32
45 /* CCM B0 and CTR_COUNT constants. */
46 #define CCM_BLOCK_NONCE_OFFSET 1  /* Nonce offset inside B0 and CTR_COUNT */
47 #define CCM_BLOCK_NONCE_SIZE   3  /* Nonce size inside B0 and CTR_COUNT */
48 #define CCM_BLOCK_IV_OFFSET    4  /* IV offset inside B0 and CTR_COUNT */
49 #define CCM_BLOCK_IV_SIZE      8  /* IV size inside B0 and CTR_COUNT */
50 
51 enum aead_ccm_header_size {
52 	ccm_header_size_null = -1,
53 	ccm_header_size_zero = 0,
54 	ccm_header_size_2 = 2,
55 	ccm_header_size_6 = 6,
56 	ccm_header_size_max = S32_MAX
57 };
58 
59 struct aead_req_ctx {
60 	/* Allocate cache line although only 4 bytes are needed to
61 	 *  assure next field falls @ cache line
62 	 *  Used for both: digest HW compare and CCM/GCM MAC value
63 	 */
64 	u8 mac_buf[MAX_MAC_SIZE] ____cacheline_aligned;
65 	u8 ctr_iv[AES_BLOCK_SIZE] ____cacheline_aligned;
66 
67 	//used in gcm
68 	u8 gcm_iv_inc1[AES_BLOCK_SIZE] ____cacheline_aligned;
69 	u8 gcm_iv_inc2[AES_BLOCK_SIZE] ____cacheline_aligned;
70 	u8 hkey[AES_BLOCK_SIZE] ____cacheline_aligned;
71 	struct {
72 		u8 len_a[GCM_BLOCK_LEN_SIZE] ____cacheline_aligned;
73 		u8 len_c[GCM_BLOCK_LEN_SIZE];
74 	} gcm_len_block;
75 
76 	u8 ccm_config[CCM_CONFIG_BUF_SIZE] ____cacheline_aligned;
77 	unsigned int hw_iv_size ____cacheline_aligned; /*HW actual size input*/
78 	u8 backup_mac[MAX_MAC_SIZE]; /*used to prevent cache coherence problem*/
79 	u8 *backup_iv; /*store iv for generated IV flow*/
80 	u8 *backup_giv; /*store iv for rfc3686(ctr) flow*/
81 	dma_addr_t mac_buf_dma_addr; /* internal ICV DMA buffer */
82 	dma_addr_t ccm_iv0_dma_addr; /* buffer for internal ccm configurations */
83 	dma_addr_t icv_dma_addr; /* Phys. address of ICV */
84 
85 	//used in gcm
86 	dma_addr_t gcm_iv_inc1_dma_addr; /* buffer for internal gcm configurations */
87 	dma_addr_t gcm_iv_inc2_dma_addr; /* buffer for internal gcm configurations */
88 	dma_addr_t hkey_dma_addr; /* Phys. address of hkey */
89 	dma_addr_t gcm_block_len_dma_addr; /* Phys. address of gcm block len */
90 	bool is_gcm4543;
91 
92 	u8 *icv_virt_addr; /* Virt. address of ICV */
93 	struct async_gen_req_ctx gen_ctx;
94 	struct ssi_mlli assoc;
95 	struct ssi_mlli src;
96 	struct ssi_mlli dst;
97 	struct scatterlist *src_sgl;
98 	struct scatterlist *dst_sgl;
99 	unsigned int src_offset;
100 	unsigned int dst_offset;
101 	enum ssi_req_dma_buf_type assoc_buff_type;
102 	enum ssi_req_dma_buf_type data_buff_type;
103 	struct mlli_params mlli_params;
104 	unsigned int cryptlen;
105 	struct scatterlist ccm_adata_sg;
106 	enum aead_ccm_header_size ccm_hdr_size;
107 	unsigned int req_authsize;
108 	enum drv_cipher_mode cipher_mode;
109 	bool is_icv_fragmented;
110 	bool is_single_pass;
111 	bool plaintext_authenticate_only; //for gcm_rfc4543
112 };
113 
114 int ssi_aead_alloc(struct ssi_drvdata *drvdata);
115 int ssi_aead_free(struct ssi_drvdata *drvdata);
116 
117 #endif /*__SSI_AEAD_H__*/
118