1 /*
2 * Copyright IBM Corporation 2001, 2005, 2006
3 * Copyright Dave Engebretsen & Todd Inglett 2001
4 * Copyright Linas Vepstas 2005, 2006
5 * Copyright 2001-2012 IBM Corporation.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 *
21 * Please address comments and feedback to Linas Vepstas <linas@austin.ibm.com>
22 */
23
24 #include <linux/delay.h>
25 #include <linux/sched.h>
26 #include <linux/init.h>
27 #include <linux/list.h>
28 #include <linux/pci.h>
29 #include <linux/iommu.h>
30 #include <linux/proc_fs.h>
31 #include <linux/rbtree.h>
32 #include <linux/reboot.h>
33 #include <linux/seq_file.h>
34 #include <linux/spinlock.h>
35 #include <linux/export.h>
36 #include <linux/of.h>
37
38 #include <linux/atomic.h>
39 #include <asm/debugfs.h>
40 #include <asm/eeh.h>
41 #include <asm/eeh_event.h>
42 #include <asm/io.h>
43 #include <asm/iommu.h>
44 #include <asm/machdep.h>
45 #include <asm/ppc-pci.h>
46 #include <asm/rtas.h>
47 #include <asm/pte-walk.h>
48
49
50 /** Overview:
51 * EEH, or "Enhanced Error Handling" is a PCI bridge technology for
52 * dealing with PCI bus errors that can't be dealt with within the
53 * usual PCI framework, except by check-stopping the CPU. Systems
54 * that are designed for high-availability/reliability cannot afford
55 * to crash due to a "mere" PCI error, thus the need for EEH.
56 * An EEH-capable bridge operates by converting a detected error
57 * into a "slot freeze", taking the PCI adapter off-line, making
58 * the slot behave, from the OS'es point of view, as if the slot
59 * were "empty": all reads return 0xff's and all writes are silently
60 * ignored. EEH slot isolation events can be triggered by parity
61 * errors on the address or data busses (e.g. during posted writes),
62 * which in turn might be caused by low voltage on the bus, dust,
63 * vibration, humidity, radioactivity or plain-old failed hardware.
64 *
65 * Note, however, that one of the leading causes of EEH slot
66 * freeze events are buggy device drivers, buggy device microcode,
67 * or buggy device hardware. This is because any attempt by the
68 * device to bus-master data to a memory address that is not
69 * assigned to the device will trigger a slot freeze. (The idea
70 * is to prevent devices-gone-wild from corrupting system memory).
71 * Buggy hardware/drivers will have a miserable time co-existing
72 * with EEH.
73 *
74 * Ideally, a PCI device driver, when suspecting that an isolation
75 * event has occurred (e.g. by reading 0xff's), will then ask EEH
76 * whether this is the case, and then take appropriate steps to
77 * reset the PCI slot, the PCI device, and then resume operations.
78 * However, until that day, the checking is done here, with the
79 * eeh_check_failure() routine embedded in the MMIO macros. If
80 * the slot is found to be isolated, an "EEH Event" is synthesized
81 * and sent out for processing.
82 */
83
84 /* If a device driver keeps reading an MMIO register in an interrupt
85 * handler after a slot isolation event, it might be broken.
86 * This sets the threshold for how many read attempts we allow
87 * before printing an error message.
88 */
89 #define EEH_MAX_FAILS 2100000
90
91 /* Time to wait for a PCI slot to report status, in milliseconds */
92 #define PCI_BUS_RESET_WAIT_MSEC (5*60*1000)
93
94 /*
95 * EEH probe mode support, which is part of the flags,
96 * is to support multiple platforms for EEH. Some platforms
97 * like pSeries do PCI emunation based on device tree.
98 * However, other platforms like powernv probe PCI devices
99 * from hardware. The flag is used to distinguish that.
100 * In addition, struct eeh_ops::probe would be invoked for
101 * particular OF node or PCI device so that the corresponding
102 * PE would be created there.
103 */
104 int eeh_subsystem_flags;
105 EXPORT_SYMBOL(eeh_subsystem_flags);
106
107 /*
108 * EEH allowed maximal frozen times. If one particular PE's
109 * frozen count in last hour exceeds this limit, the PE will
110 * be forced to be offline permanently.
111 */
112 int eeh_max_freezes = 5;
113
114 /* Platform dependent EEH operations */
115 struct eeh_ops *eeh_ops = NULL;
116
117 /* Lock to avoid races due to multiple reports of an error */
118 DEFINE_RAW_SPINLOCK(confirm_error_lock);
119 EXPORT_SYMBOL_GPL(confirm_error_lock);
120
121 /* Lock to protect passed flags */
122 static DEFINE_MUTEX(eeh_dev_mutex);
123
124 /* Buffer for reporting pci register dumps. Its here in BSS, and
125 * not dynamically alloced, so that it ends up in RMO where RTAS
126 * can access it.
127 */
128 #define EEH_PCI_REGS_LOG_LEN 8192
129 static unsigned char pci_regs_buf[EEH_PCI_REGS_LOG_LEN];
130
131 /*
132 * The struct is used to maintain the EEH global statistic
133 * information. Besides, the EEH global statistics will be
134 * exported to user space through procfs
135 */
136 struct eeh_stats {
137 u64 no_device; /* PCI device not found */
138 u64 no_dn; /* OF node not found */
139 u64 no_cfg_addr; /* Config address not found */
140 u64 ignored_check; /* EEH check skipped */
141 u64 total_mmio_ffs; /* Total EEH checks */
142 u64 false_positives; /* Unnecessary EEH checks */
143 u64 slot_resets; /* PE reset */
144 };
145
146 static struct eeh_stats eeh_stats;
147
eeh_setup(char * str)148 static int __init eeh_setup(char *str)
149 {
150 if (!strcmp(str, "off"))
151 eeh_add_flag(EEH_FORCE_DISABLED);
152 else if (!strcmp(str, "early_log"))
153 eeh_add_flag(EEH_EARLY_DUMP_LOG);
154
155 return 1;
156 }
157 __setup("eeh=", eeh_setup);
158
159 /*
160 * This routine captures assorted PCI configuration space data
161 * for the indicated PCI device, and puts them into a buffer
162 * for RTAS error logging.
163 */
eeh_dump_dev_log(struct eeh_dev * edev,char * buf,size_t len)164 static size_t eeh_dump_dev_log(struct eeh_dev *edev, char *buf, size_t len)
165 {
166 struct pci_dn *pdn = eeh_dev_to_pdn(edev);
167 u32 cfg;
168 int cap, i;
169 int n = 0, l = 0;
170 char buffer[128];
171
172 if (!pdn) {
173 pr_warn("EEH: Note: No error log for absent device.\n");
174 return 0;
175 }
176
177 n += scnprintf(buf+n, len-n, "%04x:%02x:%02x.%01x\n",
178 pdn->phb->global_number, pdn->busno,
179 PCI_SLOT(pdn->devfn), PCI_FUNC(pdn->devfn));
180 pr_warn("EEH: of node=%04x:%02x:%02x.%01x\n",
181 pdn->phb->global_number, pdn->busno,
182 PCI_SLOT(pdn->devfn), PCI_FUNC(pdn->devfn));
183
184 eeh_ops->read_config(pdn, PCI_VENDOR_ID, 4, &cfg);
185 n += scnprintf(buf+n, len-n, "dev/vend:%08x\n", cfg);
186 pr_warn("EEH: PCI device/vendor: %08x\n", cfg);
187
188 eeh_ops->read_config(pdn, PCI_COMMAND, 4, &cfg);
189 n += scnprintf(buf+n, len-n, "cmd/stat:%x\n", cfg);
190 pr_warn("EEH: PCI cmd/status register: %08x\n", cfg);
191
192 /* Gather bridge-specific registers */
193 if (edev->mode & EEH_DEV_BRIDGE) {
194 eeh_ops->read_config(pdn, PCI_SEC_STATUS, 2, &cfg);
195 n += scnprintf(buf+n, len-n, "sec stat:%x\n", cfg);
196 pr_warn("EEH: Bridge secondary status: %04x\n", cfg);
197
198 eeh_ops->read_config(pdn, PCI_BRIDGE_CONTROL, 2, &cfg);
199 n += scnprintf(buf+n, len-n, "brdg ctl:%x\n", cfg);
200 pr_warn("EEH: Bridge control: %04x\n", cfg);
201 }
202
203 /* Dump out the PCI-X command and status regs */
204 cap = edev->pcix_cap;
205 if (cap) {
206 eeh_ops->read_config(pdn, cap, 4, &cfg);
207 n += scnprintf(buf+n, len-n, "pcix-cmd:%x\n", cfg);
208 pr_warn("EEH: PCI-X cmd: %08x\n", cfg);
209
210 eeh_ops->read_config(pdn, cap+4, 4, &cfg);
211 n += scnprintf(buf+n, len-n, "pcix-stat:%x\n", cfg);
212 pr_warn("EEH: PCI-X status: %08x\n", cfg);
213 }
214
215 /* If PCI-E capable, dump PCI-E cap 10 */
216 cap = edev->pcie_cap;
217 if (cap) {
218 n += scnprintf(buf+n, len-n, "pci-e cap10:\n");
219 pr_warn("EEH: PCI-E capabilities and status follow:\n");
220
221 for (i=0; i<=8; i++) {
222 eeh_ops->read_config(pdn, cap+4*i, 4, &cfg);
223 n += scnprintf(buf+n, len-n, "%02x:%x\n", 4*i, cfg);
224
225 if ((i % 4) == 0) {
226 if (i != 0)
227 pr_warn("%s\n", buffer);
228
229 l = scnprintf(buffer, sizeof(buffer),
230 "EEH: PCI-E %02x: %08x ",
231 4*i, cfg);
232 } else {
233 l += scnprintf(buffer+l, sizeof(buffer)-l,
234 "%08x ", cfg);
235 }
236
237 }
238
239 pr_warn("%s\n", buffer);
240 }
241
242 /* If AER capable, dump it */
243 cap = edev->aer_cap;
244 if (cap) {
245 n += scnprintf(buf+n, len-n, "pci-e AER:\n");
246 pr_warn("EEH: PCI-E AER capability register set follows:\n");
247
248 for (i=0; i<=13; i++) {
249 eeh_ops->read_config(pdn, cap+4*i, 4, &cfg);
250 n += scnprintf(buf+n, len-n, "%02x:%x\n", 4*i, cfg);
251
252 if ((i % 4) == 0) {
253 if (i != 0)
254 pr_warn("%s\n", buffer);
255
256 l = scnprintf(buffer, sizeof(buffer),
257 "EEH: PCI-E AER %02x: %08x ",
258 4*i, cfg);
259 } else {
260 l += scnprintf(buffer+l, sizeof(buffer)-l,
261 "%08x ", cfg);
262 }
263 }
264
265 pr_warn("%s\n", buffer);
266 }
267
268 return n;
269 }
270
eeh_dump_pe_log(void * data,void * flag)271 static void *eeh_dump_pe_log(void *data, void *flag)
272 {
273 struct eeh_pe *pe = data;
274 struct eeh_dev *edev, *tmp;
275 size_t *plen = flag;
276
277 eeh_pe_for_each_dev(pe, edev, tmp)
278 *plen += eeh_dump_dev_log(edev, pci_regs_buf + *plen,
279 EEH_PCI_REGS_LOG_LEN - *plen);
280
281 return NULL;
282 }
283
284 /**
285 * eeh_slot_error_detail - Generate combined log including driver log and error log
286 * @pe: EEH PE
287 * @severity: temporary or permanent error log
288 *
289 * This routine should be called to generate the combined log, which
290 * is comprised of driver log and error log. The driver log is figured
291 * out from the config space of the corresponding PCI device, while
292 * the error log is fetched through platform dependent function call.
293 */
eeh_slot_error_detail(struct eeh_pe * pe,int severity)294 void eeh_slot_error_detail(struct eeh_pe *pe, int severity)
295 {
296 size_t loglen = 0;
297
298 /*
299 * When the PHB is fenced or dead, it's pointless to collect
300 * the data from PCI config space because it should return
301 * 0xFF's. For ER, we still retrieve the data from the PCI
302 * config space.
303 *
304 * For pHyp, we have to enable IO for log retrieval. Otherwise,
305 * 0xFF's is always returned from PCI config space.
306 *
307 * When the @severity is EEH_LOG_PERM, the PE is going to be
308 * removed. Prior to that, the drivers for devices included in
309 * the PE will be closed. The drivers rely on working IO path
310 * to bring the devices to quiet state. Otherwise, PCI traffic
311 * from those devices after they are removed is like to cause
312 * another unexpected EEH error.
313 */
314 if (!(pe->type & EEH_PE_PHB)) {
315 if (eeh_has_flag(EEH_ENABLE_IO_FOR_LOG) ||
316 severity == EEH_LOG_PERM)
317 eeh_pci_enable(pe, EEH_OPT_THAW_MMIO);
318
319 /*
320 * The config space of some PCI devices can't be accessed
321 * when their PEs are in frozen state. Otherwise, fenced
322 * PHB might be seen. Those PEs are identified with flag
323 * EEH_PE_CFG_RESTRICTED, indicating EEH_PE_CFG_BLOCKED
324 * is set automatically when the PE is put to EEH_PE_ISOLATED.
325 *
326 * Restoring BARs possibly triggers PCI config access in
327 * (OPAL) firmware and then causes fenced PHB. If the
328 * PCI config is blocked with flag EEH_PE_CFG_BLOCKED, it's
329 * pointless to restore BARs and dump config space.
330 */
331 eeh_ops->configure_bridge(pe);
332 if (!(pe->state & EEH_PE_CFG_BLOCKED)) {
333 eeh_pe_restore_bars(pe);
334
335 pci_regs_buf[0] = 0;
336 eeh_pe_traverse(pe, eeh_dump_pe_log, &loglen);
337 }
338 }
339
340 eeh_ops->get_log(pe, severity, pci_regs_buf, loglen);
341 }
342
343 /**
344 * eeh_token_to_phys - Convert EEH address token to phys address
345 * @token: I/O token, should be address in the form 0xA....
346 *
347 * This routine should be called to convert virtual I/O address
348 * to physical one.
349 */
eeh_token_to_phys(unsigned long token)350 static inline unsigned long eeh_token_to_phys(unsigned long token)
351 {
352 pte_t *ptep;
353 unsigned long pa;
354 int hugepage_shift;
355
356 /*
357 * We won't find hugepages here(this is iomem). Hence we are not
358 * worried about _PAGE_SPLITTING/collapse. Also we will not hit
359 * page table free, because of init_mm.
360 */
361 ptep = find_init_mm_pte(token, &hugepage_shift);
362 if (!ptep)
363 return token;
364
365 pa = pte_pfn(*ptep);
366
367 /* On radix we can do hugepage mappings for io, so handle that */
368 if (hugepage_shift) {
369 pa <<= hugepage_shift;
370 pa |= token & ((1ul << hugepage_shift) - 1);
371 } else {
372 pa <<= PAGE_SHIFT;
373 pa |= token & (PAGE_SIZE - 1);
374 }
375
376 return pa;
377 }
378
379 /*
380 * On PowerNV platform, we might already have fenced PHB there.
381 * For that case, it's meaningless to recover frozen PE. Intead,
382 * We have to handle fenced PHB firstly.
383 */
eeh_phb_check_failure(struct eeh_pe * pe)384 static int eeh_phb_check_failure(struct eeh_pe *pe)
385 {
386 struct eeh_pe *phb_pe;
387 unsigned long flags;
388 int ret;
389
390 if (!eeh_has_flag(EEH_PROBE_MODE_DEV))
391 return -EPERM;
392
393 /* Find the PHB PE */
394 phb_pe = eeh_phb_pe_get(pe->phb);
395 if (!phb_pe) {
396 pr_warn("%s Can't find PE for PHB#%x\n",
397 __func__, pe->phb->global_number);
398 return -EEXIST;
399 }
400
401 /* If the PHB has been in problematic state */
402 eeh_serialize_lock(&flags);
403 if (phb_pe->state & EEH_PE_ISOLATED) {
404 ret = 0;
405 goto out;
406 }
407
408 /* Check PHB state */
409 ret = eeh_ops->get_state(phb_pe, NULL);
410 if ((ret < 0) ||
411 (ret == EEH_STATE_NOT_SUPPORT) ||
412 (ret & (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) ==
413 (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) {
414 ret = 0;
415 goto out;
416 }
417
418 /* Isolate the PHB and send event */
419 eeh_pe_state_mark(phb_pe, EEH_PE_ISOLATED);
420 eeh_serialize_unlock(flags);
421
422 pr_err("EEH: PHB#%x failure detected, location: %s\n",
423 phb_pe->phb->global_number, eeh_pe_loc_get(phb_pe));
424 dump_stack();
425 eeh_send_failure_event(phb_pe);
426
427 return 1;
428 out:
429 eeh_serialize_unlock(flags);
430 return ret;
431 }
432
433 /**
434 * eeh_dev_check_failure - Check if all 1's data is due to EEH slot freeze
435 * @edev: eeh device
436 *
437 * Check for an EEH failure for the given device node. Call this
438 * routine if the result of a read was all 0xff's and you want to
439 * find out if this is due to an EEH slot freeze. This routine
440 * will query firmware for the EEH status.
441 *
442 * Returns 0 if there has not been an EEH error; otherwise returns
443 * a non-zero value and queues up a slot isolation event notification.
444 *
445 * It is safe to call this routine in an interrupt context.
446 */
eeh_dev_check_failure(struct eeh_dev * edev)447 int eeh_dev_check_failure(struct eeh_dev *edev)
448 {
449 int ret;
450 int active_flags = (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE);
451 unsigned long flags;
452 struct device_node *dn;
453 struct pci_dev *dev;
454 struct eeh_pe *pe, *parent_pe, *phb_pe;
455 int rc = 0;
456 const char *location = NULL;
457
458 eeh_stats.total_mmio_ffs++;
459
460 if (!eeh_enabled())
461 return 0;
462
463 if (!edev) {
464 eeh_stats.no_dn++;
465 return 0;
466 }
467 dev = eeh_dev_to_pci_dev(edev);
468 pe = eeh_dev_to_pe(edev);
469
470 /* Access to IO BARs might get this far and still not want checking. */
471 if (!pe) {
472 eeh_stats.ignored_check++;
473 pr_debug("EEH: Ignored check for %s\n",
474 eeh_pci_name(dev));
475 return 0;
476 }
477
478 if (!pe->addr && !pe->config_addr) {
479 eeh_stats.no_cfg_addr++;
480 return 0;
481 }
482
483 /*
484 * On PowerNV platform, we might already have fenced PHB
485 * there and we need take care of that firstly.
486 */
487 ret = eeh_phb_check_failure(pe);
488 if (ret > 0)
489 return ret;
490
491 /*
492 * If the PE isn't owned by us, we shouldn't check the
493 * state. Instead, let the owner handle it if the PE has
494 * been frozen.
495 */
496 if (eeh_pe_passed(pe))
497 return 0;
498
499 /* If we already have a pending isolation event for this
500 * slot, we know it's bad already, we don't need to check.
501 * Do this checking under a lock; as multiple PCI devices
502 * in one slot might report errors simultaneously, and we
503 * only want one error recovery routine running.
504 */
505 eeh_serialize_lock(&flags);
506 rc = 1;
507 if (pe->state & EEH_PE_ISOLATED) {
508 pe->check_count++;
509 if (pe->check_count % EEH_MAX_FAILS == 0) {
510 dn = pci_device_to_OF_node(dev);
511 if (dn)
512 location = of_get_property(dn, "ibm,loc-code",
513 NULL);
514 printk(KERN_ERR "EEH: %d reads ignored for recovering device at "
515 "location=%s driver=%s pci addr=%s\n",
516 pe->check_count,
517 location ? location : "unknown",
518 eeh_driver_name(dev), eeh_pci_name(dev));
519 printk(KERN_ERR "EEH: Might be infinite loop in %s driver\n",
520 eeh_driver_name(dev));
521 dump_stack();
522 }
523 goto dn_unlock;
524 }
525
526 /*
527 * Now test for an EEH failure. This is VERY expensive.
528 * Note that the eeh_config_addr may be a parent device
529 * in the case of a device behind a bridge, or it may be
530 * function zero of a multi-function device.
531 * In any case they must share a common PHB.
532 */
533 ret = eeh_ops->get_state(pe, NULL);
534
535 /* Note that config-io to empty slots may fail;
536 * they are empty when they don't have children.
537 * We will punt with the following conditions: Failure to get
538 * PE's state, EEH not support and Permanently unavailable
539 * state, PE is in good state.
540 */
541 if ((ret < 0) ||
542 (ret == EEH_STATE_NOT_SUPPORT) ||
543 ((ret & active_flags) == active_flags)) {
544 eeh_stats.false_positives++;
545 pe->false_positives++;
546 rc = 0;
547 goto dn_unlock;
548 }
549
550 /*
551 * It should be corner case that the parent PE has been
552 * put into frozen state as well. We should take care
553 * that at first.
554 */
555 parent_pe = pe->parent;
556 while (parent_pe) {
557 /* Hit the ceiling ? */
558 if (parent_pe->type & EEH_PE_PHB)
559 break;
560
561 /* Frozen parent PE ? */
562 ret = eeh_ops->get_state(parent_pe, NULL);
563 if (ret > 0 &&
564 (ret & active_flags) != active_flags)
565 pe = parent_pe;
566
567 /* Next parent level */
568 parent_pe = parent_pe->parent;
569 }
570
571 eeh_stats.slot_resets++;
572
573 /* Avoid repeated reports of this failure, including problems
574 * with other functions on this device, and functions under
575 * bridges.
576 */
577 eeh_pe_state_mark(pe, EEH_PE_ISOLATED);
578 eeh_serialize_unlock(flags);
579
580 /* Most EEH events are due to device driver bugs. Having
581 * a stack trace will help the device-driver authors figure
582 * out what happened. So print that out.
583 */
584 phb_pe = eeh_phb_pe_get(pe->phb);
585 pr_err("EEH: Frozen PHB#%x-PE#%x detected\n",
586 pe->phb->global_number, pe->addr);
587 pr_err("EEH: PE location: %s, PHB location: %s\n",
588 eeh_pe_loc_get(pe), eeh_pe_loc_get(phb_pe));
589 dump_stack();
590
591 eeh_send_failure_event(pe);
592
593 return 1;
594
595 dn_unlock:
596 eeh_serialize_unlock(flags);
597 return rc;
598 }
599
600 EXPORT_SYMBOL_GPL(eeh_dev_check_failure);
601
602 /**
603 * eeh_check_failure - Check if all 1's data is due to EEH slot freeze
604 * @token: I/O address
605 *
606 * Check for an EEH failure at the given I/O address. Call this
607 * routine if the result of a read was all 0xff's and you want to
608 * find out if this is due to an EEH slot freeze event. This routine
609 * will query firmware for the EEH status.
610 *
611 * Note this routine is safe to call in an interrupt context.
612 */
eeh_check_failure(const volatile void __iomem * token)613 int eeh_check_failure(const volatile void __iomem *token)
614 {
615 unsigned long addr;
616 struct eeh_dev *edev;
617
618 /* Finding the phys addr + pci device; this is pretty quick. */
619 addr = eeh_token_to_phys((unsigned long __force) token);
620 edev = eeh_addr_cache_get_dev(addr);
621 if (!edev) {
622 eeh_stats.no_device++;
623 return 0;
624 }
625
626 return eeh_dev_check_failure(edev);
627 }
628 EXPORT_SYMBOL(eeh_check_failure);
629
630
631 /**
632 * eeh_pci_enable - Enable MMIO or DMA transfers for this slot
633 * @pe: EEH PE
634 *
635 * This routine should be called to reenable frozen MMIO or DMA
636 * so that it would work correctly again. It's useful while doing
637 * recovery or log collection on the indicated device.
638 */
eeh_pci_enable(struct eeh_pe * pe,int function)639 int eeh_pci_enable(struct eeh_pe *pe, int function)
640 {
641 int active_flag, rc;
642
643 /*
644 * pHyp doesn't allow to enable IO or DMA on unfrozen PE.
645 * Also, it's pointless to enable them on unfrozen PE. So
646 * we have to check before enabling IO or DMA.
647 */
648 switch (function) {
649 case EEH_OPT_THAW_MMIO:
650 active_flag = EEH_STATE_MMIO_ACTIVE | EEH_STATE_MMIO_ENABLED;
651 break;
652 case EEH_OPT_THAW_DMA:
653 active_flag = EEH_STATE_DMA_ACTIVE;
654 break;
655 case EEH_OPT_DISABLE:
656 case EEH_OPT_ENABLE:
657 case EEH_OPT_FREEZE_PE:
658 active_flag = 0;
659 break;
660 default:
661 pr_warn("%s: Invalid function %d\n",
662 __func__, function);
663 return -EINVAL;
664 }
665
666 /*
667 * Check if IO or DMA has been enabled before
668 * enabling them.
669 */
670 if (active_flag) {
671 rc = eeh_ops->get_state(pe, NULL);
672 if (rc < 0)
673 return rc;
674
675 /* Needn't enable it at all */
676 if (rc == EEH_STATE_NOT_SUPPORT)
677 return 0;
678
679 /* It's already enabled */
680 if (rc & active_flag)
681 return 0;
682 }
683
684
685 /* Issue the request */
686 rc = eeh_ops->set_option(pe, function);
687 if (rc)
688 pr_warn("%s: Unexpected state change %d on "
689 "PHB#%x-PE#%x, err=%d\n",
690 __func__, function, pe->phb->global_number,
691 pe->addr, rc);
692
693 /* Check if the request is finished successfully */
694 if (active_flag) {
695 rc = eeh_ops->wait_state(pe, PCI_BUS_RESET_WAIT_MSEC);
696 if (rc < 0)
697 return rc;
698
699 if (rc & active_flag)
700 return 0;
701
702 return -EIO;
703 }
704
705 return rc;
706 }
707
eeh_disable_and_save_dev_state(void * data,void * userdata)708 static void *eeh_disable_and_save_dev_state(void *data, void *userdata)
709 {
710 struct eeh_dev *edev = data;
711 struct pci_dev *pdev = eeh_dev_to_pci_dev(edev);
712 struct pci_dev *dev = userdata;
713
714 /*
715 * The caller should have disabled and saved the
716 * state for the specified device
717 */
718 if (!pdev || pdev == dev)
719 return NULL;
720
721 /* Ensure we have D0 power state */
722 pci_set_power_state(pdev, PCI_D0);
723
724 /* Save device state */
725 pci_save_state(pdev);
726
727 /*
728 * Disable device to avoid any DMA traffic and
729 * interrupt from the device
730 */
731 pci_write_config_word(pdev, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE);
732
733 return NULL;
734 }
735
eeh_restore_dev_state(void * data,void * userdata)736 static void *eeh_restore_dev_state(void *data, void *userdata)
737 {
738 struct eeh_dev *edev = data;
739 struct pci_dn *pdn = eeh_dev_to_pdn(edev);
740 struct pci_dev *pdev = eeh_dev_to_pci_dev(edev);
741 struct pci_dev *dev = userdata;
742
743 if (!pdev)
744 return NULL;
745
746 /* Apply customization from firmware */
747 if (pdn && eeh_ops->restore_config)
748 eeh_ops->restore_config(pdn);
749
750 /* The caller should restore state for the specified device */
751 if (pdev != dev)
752 pci_restore_state(pdev);
753
754 return NULL;
755 }
756
757 /**
758 * pcibios_set_pcie_reset_state - Set PCI-E reset state
759 * @dev: pci device struct
760 * @state: reset state to enter
761 *
762 * Return value:
763 * 0 if success
764 */
pcibios_set_pcie_reset_state(struct pci_dev * dev,enum pcie_reset_state state)765 int pcibios_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state)
766 {
767 struct eeh_dev *edev = pci_dev_to_eeh_dev(dev);
768 struct eeh_pe *pe = eeh_dev_to_pe(edev);
769
770 if (!pe) {
771 pr_err("%s: No PE found on PCI device %s\n",
772 __func__, pci_name(dev));
773 return -EINVAL;
774 }
775
776 switch (state) {
777 case pcie_deassert_reset:
778 eeh_ops->reset(pe, EEH_RESET_DEACTIVATE);
779 eeh_unfreeze_pe(pe, false);
780 if (!(pe->type & EEH_PE_VF))
781 eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED);
782 eeh_pe_dev_traverse(pe, eeh_restore_dev_state, dev);
783 eeh_pe_state_clear(pe, EEH_PE_ISOLATED);
784 break;
785 case pcie_hot_reset:
786 eeh_pe_state_mark_with_cfg(pe, EEH_PE_ISOLATED);
787 eeh_ops->set_option(pe, EEH_OPT_FREEZE_PE);
788 eeh_pe_dev_traverse(pe, eeh_disable_and_save_dev_state, dev);
789 if (!(pe->type & EEH_PE_VF))
790 eeh_pe_state_mark(pe, EEH_PE_CFG_BLOCKED);
791 eeh_ops->reset(pe, EEH_RESET_HOT);
792 break;
793 case pcie_warm_reset:
794 eeh_pe_state_mark_with_cfg(pe, EEH_PE_ISOLATED);
795 eeh_ops->set_option(pe, EEH_OPT_FREEZE_PE);
796 eeh_pe_dev_traverse(pe, eeh_disable_and_save_dev_state, dev);
797 if (!(pe->type & EEH_PE_VF))
798 eeh_pe_state_mark(pe, EEH_PE_CFG_BLOCKED);
799 eeh_ops->reset(pe, EEH_RESET_FUNDAMENTAL);
800 break;
801 default:
802 eeh_pe_state_clear(pe, EEH_PE_ISOLATED | EEH_PE_CFG_BLOCKED);
803 return -EINVAL;
804 };
805
806 return 0;
807 }
808
809 /**
810 * eeh_set_pe_freset - Check the required reset for the indicated device
811 * @data: EEH device
812 * @flag: return value
813 *
814 * Each device might have its preferred reset type: fundamental or
815 * hot reset. The routine is used to collected the information for
816 * the indicated device and its children so that the bunch of the
817 * devices could be reset properly.
818 */
eeh_set_dev_freset(void * data,void * flag)819 static void *eeh_set_dev_freset(void *data, void *flag)
820 {
821 struct pci_dev *dev;
822 unsigned int *freset = (unsigned int *)flag;
823 struct eeh_dev *edev = (struct eeh_dev *)data;
824
825 dev = eeh_dev_to_pci_dev(edev);
826 if (dev)
827 *freset |= dev->needs_freset;
828
829 return NULL;
830 }
831
832 /**
833 * eeh_pe_reset_full - Complete a full reset process on the indicated PE
834 * @pe: EEH PE
835 *
836 * This function executes a full reset procedure on a PE, including setting
837 * the appropriate flags, performing a fundamental or hot reset, and then
838 * deactivating the reset status. It is designed to be used within the EEH
839 * subsystem, as opposed to eeh_pe_reset which is exported to drivers and
840 * only performs a single operation at a time.
841 *
842 * This function will attempt to reset a PE three times before failing.
843 */
eeh_pe_reset_full(struct eeh_pe * pe)844 int eeh_pe_reset_full(struct eeh_pe *pe)
845 {
846 int active_flags = (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE);
847 int reset_state = (EEH_PE_RESET | EEH_PE_CFG_BLOCKED);
848 int type = EEH_RESET_HOT;
849 unsigned int freset = 0;
850 int i, state, ret;
851
852 /*
853 * Determine the type of reset to perform - hot or fundamental.
854 * Hot reset is the default operation, unless any device under the
855 * PE requires a fundamental reset.
856 */
857 eeh_pe_dev_traverse(pe, eeh_set_dev_freset, &freset);
858
859 if (freset)
860 type = EEH_RESET_FUNDAMENTAL;
861
862 /* Mark the PE as in reset state and block config space accesses */
863 eeh_pe_state_mark(pe, reset_state);
864
865 /* Make three attempts at resetting the bus */
866 for (i = 0; i < 3; i++) {
867 ret = eeh_pe_reset(pe, type);
868 if (ret)
869 break;
870
871 ret = eeh_pe_reset(pe, EEH_RESET_DEACTIVATE);
872 if (ret)
873 break;
874
875 /* Wait until the PE is in a functioning state */
876 state = eeh_ops->wait_state(pe, PCI_BUS_RESET_WAIT_MSEC);
877 if ((state & active_flags) == active_flags)
878 break;
879
880 if (state < 0) {
881 pr_warn("%s: Unrecoverable slot failure on PHB#%x-PE#%x",
882 __func__, pe->phb->global_number, pe->addr);
883 ret = -ENOTRECOVERABLE;
884 break;
885 }
886
887 /* Set error in case this is our last attempt */
888 ret = -EIO;
889 pr_warn("%s: Failure %d resetting PHB#%x-PE#%x\n (%d)\n",
890 __func__, state, pe->phb->global_number, pe->addr, (i + 1));
891 }
892
893 eeh_pe_state_clear(pe, reset_state);
894 return ret;
895 }
896
897 /**
898 * eeh_save_bars - Save device bars
899 * @edev: PCI device associated EEH device
900 *
901 * Save the values of the device bars. Unlike the restore
902 * routine, this routine is *not* recursive. This is because
903 * PCI devices are added individually; but, for the restore,
904 * an entire slot is reset at a time.
905 */
eeh_save_bars(struct eeh_dev * edev)906 void eeh_save_bars(struct eeh_dev *edev)
907 {
908 struct pci_dn *pdn;
909 int i;
910
911 pdn = eeh_dev_to_pdn(edev);
912 if (!pdn)
913 return;
914
915 for (i = 0; i < 16; i++)
916 eeh_ops->read_config(pdn, i * 4, 4, &edev->config_space[i]);
917
918 /*
919 * For PCI bridges including root port, we need enable bus
920 * master explicitly. Otherwise, it can't fetch IODA table
921 * entries correctly. So we cache the bit in advance so that
922 * we can restore it after reset, either PHB range or PE range.
923 */
924 if (edev->mode & EEH_DEV_BRIDGE)
925 edev->config_space[1] |= PCI_COMMAND_MASTER;
926 }
927
928 /**
929 * eeh_ops_register - Register platform dependent EEH operations
930 * @ops: platform dependent EEH operations
931 *
932 * Register the platform dependent EEH operation callback
933 * functions. The platform should call this function before
934 * any other EEH operations.
935 */
eeh_ops_register(struct eeh_ops * ops)936 int __init eeh_ops_register(struct eeh_ops *ops)
937 {
938 if (!ops->name) {
939 pr_warn("%s: Invalid EEH ops name for %p\n",
940 __func__, ops);
941 return -EINVAL;
942 }
943
944 if (eeh_ops && eeh_ops != ops) {
945 pr_warn("%s: EEH ops of platform %s already existing (%s)\n",
946 __func__, eeh_ops->name, ops->name);
947 return -EEXIST;
948 }
949
950 eeh_ops = ops;
951
952 return 0;
953 }
954
955 /**
956 * eeh_ops_unregister - Unreigster platform dependent EEH operations
957 * @name: name of EEH platform operations
958 *
959 * Unregister the platform dependent EEH operation callback
960 * functions.
961 */
eeh_ops_unregister(const char * name)962 int __exit eeh_ops_unregister(const char *name)
963 {
964 if (!name || !strlen(name)) {
965 pr_warn("%s: Invalid EEH ops name\n",
966 __func__);
967 return -EINVAL;
968 }
969
970 if (eeh_ops && !strcmp(eeh_ops->name, name)) {
971 eeh_ops = NULL;
972 return 0;
973 }
974
975 return -EEXIST;
976 }
977
eeh_reboot_notifier(struct notifier_block * nb,unsigned long action,void * unused)978 static int eeh_reboot_notifier(struct notifier_block *nb,
979 unsigned long action, void *unused)
980 {
981 eeh_clear_flag(EEH_ENABLED);
982 return NOTIFY_DONE;
983 }
984
985 static struct notifier_block eeh_reboot_nb = {
986 .notifier_call = eeh_reboot_notifier,
987 };
988
989 /**
990 * eeh_init - EEH initialization
991 *
992 * Initialize EEH by trying to enable it for all of the adapters in the system.
993 * As a side effect we can determine here if eeh is supported at all.
994 * Note that we leave EEH on so failed config cycles won't cause a machine
995 * check. If a user turns off EEH for a particular adapter they are really
996 * telling Linux to ignore errors. Some hardware (e.g. POWER5) won't
997 * grant access to a slot if EEH isn't enabled, and so we always enable
998 * EEH for all slots/all devices.
999 *
1000 * The eeh-force-off option disables EEH checking globally, for all slots.
1001 * Even if force-off is set, the EEH hardware is still enabled, so that
1002 * newer systems can boot.
1003 */
eeh_init(void)1004 int eeh_init(void)
1005 {
1006 struct pci_controller *hose, *tmp;
1007 struct pci_dn *pdn;
1008 static int cnt = 0;
1009 int ret = 0;
1010
1011 /*
1012 * We have to delay the initialization on PowerNV after
1013 * the PCI hierarchy tree has been built because the PEs
1014 * are figured out based on PCI devices instead of device
1015 * tree nodes
1016 */
1017 if (machine_is(powernv) && cnt++ <= 0)
1018 return ret;
1019
1020 /* Register reboot notifier */
1021 ret = register_reboot_notifier(&eeh_reboot_nb);
1022 if (ret) {
1023 pr_warn("%s: Failed to register notifier (%d)\n",
1024 __func__, ret);
1025 return ret;
1026 }
1027
1028 /* call platform initialization function */
1029 if (!eeh_ops) {
1030 pr_warn("%s: Platform EEH operation not found\n",
1031 __func__);
1032 return -EEXIST;
1033 } else if ((ret = eeh_ops->init()))
1034 return ret;
1035
1036 /* Initialize PHB PEs */
1037 list_for_each_entry_safe(hose, tmp, &hose_list, list_node)
1038 eeh_dev_phb_init_dynamic(hose);
1039
1040 /* Initialize EEH event */
1041 ret = eeh_event_init();
1042 if (ret)
1043 return ret;
1044
1045 /* Enable EEH for all adapters */
1046 list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
1047 pdn = hose->pci_data;
1048 traverse_pci_dn(pdn, eeh_ops->probe, NULL);
1049 }
1050
1051 /*
1052 * Call platform post-initialization. Actually, It's good chance
1053 * to inform platform that EEH is ready to supply service if the
1054 * I/O cache stuff has been built up.
1055 */
1056 if (eeh_ops->post_init) {
1057 ret = eeh_ops->post_init();
1058 if (ret)
1059 return ret;
1060 }
1061
1062 if (eeh_enabled())
1063 pr_info("EEH: PCI Enhanced I/O Error Handling Enabled\n");
1064 else
1065 pr_info("EEH: No capable adapters found\n");
1066
1067 return ret;
1068 }
1069
1070 core_initcall_sync(eeh_init);
1071
1072 /**
1073 * eeh_add_device_early - Enable EEH for the indicated device node
1074 * @pdn: PCI device node for which to set up EEH
1075 *
1076 * This routine must be used to perform EEH initialization for PCI
1077 * devices that were added after system boot (e.g. hotplug, dlpar).
1078 * This routine must be called before any i/o is performed to the
1079 * adapter (inluding any config-space i/o).
1080 * Whether this actually enables EEH or not for this device depends
1081 * on the CEC architecture, type of the device, on earlier boot
1082 * command-line arguments & etc.
1083 */
eeh_add_device_early(struct pci_dn * pdn)1084 void eeh_add_device_early(struct pci_dn *pdn)
1085 {
1086 struct pci_controller *phb = pdn ? pdn->phb : NULL;
1087 struct eeh_dev *edev = pdn_to_eeh_dev(pdn);
1088
1089 if (!edev)
1090 return;
1091
1092 if (!eeh_has_flag(EEH_PROBE_MODE_DEVTREE))
1093 return;
1094
1095 /* USB Bus children of PCI devices will not have BUID's */
1096 if (NULL == phb ||
1097 (eeh_has_flag(EEH_PROBE_MODE_DEVTREE) && 0 == phb->buid))
1098 return;
1099
1100 eeh_ops->probe(pdn, NULL);
1101 }
1102
1103 /**
1104 * eeh_add_device_tree_early - Enable EEH for the indicated device
1105 * @pdn: PCI device node
1106 *
1107 * This routine must be used to perform EEH initialization for the
1108 * indicated PCI device that was added after system boot (e.g.
1109 * hotplug, dlpar).
1110 */
eeh_add_device_tree_early(struct pci_dn * pdn)1111 void eeh_add_device_tree_early(struct pci_dn *pdn)
1112 {
1113 struct pci_dn *n;
1114
1115 if (!pdn)
1116 return;
1117
1118 list_for_each_entry(n, &pdn->child_list, list)
1119 eeh_add_device_tree_early(n);
1120 eeh_add_device_early(pdn);
1121 }
1122 EXPORT_SYMBOL_GPL(eeh_add_device_tree_early);
1123
1124 /**
1125 * eeh_add_device_late - Perform EEH initialization for the indicated pci device
1126 * @dev: pci device for which to set up EEH
1127 *
1128 * This routine must be used to complete EEH initialization for PCI
1129 * devices that were added after system boot (e.g. hotplug, dlpar).
1130 */
eeh_add_device_late(struct pci_dev * dev)1131 void eeh_add_device_late(struct pci_dev *dev)
1132 {
1133 struct pci_dn *pdn;
1134 struct eeh_dev *edev;
1135
1136 if (!dev || !eeh_enabled())
1137 return;
1138
1139 pr_debug("EEH: Adding device %s\n", pci_name(dev));
1140
1141 pdn = pci_get_pdn_by_devfn(dev->bus, dev->devfn);
1142 edev = pdn_to_eeh_dev(pdn);
1143 if (edev->pdev == dev) {
1144 pr_debug("EEH: Already referenced !\n");
1145 return;
1146 }
1147
1148 /*
1149 * The EEH cache might not be removed correctly because of
1150 * unbalanced kref to the device during unplug time, which
1151 * relies on pcibios_release_device(). So we have to remove
1152 * that here explicitly.
1153 */
1154 if (edev->pdev) {
1155 eeh_rmv_from_parent_pe(edev);
1156 eeh_addr_cache_rmv_dev(edev->pdev);
1157 eeh_sysfs_remove_device(edev->pdev);
1158 edev->mode &= ~EEH_DEV_SYSFS;
1159
1160 /*
1161 * We definitely should have the PCI device removed
1162 * though it wasn't correctly. So we needn't call
1163 * into error handler afterwards.
1164 */
1165 edev->mode |= EEH_DEV_NO_HANDLER;
1166
1167 edev->pdev = NULL;
1168 dev->dev.archdata.edev = NULL;
1169 }
1170
1171 if (eeh_has_flag(EEH_PROBE_MODE_DEV))
1172 eeh_ops->probe(pdn, NULL);
1173
1174 edev->pdev = dev;
1175 dev->dev.archdata.edev = edev;
1176
1177 eeh_addr_cache_insert_dev(dev);
1178 }
1179
1180 /**
1181 * eeh_add_device_tree_late - Perform EEH initialization for the indicated PCI bus
1182 * @bus: PCI bus
1183 *
1184 * This routine must be used to perform EEH initialization for PCI
1185 * devices which are attached to the indicated PCI bus. The PCI bus
1186 * is added after system boot through hotplug or dlpar.
1187 */
eeh_add_device_tree_late(struct pci_bus * bus)1188 void eeh_add_device_tree_late(struct pci_bus *bus)
1189 {
1190 struct pci_dev *dev;
1191
1192 list_for_each_entry(dev, &bus->devices, bus_list) {
1193 eeh_add_device_late(dev);
1194 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
1195 struct pci_bus *subbus = dev->subordinate;
1196 if (subbus)
1197 eeh_add_device_tree_late(subbus);
1198 }
1199 }
1200 }
1201 EXPORT_SYMBOL_GPL(eeh_add_device_tree_late);
1202
1203 /**
1204 * eeh_add_sysfs_files - Add EEH sysfs files for the indicated PCI bus
1205 * @bus: PCI bus
1206 *
1207 * This routine must be used to add EEH sysfs files for PCI
1208 * devices which are attached to the indicated PCI bus. The PCI bus
1209 * is added after system boot through hotplug or dlpar.
1210 */
eeh_add_sysfs_files(struct pci_bus * bus)1211 void eeh_add_sysfs_files(struct pci_bus *bus)
1212 {
1213 struct pci_dev *dev;
1214
1215 list_for_each_entry(dev, &bus->devices, bus_list) {
1216 eeh_sysfs_add_device(dev);
1217 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
1218 struct pci_bus *subbus = dev->subordinate;
1219 if (subbus)
1220 eeh_add_sysfs_files(subbus);
1221 }
1222 }
1223 }
1224 EXPORT_SYMBOL_GPL(eeh_add_sysfs_files);
1225
1226 /**
1227 * eeh_remove_device - Undo EEH setup for the indicated pci device
1228 * @dev: pci device to be removed
1229 *
1230 * This routine should be called when a device is removed from
1231 * a running system (e.g. by hotplug or dlpar). It unregisters
1232 * the PCI device from the EEH subsystem. I/O errors affecting
1233 * this device will no longer be detected after this call; thus,
1234 * i/o errors affecting this slot may leave this device unusable.
1235 */
eeh_remove_device(struct pci_dev * dev)1236 void eeh_remove_device(struct pci_dev *dev)
1237 {
1238 struct eeh_dev *edev;
1239
1240 if (!dev || !eeh_enabled())
1241 return;
1242 edev = pci_dev_to_eeh_dev(dev);
1243
1244 /* Unregister the device with the EEH/PCI address search system */
1245 pr_debug("EEH: Removing device %s\n", pci_name(dev));
1246
1247 if (!edev || !edev->pdev || !edev->pe) {
1248 pr_debug("EEH: Not referenced !\n");
1249 return;
1250 }
1251
1252 /*
1253 * During the hotplug for EEH error recovery, we need the EEH
1254 * device attached to the parent PE in order for BAR restore
1255 * a bit later. So we keep it for BAR restore and remove it
1256 * from the parent PE during the BAR resotre.
1257 */
1258 edev->pdev = NULL;
1259
1260 /*
1261 * The flag "in_error" is used to trace EEH devices for VFs
1262 * in error state or not. It's set in eeh_report_error(). If
1263 * it's not set, eeh_report_{reset,resume}() won't be called
1264 * for the VF EEH device.
1265 */
1266 edev->in_error = false;
1267 dev->dev.archdata.edev = NULL;
1268 if (!(edev->pe->state & EEH_PE_KEEP))
1269 eeh_rmv_from_parent_pe(edev);
1270 else
1271 edev->mode |= EEH_DEV_DISCONNECTED;
1272
1273 /*
1274 * We're removing from the PCI subsystem, that means
1275 * the PCI device driver can't support EEH or not
1276 * well. So we rely on hotplug completely to do recovery
1277 * for the specific PCI device.
1278 */
1279 edev->mode |= EEH_DEV_NO_HANDLER;
1280
1281 eeh_addr_cache_rmv_dev(dev);
1282 eeh_sysfs_remove_device(dev);
1283 edev->mode &= ~EEH_DEV_SYSFS;
1284 }
1285
eeh_unfreeze_pe(struct eeh_pe * pe,bool sw_state)1286 int eeh_unfreeze_pe(struct eeh_pe *pe, bool sw_state)
1287 {
1288 int ret;
1289
1290 ret = eeh_pci_enable(pe, EEH_OPT_THAW_MMIO);
1291 if (ret) {
1292 pr_warn("%s: Failure %d enabling IO on PHB#%x-PE#%x\n",
1293 __func__, ret, pe->phb->global_number, pe->addr);
1294 return ret;
1295 }
1296
1297 ret = eeh_pci_enable(pe, EEH_OPT_THAW_DMA);
1298 if (ret) {
1299 pr_warn("%s: Failure %d enabling DMA on PHB#%x-PE#%x\n",
1300 __func__, ret, pe->phb->global_number, pe->addr);
1301 return ret;
1302 }
1303
1304 /* Clear software isolated state */
1305 if (sw_state && (pe->state & EEH_PE_ISOLATED))
1306 eeh_pe_state_clear(pe, EEH_PE_ISOLATED);
1307
1308 return ret;
1309 }
1310
1311
1312 static struct pci_device_id eeh_reset_ids[] = {
1313 { PCI_DEVICE(0x19a2, 0x0710) }, /* Emulex, BE */
1314 { PCI_DEVICE(0x10df, 0xe220) }, /* Emulex, Lancer */
1315 { PCI_DEVICE(0x14e4, 0x1657) }, /* Broadcom BCM5719 */
1316 { 0 }
1317 };
1318
eeh_pe_change_owner(struct eeh_pe * pe)1319 static int eeh_pe_change_owner(struct eeh_pe *pe)
1320 {
1321 struct eeh_dev *edev, *tmp;
1322 struct pci_dev *pdev;
1323 struct pci_device_id *id;
1324 int flags, ret;
1325
1326 /* Check PE state */
1327 flags = (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE);
1328 ret = eeh_ops->get_state(pe, NULL);
1329 if (ret < 0 || ret == EEH_STATE_NOT_SUPPORT)
1330 return 0;
1331
1332 /* Unfrozen PE, nothing to do */
1333 if ((ret & flags) == flags)
1334 return 0;
1335
1336 /* Frozen PE, check if it needs PE level reset */
1337 eeh_pe_for_each_dev(pe, edev, tmp) {
1338 pdev = eeh_dev_to_pci_dev(edev);
1339 if (!pdev)
1340 continue;
1341
1342 for (id = &eeh_reset_ids[0]; id->vendor != 0; id++) {
1343 if (id->vendor != PCI_ANY_ID &&
1344 id->vendor != pdev->vendor)
1345 continue;
1346 if (id->device != PCI_ANY_ID &&
1347 id->device != pdev->device)
1348 continue;
1349 if (id->subvendor != PCI_ANY_ID &&
1350 id->subvendor != pdev->subsystem_vendor)
1351 continue;
1352 if (id->subdevice != PCI_ANY_ID &&
1353 id->subdevice != pdev->subsystem_device)
1354 continue;
1355
1356 return eeh_pe_reset_and_recover(pe);
1357 }
1358 }
1359
1360 return eeh_unfreeze_pe(pe, true);
1361 }
1362
1363 /**
1364 * eeh_dev_open - Increase count of pass through devices for PE
1365 * @pdev: PCI device
1366 *
1367 * Increase count of passed through devices for the indicated
1368 * PE. In the result, the EEH errors detected on the PE won't be
1369 * reported. The PE owner will be responsible for detection
1370 * and recovery.
1371 */
eeh_dev_open(struct pci_dev * pdev)1372 int eeh_dev_open(struct pci_dev *pdev)
1373 {
1374 struct eeh_dev *edev;
1375 int ret = -ENODEV;
1376
1377 mutex_lock(&eeh_dev_mutex);
1378
1379 /* No PCI device ? */
1380 if (!pdev)
1381 goto out;
1382
1383 /* No EEH device or PE ? */
1384 edev = pci_dev_to_eeh_dev(pdev);
1385 if (!edev || !edev->pe)
1386 goto out;
1387
1388 /*
1389 * The PE might have been put into frozen state, but we
1390 * didn't detect that yet. The passed through PCI devices
1391 * in frozen PE won't work properly. Clear the frozen state
1392 * in advance.
1393 */
1394 ret = eeh_pe_change_owner(edev->pe);
1395 if (ret)
1396 goto out;
1397
1398 /* Increase PE's pass through count */
1399 atomic_inc(&edev->pe->pass_dev_cnt);
1400 mutex_unlock(&eeh_dev_mutex);
1401
1402 return 0;
1403 out:
1404 mutex_unlock(&eeh_dev_mutex);
1405 return ret;
1406 }
1407 EXPORT_SYMBOL_GPL(eeh_dev_open);
1408
1409 /**
1410 * eeh_dev_release - Decrease count of pass through devices for PE
1411 * @pdev: PCI device
1412 *
1413 * Decrease count of pass through devices for the indicated PE. If
1414 * there is no passed through device in PE, the EEH errors detected
1415 * on the PE will be reported and handled as usual.
1416 */
eeh_dev_release(struct pci_dev * pdev)1417 void eeh_dev_release(struct pci_dev *pdev)
1418 {
1419 struct eeh_dev *edev;
1420
1421 mutex_lock(&eeh_dev_mutex);
1422
1423 /* No PCI device ? */
1424 if (!pdev)
1425 goto out;
1426
1427 /* No EEH device ? */
1428 edev = pci_dev_to_eeh_dev(pdev);
1429 if (!edev || !edev->pe || !eeh_pe_passed(edev->pe))
1430 goto out;
1431
1432 /* Decrease PE's pass through count */
1433 WARN_ON(atomic_dec_if_positive(&edev->pe->pass_dev_cnt) < 0);
1434 eeh_pe_change_owner(edev->pe);
1435 out:
1436 mutex_unlock(&eeh_dev_mutex);
1437 }
1438 EXPORT_SYMBOL(eeh_dev_release);
1439
1440 #ifdef CONFIG_IOMMU_API
1441
dev_has_iommu_table(struct device * dev,void * data)1442 static int dev_has_iommu_table(struct device *dev, void *data)
1443 {
1444 struct pci_dev *pdev = to_pci_dev(dev);
1445 struct pci_dev **ppdev = data;
1446
1447 if (!dev)
1448 return 0;
1449
1450 if (dev->iommu_group) {
1451 *ppdev = pdev;
1452 return 1;
1453 }
1454
1455 return 0;
1456 }
1457
1458 /**
1459 * eeh_iommu_group_to_pe - Convert IOMMU group to EEH PE
1460 * @group: IOMMU group
1461 *
1462 * The routine is called to convert IOMMU group to EEH PE.
1463 */
eeh_iommu_group_to_pe(struct iommu_group * group)1464 struct eeh_pe *eeh_iommu_group_to_pe(struct iommu_group *group)
1465 {
1466 struct pci_dev *pdev = NULL;
1467 struct eeh_dev *edev;
1468 int ret;
1469
1470 /* No IOMMU group ? */
1471 if (!group)
1472 return NULL;
1473
1474 ret = iommu_group_for_each_dev(group, &pdev, dev_has_iommu_table);
1475 if (!ret || !pdev)
1476 return NULL;
1477
1478 /* No EEH device or PE ? */
1479 edev = pci_dev_to_eeh_dev(pdev);
1480 if (!edev || !edev->pe)
1481 return NULL;
1482
1483 return edev->pe;
1484 }
1485 EXPORT_SYMBOL_GPL(eeh_iommu_group_to_pe);
1486
1487 #endif /* CONFIG_IOMMU_API */
1488
1489 /**
1490 * eeh_pe_set_option - Set options for the indicated PE
1491 * @pe: EEH PE
1492 * @option: requested option
1493 *
1494 * The routine is called to enable or disable EEH functionality
1495 * on the indicated PE, to enable IO or DMA for the frozen PE.
1496 */
eeh_pe_set_option(struct eeh_pe * pe,int option)1497 int eeh_pe_set_option(struct eeh_pe *pe, int option)
1498 {
1499 int ret = 0;
1500
1501 /* Invalid PE ? */
1502 if (!pe)
1503 return -ENODEV;
1504
1505 /*
1506 * EEH functionality could possibly be disabled, just
1507 * return error for the case. And the EEH functinality
1508 * isn't expected to be disabled on one specific PE.
1509 */
1510 switch (option) {
1511 case EEH_OPT_ENABLE:
1512 if (eeh_enabled()) {
1513 ret = eeh_pe_change_owner(pe);
1514 break;
1515 }
1516 ret = -EIO;
1517 break;
1518 case EEH_OPT_DISABLE:
1519 break;
1520 case EEH_OPT_THAW_MMIO:
1521 case EEH_OPT_THAW_DMA:
1522 case EEH_OPT_FREEZE_PE:
1523 if (!eeh_ops || !eeh_ops->set_option) {
1524 ret = -ENOENT;
1525 break;
1526 }
1527
1528 ret = eeh_pci_enable(pe, option);
1529 break;
1530 default:
1531 pr_debug("%s: Option %d out of range (%d, %d)\n",
1532 __func__, option, EEH_OPT_DISABLE, EEH_OPT_THAW_DMA);
1533 ret = -EINVAL;
1534 }
1535
1536 return ret;
1537 }
1538 EXPORT_SYMBOL_GPL(eeh_pe_set_option);
1539
1540 /**
1541 * eeh_pe_get_state - Retrieve PE's state
1542 * @pe: EEH PE
1543 *
1544 * Retrieve the PE's state, which includes 3 aspects: enabled
1545 * DMA, enabled IO and asserted reset.
1546 */
eeh_pe_get_state(struct eeh_pe * pe)1547 int eeh_pe_get_state(struct eeh_pe *pe)
1548 {
1549 int result, ret = 0;
1550 bool rst_active, dma_en, mmio_en;
1551
1552 /* Existing PE ? */
1553 if (!pe)
1554 return -ENODEV;
1555
1556 if (!eeh_ops || !eeh_ops->get_state)
1557 return -ENOENT;
1558
1559 /*
1560 * If the parent PE is owned by the host kernel and is undergoing
1561 * error recovery, we should return the PE state as temporarily
1562 * unavailable so that the error recovery on the guest is suspended
1563 * until the recovery completes on the host.
1564 */
1565 if (pe->parent &&
1566 !(pe->state & EEH_PE_REMOVED) &&
1567 (pe->parent->state & (EEH_PE_ISOLATED | EEH_PE_RECOVERING)))
1568 return EEH_PE_STATE_UNAVAIL;
1569
1570 result = eeh_ops->get_state(pe, NULL);
1571 rst_active = !!(result & EEH_STATE_RESET_ACTIVE);
1572 dma_en = !!(result & EEH_STATE_DMA_ENABLED);
1573 mmio_en = !!(result & EEH_STATE_MMIO_ENABLED);
1574
1575 if (rst_active)
1576 ret = EEH_PE_STATE_RESET;
1577 else if (dma_en && mmio_en)
1578 ret = EEH_PE_STATE_NORMAL;
1579 else if (!dma_en && !mmio_en)
1580 ret = EEH_PE_STATE_STOPPED_IO_DMA;
1581 else if (!dma_en && mmio_en)
1582 ret = EEH_PE_STATE_STOPPED_DMA;
1583 else
1584 ret = EEH_PE_STATE_UNAVAIL;
1585
1586 return ret;
1587 }
1588 EXPORT_SYMBOL_GPL(eeh_pe_get_state);
1589
eeh_pe_reenable_devices(struct eeh_pe * pe)1590 static int eeh_pe_reenable_devices(struct eeh_pe *pe)
1591 {
1592 struct eeh_dev *edev, *tmp;
1593 struct pci_dev *pdev;
1594 int ret = 0;
1595
1596 /* Restore config space */
1597 eeh_pe_restore_bars(pe);
1598
1599 /*
1600 * Reenable PCI devices as the devices passed
1601 * through are always enabled before the reset.
1602 */
1603 eeh_pe_for_each_dev(pe, edev, tmp) {
1604 pdev = eeh_dev_to_pci_dev(edev);
1605 if (!pdev)
1606 continue;
1607
1608 ret = pci_reenable_device(pdev);
1609 if (ret) {
1610 pr_warn("%s: Failure %d reenabling %s\n",
1611 __func__, ret, pci_name(pdev));
1612 return ret;
1613 }
1614 }
1615
1616 /* The PE is still in frozen state */
1617 return eeh_unfreeze_pe(pe, true);
1618 }
1619
1620
1621 /**
1622 * eeh_pe_reset - Issue PE reset according to specified type
1623 * @pe: EEH PE
1624 * @option: reset type
1625 *
1626 * The routine is called to reset the specified PE with the
1627 * indicated type, either fundamental reset or hot reset.
1628 * PE reset is the most important part for error recovery.
1629 */
eeh_pe_reset(struct eeh_pe * pe,int option)1630 int eeh_pe_reset(struct eeh_pe *pe, int option)
1631 {
1632 int ret = 0;
1633
1634 /* Invalid PE ? */
1635 if (!pe)
1636 return -ENODEV;
1637
1638 if (!eeh_ops || !eeh_ops->set_option || !eeh_ops->reset)
1639 return -ENOENT;
1640
1641 switch (option) {
1642 case EEH_RESET_DEACTIVATE:
1643 ret = eeh_ops->reset(pe, option);
1644 eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED);
1645 if (ret)
1646 break;
1647
1648 ret = eeh_pe_reenable_devices(pe);
1649 break;
1650 case EEH_RESET_HOT:
1651 case EEH_RESET_FUNDAMENTAL:
1652 /*
1653 * Proactively freeze the PE to drop all MMIO access
1654 * during reset, which should be banned as it's always
1655 * cause recursive EEH error.
1656 */
1657 eeh_ops->set_option(pe, EEH_OPT_FREEZE_PE);
1658
1659 eeh_pe_state_mark(pe, EEH_PE_CFG_BLOCKED);
1660 ret = eeh_ops->reset(pe, option);
1661 break;
1662 default:
1663 pr_debug("%s: Unsupported option %d\n",
1664 __func__, option);
1665 ret = -EINVAL;
1666 }
1667
1668 return ret;
1669 }
1670 EXPORT_SYMBOL_GPL(eeh_pe_reset);
1671
1672 /**
1673 * eeh_pe_configure - Configure PCI bridges after PE reset
1674 * @pe: EEH PE
1675 *
1676 * The routine is called to restore the PCI config space for
1677 * those PCI devices, especially PCI bridges affected by PE
1678 * reset issued previously.
1679 */
eeh_pe_configure(struct eeh_pe * pe)1680 int eeh_pe_configure(struct eeh_pe *pe)
1681 {
1682 int ret = 0;
1683
1684 /* Invalid PE ? */
1685 if (!pe)
1686 return -ENODEV;
1687
1688 return ret;
1689 }
1690 EXPORT_SYMBOL_GPL(eeh_pe_configure);
1691
1692 /**
1693 * eeh_pe_inject_err - Injecting the specified PCI error to the indicated PE
1694 * @pe: the indicated PE
1695 * @type: error type
1696 * @function: error function
1697 * @addr: address
1698 * @mask: address mask
1699 *
1700 * The routine is called to inject the specified PCI error, which
1701 * is determined by @type and @function, to the indicated PE for
1702 * testing purpose.
1703 */
eeh_pe_inject_err(struct eeh_pe * pe,int type,int func,unsigned long addr,unsigned long mask)1704 int eeh_pe_inject_err(struct eeh_pe *pe, int type, int func,
1705 unsigned long addr, unsigned long mask)
1706 {
1707 /* Invalid PE ? */
1708 if (!pe)
1709 return -ENODEV;
1710
1711 /* Unsupported operation ? */
1712 if (!eeh_ops || !eeh_ops->err_inject)
1713 return -ENOENT;
1714
1715 /* Check on PCI error type */
1716 if (type != EEH_ERR_TYPE_32 && type != EEH_ERR_TYPE_64)
1717 return -EINVAL;
1718
1719 /* Check on PCI error function */
1720 if (func < EEH_ERR_FUNC_MIN || func > EEH_ERR_FUNC_MAX)
1721 return -EINVAL;
1722
1723 return eeh_ops->err_inject(pe, type, func, addr, mask);
1724 }
1725 EXPORT_SYMBOL_GPL(eeh_pe_inject_err);
1726
proc_eeh_show(struct seq_file * m,void * v)1727 static int proc_eeh_show(struct seq_file *m, void *v)
1728 {
1729 if (!eeh_enabled()) {
1730 seq_printf(m, "EEH Subsystem is globally disabled\n");
1731 seq_printf(m, "eeh_total_mmio_ffs=%llu\n", eeh_stats.total_mmio_ffs);
1732 } else {
1733 seq_printf(m, "EEH Subsystem is enabled\n");
1734 seq_printf(m,
1735 "no device=%llu\n"
1736 "no device node=%llu\n"
1737 "no config address=%llu\n"
1738 "check not wanted=%llu\n"
1739 "eeh_total_mmio_ffs=%llu\n"
1740 "eeh_false_positives=%llu\n"
1741 "eeh_slot_resets=%llu\n",
1742 eeh_stats.no_device,
1743 eeh_stats.no_dn,
1744 eeh_stats.no_cfg_addr,
1745 eeh_stats.ignored_check,
1746 eeh_stats.total_mmio_ffs,
1747 eeh_stats.false_positives,
1748 eeh_stats.slot_resets);
1749 }
1750
1751 return 0;
1752 }
1753
proc_eeh_open(struct inode * inode,struct file * file)1754 static int proc_eeh_open(struct inode *inode, struct file *file)
1755 {
1756 return single_open(file, proc_eeh_show, NULL);
1757 }
1758
1759 static const struct file_operations proc_eeh_operations = {
1760 .open = proc_eeh_open,
1761 .read = seq_read,
1762 .llseek = seq_lseek,
1763 .release = single_release,
1764 };
1765
1766 #ifdef CONFIG_DEBUG_FS
eeh_enable_dbgfs_set(void * data,u64 val)1767 static int eeh_enable_dbgfs_set(void *data, u64 val)
1768 {
1769 if (val)
1770 eeh_clear_flag(EEH_FORCE_DISABLED);
1771 else
1772 eeh_add_flag(EEH_FORCE_DISABLED);
1773
1774 /* Notify the backend */
1775 if (eeh_ops->post_init)
1776 eeh_ops->post_init();
1777
1778 return 0;
1779 }
1780
eeh_enable_dbgfs_get(void * data,u64 * val)1781 static int eeh_enable_dbgfs_get(void *data, u64 *val)
1782 {
1783 if (eeh_enabled())
1784 *val = 0x1ul;
1785 else
1786 *val = 0x0ul;
1787 return 0;
1788 }
1789
eeh_freeze_dbgfs_set(void * data,u64 val)1790 static int eeh_freeze_dbgfs_set(void *data, u64 val)
1791 {
1792 eeh_max_freezes = val;
1793 return 0;
1794 }
1795
eeh_freeze_dbgfs_get(void * data,u64 * val)1796 static int eeh_freeze_dbgfs_get(void *data, u64 *val)
1797 {
1798 *val = eeh_max_freezes;
1799 return 0;
1800 }
1801
1802 DEFINE_SIMPLE_ATTRIBUTE(eeh_enable_dbgfs_ops, eeh_enable_dbgfs_get,
1803 eeh_enable_dbgfs_set, "0x%llx\n");
1804 DEFINE_SIMPLE_ATTRIBUTE(eeh_freeze_dbgfs_ops, eeh_freeze_dbgfs_get,
1805 eeh_freeze_dbgfs_set, "0x%llx\n");
1806 #endif
1807
eeh_init_proc(void)1808 static int __init eeh_init_proc(void)
1809 {
1810 if (machine_is(pseries) || machine_is(powernv)) {
1811 proc_create("powerpc/eeh", 0, NULL, &proc_eeh_operations);
1812 #ifdef CONFIG_DEBUG_FS
1813 debugfs_create_file("eeh_enable", 0600,
1814 powerpc_debugfs_root, NULL,
1815 &eeh_enable_dbgfs_ops);
1816 debugfs_create_file("eeh_max_freezes", 0600,
1817 powerpc_debugfs_root, NULL,
1818 &eeh_freeze_dbgfs_ops);
1819 #endif
1820 }
1821
1822 return 0;
1823 }
1824 __initcall(eeh_init_proc);
1825