1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _PARISC_PDC_H
3 #define _PARISC_PDC_H
4
5 #include <uapi/asm/pdc.h>
6
7 #if !defined(__ASSEMBLY__)
8
9 extern int parisc_narrow_firmware;
10
11 extern int pdc_type;
12 extern unsigned long parisc_cell_num; /* cell number the CPU runs on (PAT) */
13 extern unsigned long parisc_cell_loc; /* cell location of CPU (PAT) */
14
15 /* Values for pdc_type */
16 #define PDC_TYPE_ILLEGAL -1
17 #define PDC_TYPE_PAT 0 /* 64-bit PAT-PDC */
18 #define PDC_TYPE_SYSTEM_MAP 1 /* 32-bit, but supports PDC_SYSTEM_MAP */
19 #define PDC_TYPE_SNAKE 2 /* Doesn't support SYSTEM_MAP */
20
21 struct pdc_chassis_info { /* for PDC_CHASSIS_INFO */
22 unsigned long actcnt; /* actual number of bytes returned */
23 unsigned long maxcnt; /* maximum number of bytes that could be returned */
24 };
25
26 struct pdc_coproc_cfg { /* for PDC_COPROC_CFG */
27 unsigned long ccr_functional;
28 unsigned long ccr_present;
29 unsigned long revision;
30 unsigned long model;
31 };
32
33 struct pdc_model { /* for PDC_MODEL */
34 unsigned long hversion;
35 unsigned long sversion;
36 unsigned long hw_id;
37 unsigned long boot_id;
38 unsigned long sw_id;
39 unsigned long sw_cap;
40 unsigned long arch_rev;
41 unsigned long pot_key;
42 unsigned long curr_key;
43 };
44
45 struct pdc_cache_cf { /* for PDC_CACHE (I/D-caches) */
46 unsigned long
47 #ifdef CONFIG_64BIT
48 cc_padW:32,
49 #endif
50 cc_alias: 4, /* alias boundaries for virtual addresses */
51 cc_block: 4, /* to determine most efficient stride */
52 cc_line : 3, /* maximum amount written back as a result of store (multiple of 16 bytes) */
53 cc_shift: 2, /* how much to shift cc_block left */
54 cc_wt : 1, /* 0 = WT-Dcache, 1 = WB-Dcache */
55 cc_sh : 2, /* 0 = separate I/D-cache, else shared I/D-cache */
56 cc_cst : 3, /* 0 = incoherent D-cache, 1=coherent D-cache */
57 cc_pad1 : 10, /* reserved */
58 cc_hv : 3; /* hversion dependent */
59 };
60
61 struct pdc_tlb_cf { /* for PDC_CACHE (I/D-TLB's) */
62 unsigned long tc_pad0:12, /* reserved */
63 #ifdef CONFIG_64BIT
64 tc_padW:32,
65 #endif
66 tc_sh : 2, /* 0 = separate I/D-TLB, else shared I/D-TLB */
67 tc_hv : 1, /* HV */
68 tc_page : 1, /* 0 = 2K page-size-machine, 1 = 4k page size */
69 tc_cst : 3, /* 0 = incoherent operations, else coherent operations */
70 tc_aid : 5, /* ITLB: width of access ids of processor (encoded!) */
71 tc_sr : 8; /* ITLB: width of space-registers (encoded) */
72 };
73
74 struct pdc_cache_info { /* main-PDC_CACHE-structure (caches & TLB's) */
75 /* I-cache */
76 unsigned long ic_size; /* size in bytes */
77 struct pdc_cache_cf ic_conf; /* configuration */
78 unsigned long ic_base; /* base-addr */
79 unsigned long ic_stride;
80 unsigned long ic_count;
81 unsigned long ic_loop;
82 /* D-cache */
83 unsigned long dc_size; /* size in bytes */
84 struct pdc_cache_cf dc_conf; /* configuration */
85 unsigned long dc_base; /* base-addr */
86 unsigned long dc_stride;
87 unsigned long dc_count;
88 unsigned long dc_loop;
89 /* Instruction-TLB */
90 unsigned long it_size; /* number of entries in I-TLB */
91 struct pdc_tlb_cf it_conf; /* I-TLB-configuration */
92 unsigned long it_sp_base;
93 unsigned long it_sp_stride;
94 unsigned long it_sp_count;
95 unsigned long it_off_base;
96 unsigned long it_off_stride;
97 unsigned long it_off_count;
98 unsigned long it_loop;
99 /* data-TLB */
100 unsigned long dt_size; /* number of entries in D-TLB */
101 struct pdc_tlb_cf dt_conf; /* D-TLB-configuration */
102 unsigned long dt_sp_base;
103 unsigned long dt_sp_stride;
104 unsigned long dt_sp_count;
105 unsigned long dt_off_base;
106 unsigned long dt_off_stride;
107 unsigned long dt_off_count;
108 unsigned long dt_loop;
109 };
110
111 #if 0
112 /* If you start using the next struct, you'll have to adjust it to
113 * work with 64-bit firmware I think -PB
114 */
115 struct pdc_iodc { /* PDC_IODC */
116 unsigned char hversion_model;
117 unsigned char hversion;
118 unsigned char spa;
119 unsigned char type;
120 unsigned int sversion_rev:4;
121 unsigned int sversion_model:19;
122 unsigned int sversion_opt:8;
123 unsigned char rev;
124 unsigned char dep;
125 unsigned char features;
126 unsigned char pad1;
127 unsigned int checksum:16;
128 unsigned int length:16;
129 unsigned int pad[15];
130 } __attribute__((aligned(8))) ;
131 #endif
132
133 #ifndef CONFIG_PA20
134 /* no BLTBs in pa2.0 processors */
135 struct pdc_btlb_info_range {
136 __u8 res00;
137 __u8 num_i;
138 __u8 num_d;
139 __u8 num_comb;
140 };
141
142 struct pdc_btlb_info { /* PDC_BLOCK_TLB, return of PDC_BTLB_INFO */
143 unsigned int min_size; /* minimum size of BTLB in pages */
144 unsigned int max_size; /* maximum size of BTLB in pages */
145 struct pdc_btlb_info_range fixed_range_info;
146 struct pdc_btlb_info_range variable_range_info;
147 };
148
149 #endif /* !CONFIG_PA20 */
150
151 struct pdc_mem_retinfo { /* PDC_MEM/PDC_MEM_MEMINFO (return info) */
152 unsigned long pdt_size;
153 unsigned long pdt_entries;
154 unsigned long pdt_status;
155 unsigned long first_dbe_loc;
156 unsigned long good_mem;
157 };
158
159 struct pdc_mem_read_pdt { /* PDC_MEM/PDC_MEM_READ_PDT (return info) */
160 unsigned long pdt_entries;
161 };
162
163 #ifdef CONFIG_64BIT
164 struct pdc_memory_table_raddr { /* PDC_MEM/PDC_MEM_TABLE (return info) */
165 unsigned long entries_returned;
166 unsigned long entries_total;
167 };
168
169 struct pdc_memory_table { /* PDC_MEM/PDC_MEM_TABLE (arguments) */
170 unsigned long paddr;
171 unsigned int pages;
172 unsigned int reserved;
173 };
174 #endif /* CONFIG_64BIT */
175
176 struct pdc_system_map_mod_info { /* PDC_SYSTEM_MAP/FIND_MODULE */
177 unsigned long mod_addr;
178 unsigned long mod_pgs;
179 unsigned long add_addrs;
180 };
181
182 struct pdc_system_map_addr_info { /* PDC_SYSTEM_MAP/FIND_ADDRESS */
183 unsigned long mod_addr;
184 unsigned long mod_pgs;
185 };
186
187 struct pdc_initiator { /* PDC_INITIATOR */
188 int host_id;
189 int factor;
190 int width;
191 int mode;
192 };
193
194 struct hardware_path {
195 char flags; /* see bit definitions below */
196 char bc[6]; /* Bus Converter routing info to a specific */
197 /* I/O adaptor (< 0 means none, > 63 resvd) */
198 char mod; /* fixed field of specified module */
199 };
200
201 /*
202 * Device path specifications used by PDC.
203 */
204 struct pdc_module_path {
205 struct hardware_path path;
206 unsigned int layers[6]; /* device-specific info (ctlr #, unit # ...) */
207 };
208
209 #ifndef CONFIG_PA20
210 /* Only used on some pre-PA2.0 boxes */
211 struct pdc_memory_map { /* PDC_MEMORY_MAP */
212 unsigned long hpa; /* mod's register set address */
213 unsigned long more_pgs; /* number of additional I/O pgs */
214 };
215 #endif
216
217 struct pdc_tod {
218 unsigned long tod_sec;
219 unsigned long tod_usec;
220 };
221
222 /* architected results from PDC_PIM/transfer hpmc on a PA1.1 machine */
223
224 struct pdc_hpmc_pim_11 { /* PDC_PIM */
225 __u32 gr[32];
226 __u32 cr[32];
227 __u32 sr[8];
228 __u32 iasq_back;
229 __u32 iaoq_back;
230 __u32 check_type;
231 __u32 cpu_state;
232 __u32 rsvd1;
233 __u32 cache_check;
234 __u32 tlb_check;
235 __u32 bus_check;
236 __u32 assists_check;
237 __u32 rsvd2;
238 __u32 assist_state;
239 __u32 responder_addr;
240 __u32 requestor_addr;
241 __u32 path_info;
242 __u64 fr[32];
243 };
244
245 /*
246 * architected results from PDC_PIM/transfer hpmc on a PA2.0 machine
247 *
248 * Note that PDC_PIM doesn't care whether or not wide mode was enabled
249 * so the results are different on PA1.1 vs. PA2.0 when in narrow mode.
250 *
251 * Note also that there are unarchitected results available, which
252 * are hversion dependent. Do a "ser pim 0 hpmc" after rebooting, since
253 * the firmware is probably the best way of printing hversion dependent
254 * data.
255 */
256
257 struct pdc_hpmc_pim_20 { /* PDC_PIM */
258 __u64 gr[32];
259 __u64 cr[32];
260 __u64 sr[8];
261 __u64 iasq_back;
262 __u64 iaoq_back;
263 __u32 check_type;
264 __u32 cpu_state;
265 __u32 cache_check;
266 __u32 tlb_check;
267 __u32 bus_check;
268 __u32 assists_check;
269 __u32 assist_state;
270 __u32 path_info;
271 __u64 responder_addr;
272 __u64 requestor_addr;
273 __u64 fr[32];
274 };
275
276 void pdc_console_init(void); /* in pdc_console.c */
277 void pdc_console_restart(void);
278
279 void setup_pdc(void); /* in inventory.c */
280
281 /* wrapper-functions from pdc.c */
282
283 int pdc_add_valid(unsigned long address);
284 int pdc_instr(unsigned int *instr);
285 int pdc_chassis_info(struct pdc_chassis_info *chassis_info, void *led_info, unsigned long len);
286 int pdc_chassis_disp(unsigned long disp);
287 int pdc_chassis_warn(unsigned long *warn);
288 int pdc_coproc_cfg(struct pdc_coproc_cfg *pdc_coproc_info);
289 int pdc_coproc_cfg_unlocked(struct pdc_coproc_cfg *pdc_coproc_info);
290 int pdc_iodc_read(unsigned long *actcnt, unsigned long hpa, unsigned int index,
291 void *iodc_data, unsigned int iodc_data_size);
292 int pdc_system_map_find_mods(struct pdc_system_map_mod_info *pdc_mod_info,
293 struct pdc_module_path *mod_path, long mod_index);
294 int pdc_system_map_find_addrs(struct pdc_system_map_addr_info *pdc_addr_info,
295 long mod_index, long addr_index);
296 int pdc_model_info(struct pdc_model *model);
297 int pdc_model_sysmodel(char *name);
298 int pdc_model_cpuid(unsigned long *cpu_id);
299 int pdc_model_versions(unsigned long *versions, int id);
300 int pdc_model_capabilities(unsigned long *capabilities);
301 int pdc_cache_info(struct pdc_cache_info *cache);
302 int pdc_spaceid_bits(unsigned long *space_bits);
303 #ifndef CONFIG_PA20
304 int pdc_btlb_info(struct pdc_btlb_info *btlb);
305 int pdc_mem_map_hpa(struct pdc_memory_map *r_addr, struct pdc_module_path *mod_path);
306 #endif /* !CONFIG_PA20 */
307 int pdc_lan_station_id(char *lan_addr, unsigned long net_hpa);
308
309 int pdc_stable_read(unsigned long staddr, void *memaddr, unsigned long count);
310 int pdc_stable_write(unsigned long staddr, void *memaddr, unsigned long count);
311 int pdc_stable_get_size(unsigned long *size);
312 int pdc_stable_verify_contents(void);
313 int pdc_stable_initialize(void);
314
315 int pdc_pci_irt_size(unsigned long *num_entries, unsigned long hpa);
316 int pdc_pci_irt(unsigned long num_entries, unsigned long hpa, void *tbl);
317
318 int pdc_get_initiator(struct hardware_path *, struct pdc_initiator *);
319 int pdc_tod_read(struct pdc_tod *tod);
320 int pdc_tod_set(unsigned long sec, unsigned long usec);
321
322 void pdc_pdt_init(void); /* in pdt.c */
323 int pdc_mem_pdt_info(struct pdc_mem_retinfo *rinfo);
324 int pdc_mem_pdt_read_entries(struct pdc_mem_read_pdt *rpdt_read,
325 unsigned long *pdt_entries_ptr);
326 #ifdef CONFIG_64BIT
327 int pdc_mem_mem_table(struct pdc_memory_table_raddr *r_addr,
328 struct pdc_memory_table *tbl, unsigned long entries);
329 #endif
330
331 void set_firmware_width(void);
332 void set_firmware_width_unlocked(void);
333 int pdc_do_firm_test_reset(unsigned long ftc_bitmap);
334 int pdc_do_reset(void);
335 int pdc_soft_power_info(unsigned long *power_reg);
336 int pdc_soft_power_button(int sw_control);
337 void pdc_io_reset(void);
338 void pdc_io_reset_devices(void);
339 int pdc_iodc_getc(void);
340 int pdc_iodc_print(const unsigned char *str, unsigned count);
341
342 void pdc_emergency_unlock(void);
343 int pdc_sti_call(unsigned long func, unsigned long flags,
344 unsigned long inptr, unsigned long outputr,
345 unsigned long glob_cfg);
346
os_id_to_string(u16 os_id)347 static inline char * os_id_to_string(u16 os_id) {
348 switch(os_id) {
349 case OS_ID_NONE: return "No OS";
350 case OS_ID_HPUX: return "HP-UX";
351 case OS_ID_MPEXL: return "MPE-iX";
352 case OS_ID_OSF: return "OSF";
353 case OS_ID_HPRT: return "HP-RT";
354 case OS_ID_NOVEL: return "Novell Netware";
355 case OS_ID_LINUX: return "Linux";
356 default: return "Unknown";
357 }
358 }
359
360 #endif /* !defined(__ASSEMBLY__) */
361 #endif /* _PARISC_PDC_H */
362