1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * ld script for the x86 kernel 4 * 5 * Historic 32-bit version written by Martin Mares <mj@atrey.karlin.mff.cuni.cz> 6 * 7 * Modernisation, unification and other changes and fixes: 8 * Copyright (C) 2007-2009 Sam Ravnborg <sam@ravnborg.org> 9 * 10 * 11 * Don't define absolute symbols until and unless you know that symbol 12 * value is should remain constant even if kernel image is relocated 13 * at run time. Absolute symbols are not relocated. If symbol value should 14 * change if kernel is relocated, make the symbol section relative and 15 * put it inside the section definition. 16 */ 17 18#ifdef CONFIG_X86_32 19#define LOAD_OFFSET __PAGE_OFFSET 20#else 21#define LOAD_OFFSET __START_KERNEL_map 22#endif 23 24#include <asm-generic/vmlinux.lds.h> 25#include <asm/asm-offsets.h> 26#include <asm/thread_info.h> 27#include <asm/page_types.h> 28#include <asm/orc_lookup.h> 29#include <asm/cache.h> 30#include <asm/boot.h> 31 32#undef i386 /* in case the preprocessor is a 32bit one */ 33 34OUTPUT_FORMAT(CONFIG_OUTPUT_FORMAT, CONFIG_OUTPUT_FORMAT, CONFIG_OUTPUT_FORMAT) 35 36#ifdef CONFIG_X86_32 37OUTPUT_ARCH(i386) 38ENTRY(phys_startup_32) 39jiffies = jiffies_64; 40#else 41OUTPUT_ARCH(i386:x86-64) 42ENTRY(phys_startup_64) 43jiffies_64 = jiffies; 44#endif 45 46#if defined(CONFIG_X86_64) 47/* 48 * On 64-bit, align RODATA to 2MB so we retain large page mappings for 49 * boundaries spanning kernel text, rodata and data sections. 50 * 51 * However, kernel identity mappings will have different RWX permissions 52 * to the pages mapping to text and to the pages padding (which are freed) the 53 * text section. Hence kernel identity mappings will be broken to smaller 54 * pages. For 64-bit, kernel text and kernel identity mappings are different, 55 * so we can enable protection checks as well as retain 2MB large page 56 * mappings for kernel text. 57 */ 58#define X64_ALIGN_RODATA_BEGIN . = ALIGN(HPAGE_SIZE); 59 60#define X64_ALIGN_RODATA_END \ 61 . = ALIGN(HPAGE_SIZE); \ 62 __end_rodata_hpage_align = .; 63 64#define ALIGN_ENTRY_TEXT_BEGIN . = ALIGN(PMD_SIZE); 65#define ALIGN_ENTRY_TEXT_END . = ALIGN(PMD_SIZE); 66 67#else 68 69#define X64_ALIGN_RODATA_BEGIN 70#define X64_ALIGN_RODATA_END 71 72#define ALIGN_ENTRY_TEXT_BEGIN 73#define ALIGN_ENTRY_TEXT_END 74 75#endif 76 77PHDRS { 78 text PT_LOAD FLAGS(5); /* R_E */ 79 data PT_LOAD FLAGS(6); /* RW_ */ 80#ifdef CONFIG_X86_64 81#ifdef CONFIG_SMP 82 percpu PT_LOAD FLAGS(6); /* RW_ */ 83#endif 84 init PT_LOAD FLAGS(7); /* RWE */ 85#endif 86 note PT_NOTE FLAGS(0); /* ___ */ 87} 88 89SECTIONS 90{ 91#ifdef CONFIG_X86_32 92 . = LOAD_OFFSET + LOAD_PHYSICAL_ADDR; 93 phys_startup_32 = ABSOLUTE(startup_32 - LOAD_OFFSET); 94#else 95 . = __START_KERNEL; 96 phys_startup_64 = ABSOLUTE(startup_64 - LOAD_OFFSET); 97#endif 98 99 /* Text and read-only data */ 100 .text : AT(ADDR(.text) - LOAD_OFFSET) { 101 _text = .; 102 _stext = .; 103 /* bootstrapping code */ 104 HEAD_TEXT 105 . = ALIGN(8); 106 TEXT_TEXT 107 SCHED_TEXT 108 CPUIDLE_TEXT 109 LOCK_TEXT 110 KPROBES_TEXT 111 ALIGN_ENTRY_TEXT_BEGIN 112 ENTRY_TEXT 113 IRQENTRY_TEXT 114 ALIGN_ENTRY_TEXT_END 115 SOFTIRQENTRY_TEXT 116 *(.fixup) 117 *(.gnu.warning) 118 119#ifdef CONFIG_X86_64 120 . = ALIGN(PAGE_SIZE); 121 VMLINUX_SYMBOL(__entry_trampoline_start) = .; 122 _entry_trampoline = .; 123 *(.entry_trampoline) 124 . = ALIGN(PAGE_SIZE); 125 VMLINUX_SYMBOL(__entry_trampoline_end) = .; 126 ASSERT(. - _entry_trampoline == PAGE_SIZE, "entry trampoline is too big"); 127#endif 128 129#ifdef CONFIG_RETPOLINE 130 __indirect_thunk_start = .; 131 *(.text.__x86.indirect_thunk) 132 __indirect_thunk_end = .; 133#endif 134 135 /* End of text section */ 136 _etext = .; 137 } :text = 0x9090 138 139 NOTES :text :note 140 141 EXCEPTION_TABLE(16) :text = 0x9090 142 143 /* .text should occupy whole number of pages */ 144 . = ALIGN(PAGE_SIZE); 145 X64_ALIGN_RODATA_BEGIN 146 RO_DATA(PAGE_SIZE) 147 X64_ALIGN_RODATA_END 148 149 /* Data */ 150 .data : AT(ADDR(.data) - LOAD_OFFSET) { 151 /* Start of data section */ 152 _sdata = .; 153 154 /* init_task */ 155 INIT_TASK_DATA(THREAD_SIZE) 156 157#ifdef CONFIG_X86_32 158 /* 32 bit has nosave before _edata */ 159 NOSAVE_DATA 160#endif 161 162 PAGE_ALIGNED_DATA(PAGE_SIZE) 163 164 CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES) 165 166 DATA_DATA 167 CONSTRUCTORS 168 169 /* rarely changed data like cpu maps */ 170 READ_MOSTLY_DATA(INTERNODE_CACHE_BYTES) 171 172 /* End of data section */ 173 _edata = .; 174 } :data 175 176 BUG_TABLE 177 178 ORC_UNWIND_TABLE 179 180 . = ALIGN(PAGE_SIZE); 181 __vvar_page = .; 182 183 .vvar : AT(ADDR(.vvar) - LOAD_OFFSET) { 184 /* work around gold bug 13023 */ 185 __vvar_beginning_hack = .; 186 187 /* Place all vvars at the offsets in asm/vvar.h. */ 188#define EMIT_VVAR(name, offset) \ 189 . = __vvar_beginning_hack + offset; \ 190 *(.vvar_ ## name) 191#define __VVAR_KERNEL_LDS 192#include <asm/vvar.h> 193#undef __VVAR_KERNEL_LDS 194#undef EMIT_VVAR 195 196 /* 197 * Pad the rest of the page with zeros. Otherwise the loader 198 * can leave garbage here. 199 */ 200 . = __vvar_beginning_hack + PAGE_SIZE; 201 } :data 202 203 . = ALIGN(__vvar_page + PAGE_SIZE, PAGE_SIZE); 204 205 /* Init code and data - will be freed after init */ 206 . = ALIGN(PAGE_SIZE); 207 .init.begin : AT(ADDR(.init.begin) - LOAD_OFFSET) { 208 __init_begin = .; /* paired with __init_end */ 209 } 210 211#if defined(CONFIG_X86_64) && defined(CONFIG_SMP) 212 /* 213 * percpu offsets are zero-based on SMP. PERCPU_VADDR() changes the 214 * output PHDR, so the next output section - .init.text - should 215 * start another segment - init. 216 */ 217 PERCPU_VADDR(INTERNODE_CACHE_BYTES, 0, :percpu) 218 ASSERT(SIZEOF(.data..percpu) < CONFIG_PHYSICAL_START, 219 "per-CPU data too large - increase CONFIG_PHYSICAL_START") 220#endif 221 222 INIT_TEXT_SECTION(PAGE_SIZE) 223#ifdef CONFIG_X86_64 224 :init 225#endif 226 227 /* 228 * Section for code used exclusively before alternatives are run. All 229 * references to such code must be patched out by alternatives, normally 230 * by using X86_FEATURE_ALWAYS CPU feature bit. 231 * 232 * See static_cpu_has() for an example. 233 */ 234 .altinstr_aux : AT(ADDR(.altinstr_aux) - LOAD_OFFSET) { 235 *(.altinstr_aux) 236 } 237 238 INIT_DATA_SECTION(16) 239 240 .x86_cpu_dev.init : AT(ADDR(.x86_cpu_dev.init) - LOAD_OFFSET) { 241 __x86_cpu_dev_start = .; 242 *(.x86_cpu_dev.init) 243 __x86_cpu_dev_end = .; 244 } 245 246#ifdef CONFIG_X86_INTEL_MID 247 .x86_intel_mid_dev.init : AT(ADDR(.x86_intel_mid_dev.init) - \ 248 LOAD_OFFSET) { 249 __x86_intel_mid_dev_start = .; 250 *(.x86_intel_mid_dev.init) 251 __x86_intel_mid_dev_end = .; 252 } 253#endif 254 255 /* 256 * start address and size of operations which during runtime 257 * can be patched with virtualization friendly instructions or 258 * baremetal native ones. Think page table operations. 259 * Details in paravirt_types.h 260 */ 261 . = ALIGN(8); 262 .parainstructions : AT(ADDR(.parainstructions) - LOAD_OFFSET) { 263 __parainstructions = .; 264 *(.parainstructions) 265 __parainstructions_end = .; 266 } 267 268 /* 269 * struct alt_inst entries. From the header (alternative.h): 270 * "Alternative instructions for different CPU types or capabilities" 271 * Think locking instructions on spinlocks. 272 */ 273 . = ALIGN(8); 274 .altinstructions : AT(ADDR(.altinstructions) - LOAD_OFFSET) { 275 __alt_instructions = .; 276 *(.altinstructions) 277 __alt_instructions_end = .; 278 } 279 280 /* 281 * And here are the replacement instructions. The linker sticks 282 * them as binary blobs. The .altinstructions has enough data to 283 * get the address and the length of them to patch the kernel safely. 284 */ 285 .altinstr_replacement : AT(ADDR(.altinstr_replacement) - LOAD_OFFSET) { 286 *(.altinstr_replacement) 287 } 288 289 /* 290 * struct iommu_table_entry entries are injected in this section. 291 * It is an array of IOMMUs which during run time gets sorted depending 292 * on its dependency order. After rootfs_initcall is complete 293 * this section can be safely removed. 294 */ 295 .iommu_table : AT(ADDR(.iommu_table) - LOAD_OFFSET) { 296 __iommu_table = .; 297 *(.iommu_table) 298 __iommu_table_end = .; 299 } 300 301 . = ALIGN(8); 302 .apicdrivers : AT(ADDR(.apicdrivers) - LOAD_OFFSET) { 303 __apicdrivers = .; 304 *(.apicdrivers); 305 __apicdrivers_end = .; 306 } 307 308 . = ALIGN(8); 309 /* 310 * .exit.text is discard at runtime, not link time, to deal with 311 * references from .altinstructions and .eh_frame 312 */ 313 .exit.text : AT(ADDR(.exit.text) - LOAD_OFFSET) { 314 EXIT_TEXT 315 } 316 317 .exit.data : AT(ADDR(.exit.data) - LOAD_OFFSET) { 318 EXIT_DATA 319 } 320 321#if !defined(CONFIG_X86_64) || !defined(CONFIG_SMP) 322 PERCPU_SECTION(INTERNODE_CACHE_BYTES) 323#endif 324 325 . = ALIGN(PAGE_SIZE); 326 327 /* freed after init ends here */ 328 .init.end : AT(ADDR(.init.end) - LOAD_OFFSET) { 329 __init_end = .; 330 } 331 332 /* 333 * smp_locks might be freed after init 334 * start/end must be page aligned 335 */ 336 . = ALIGN(PAGE_SIZE); 337 .smp_locks : AT(ADDR(.smp_locks) - LOAD_OFFSET) { 338 __smp_locks = .; 339 *(.smp_locks) 340 . = ALIGN(PAGE_SIZE); 341 __smp_locks_end = .; 342 } 343 344#ifdef CONFIG_X86_64 345 .data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) { 346 NOSAVE_DATA 347 } 348#endif 349 350 /* BSS */ 351 . = ALIGN(PAGE_SIZE); 352 .bss : AT(ADDR(.bss) - LOAD_OFFSET) { 353 __bss_start = .; 354 *(.bss..page_aligned) 355 *(.bss) 356 . = ALIGN(PAGE_SIZE); 357 __bss_stop = .; 358 } 359 360 . = ALIGN(PAGE_SIZE); 361 .brk : AT(ADDR(.brk) - LOAD_OFFSET) { 362 __brk_base = .; 363 . += 64 * 1024; /* 64k alignment slop space */ 364 *(.brk_reservation) /* areas brk users have reserved */ 365 __brk_limit = .; 366 } 367 368 . = ALIGN(PAGE_SIZE); /* keep VO_INIT_SIZE page aligned */ 369 _end = .; 370 371 STABS_DEBUG 372 DWARF_DEBUG 373 374 /* Sections to be discarded */ 375 DISCARDS 376 /DISCARD/ : { 377 *(.eh_frame) 378 } 379} 380 381 382#ifdef CONFIG_X86_32 383/* 384 * The ASSERT() sink to . is intentional, for binutils 2.14 compatibility: 385 */ 386. = ASSERT((_end - LOAD_OFFSET <= KERNEL_IMAGE_SIZE), 387 "kernel image bigger than KERNEL_IMAGE_SIZE"); 388#else 389/* 390 * Per-cpu symbols which need to be offset from __per_cpu_load 391 * for the boot processor. 392 */ 393#define INIT_PER_CPU(x) init_per_cpu__##x = ABSOLUTE(x) + __per_cpu_load 394INIT_PER_CPU(gdt_page); 395INIT_PER_CPU(irq_stack_union); 396 397/* 398 * Build-time check on the image size: 399 */ 400. = ASSERT((_end - _text <= KERNEL_IMAGE_SIZE), 401 "kernel image bigger than KERNEL_IMAGE_SIZE"); 402 403#ifdef CONFIG_SMP 404. = ASSERT((irq_stack_union == 0), 405 "irq_stack_union is not at start of per-cpu area"); 406#endif 407 408#endif /* CONFIG_X86_32 */ 409 410#ifdef CONFIG_KEXEC_CORE 411#include <asm/kexec.h> 412 413. = ASSERT(kexec_control_code_size <= KEXEC_CONTROL_CODE_MAX_SIZE, 414 "kexec control code size is too big"); 415#endif 416 417