| /drivers/gpu/drm/bridge/analogix/ |
| D | analogix_dp_core.c | 261 int lane, lane_count, pll_tries, retval; in analogix_dp_link_start() local
329 static int analogix_dp_clock_recovery_ok(u8 link_status[2], int lane_count) in analogix_dp_clock_recovery_ok()
343 int lane_count) in analogix_dp_channel_eq_ok()
439 int lane, lane_count; in analogix_dp_get_adjust_training_lane() local
462 int lane, lane_count, retval; in analogix_dp_process_clock_recovery() local
534 int lane, lane_count, retval; in analogix_dp_process_equalizer_training() local
623 u8 *lane_count) in analogix_dp_get_max_rx_lane_count()
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| D | analogix_dp_core.h | 148 u8 lane_count; member
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| /drivers/gpu/drm/i915/ |
| D | intel_dsi.c | 39 static u16 txbyteclkhs(u16 pixels, int bpp, int lane_count, in txbyteclkhs()
47 static u16 pixels_from_txbyteclkhs(u16 clk_hs, int bpp, int lane_count, in pixels_from_txbyteclkhs()
1078 unsigned int lane_count = intel_dsi->lane_count; in bxt_dsi_get_pipe_config() local
1294 unsigned int lane_count = intel_dsi->lane_count; in set_dsi_timings() local
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| D | intel_dsi.h | 62 unsigned int lane_count; member
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| D | intel_dsi_pll.c | 42 int lane_count) in dsi_clk_from_pclk()
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| D | intel_dp_mst.c | 44 int lane_count, slots = 0; in intel_dp_mst_compute_config() local
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| D | intel_dpio_phy.c | 571 uint8_t lane_count) in bxt_ddi_phy_calc_lane_lat_optim_mask()
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| D | intel_dp.c | 338 uint8_t lane_count) in intel_dp_link_params_valid()
357 int link_rate, uint8_t lane_count) in intel_dp_get_link_train_fallback_values()
1652 int lane_count, clock; in intel_dp_compute_config() local
1855 int link_rate, uint8_t lane_count, in intel_dp_set_link_params()
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| D | intel_drv.h | 727 uint8_t lane_count; member
968 uint8_t lane_count; member
1544 static inline unsigned int intel_dp_unused_lane_mask(int lane_count) in intel_dp_unused_lane_mask()
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| D | intel_ddi.c | 2137 int link_rate, uint32_t lane_count, in intel_ddi_pre_enable_dp()
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| D | intel_display.c | 10702 unsigned int lane_count, struct intel_link_m_n *m_n) in intel_dump_m_n_config()
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| /drivers/gpu/drm/gma500/ |
| D | mdfld_dsi_dpi.c | 470 int lane_count = dsi_config->lane_count; in mdfld_dsi_dpi_controller_init() local
773 int lane_count = dsi_config->lane_count; in mdfld_mipi_config() local
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| D | cdv_intel_dp.c | 264 uint8_t lane_count; member
900 int lane_count, clock; in cdv_intel_dp_mode_fixup() local
993 int lane_count = 4, bpp = 24; in cdv_intel_dp_set_m_n() local
1346 cdv_intel_clock_recovery_ok(uint8_t link_status[DP_LINK_STATUS_SIZE], int lane_count) in cdv_intel_clock_recovery_ok()
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| D | mdfld_dsi_output.h | 260 int lane_count; member
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| /drivers/gpu/drm/ |
| D | drm_dp_helper.c | 61 int lane_count) in drm_dp_channel_eq_ok()
81 int lane_count) in drm_dp_clock_recovery_ok()
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| /drivers/gpu/drm/bridge/ |
| D | parade-ps8622.c | 63 u32 lane_count; member
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| /drivers/gpu/drm/amd/amdgpu/ |
| D | atombios_dp.c | 207 int lane_count, in amdgpu_atombios_dp_get_adjust_train()
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| /drivers/gpu/drm/radeon/ |
| D | atombios_dp.c | 257 int lane_count, in dp_get_adjust_train()
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| /drivers/edac/ |
| D | ppc4xx_edac.c | 444 const unsigned int lane_count = 16; in ppc4xx_edac_generate_lane_message() local
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