1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef ARCH_X86_CPU_H 3 #define ARCH_X86_CPU_H 4 5 /* attempt to consolidate cpu attributes */ 6 struct cpu_dev { 7 const char *c_vendor; 8 9 /* some have two possibilities for cpuid string */ 10 const char *c_ident[2]; 11 12 void (*c_early_init)(struct cpuinfo_x86 *); 13 void (*c_bsp_init)(struct cpuinfo_x86 *); 14 void (*c_init)(struct cpuinfo_x86 *); 15 void (*c_identify)(struct cpuinfo_x86 *); 16 void (*c_detect_tlb)(struct cpuinfo_x86 *); 17 void (*c_bsp_resume)(struct cpuinfo_x86 *); 18 int c_x86_vendor; 19 #ifdef CONFIG_X86_32 20 /* Optional vendor specific routine to obtain the cache size. */ 21 unsigned int (*legacy_cache_size)(struct cpuinfo_x86 *, 22 unsigned int); 23 24 /* Family/stepping-based lookup table for model names. */ 25 struct legacy_cpu_model_info { 26 int family; 27 const char *model_names[16]; 28 } legacy_models[5]; 29 #endif 30 }; 31 32 struct _tlb_table { 33 unsigned char descriptor; 34 char tlb_type; 35 unsigned int entries; 36 /* unsigned int ways; */ 37 char info[128]; 38 }; 39 40 #define cpu_dev_register(cpu_devX) \ 41 static const struct cpu_dev *const __cpu_dev_##cpu_devX __used \ 42 __attribute__((__section__(".x86_cpu_dev.init"))) = \ 43 &cpu_devX; 44 45 extern const struct cpu_dev *const __x86_cpu_dev_start[], 46 *const __x86_cpu_dev_end[]; 47 48 #ifdef CONFIG_CPU_SUP_INTEL 49 enum tsx_ctrl_states { 50 TSX_CTRL_ENABLE, 51 TSX_CTRL_DISABLE, 52 TSX_CTRL_NOT_SUPPORTED, 53 }; 54 55 extern __ro_after_init enum tsx_ctrl_states tsx_ctrl_state; 56 57 extern void __init tsx_init(void); 58 extern void tsx_enable(void); 59 extern void tsx_disable(void); 60 #else tsx_init(void)61static inline void tsx_init(void) { } 62 #endif /* CONFIG_CPU_SUP_INTEL */ 63 64 extern void get_cpu_cap(struct cpuinfo_x86 *c); 65 extern void cpu_detect_cache_sizes(struct cpuinfo_x86 *c); 66 extern int detect_extended_topology_early(struct cpuinfo_x86 *c); 67 extern int detect_ht_early(struct cpuinfo_x86 *c); 68 69 unsigned int aperfmperf_get_khz(int cpu); 70 71 extern void x86_spec_ctrl_setup_ap(void); 72 73 extern u64 x86_read_arch_cap_msr(void); 74 75 #endif /* ARCH_X86_CPU_H */ 76