1 /*
2 * Copyright (C) 2015-2017 Netronome Systems, Inc.
3 *
4 * This software is dual licensed under the GNU General License Version 2,
5 * June 1991 as shown in the file COPYING in the top-level directory of this
6 * source tree or the BSD 2-Clause License provided below. You have the
7 * option to license this software under the complete terms of either license.
8 *
9 * The BSD 2-Clause License:
10 *
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
14 *
15 * 1. Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
17 * disclaimer.
18 *
19 * 2. Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
32 */
33
34 /*
35 * nfp_net.h
36 * Declarations for Netronome network device driver.
37 * Authors: Jakub Kicinski <jakub.kicinski@netronome.com>
38 * Jason McMullan <jason.mcmullan@netronome.com>
39 * Rolf Neugebauer <rolf.neugebauer@netronome.com>
40 */
41
42 #ifndef _NFP_NET_H_
43 #define _NFP_NET_H_
44
45 #include <linux/interrupt.h>
46 #include <linux/list.h>
47 #include <linux/netdevice.h>
48 #include <linux/pci.h>
49 #include <linux/io-64-nonatomic-hi-lo.h>
50
51 #include "nfp_net_ctrl.h"
52
53 #define nn_pr(nn, lvl, fmt, args...) \
54 ({ \
55 struct nfp_net *__nn = (nn); \
56 \
57 if (__nn->dp.netdev) \
58 netdev_printk(lvl, __nn->dp.netdev, fmt, ## args); \
59 else \
60 dev_printk(lvl, __nn->dp.dev, "ctrl: " fmt, ## args); \
61 })
62
63 #define nn_err(nn, fmt, args...) nn_pr(nn, KERN_ERR, fmt, ## args)
64 #define nn_warn(nn, fmt, args...) nn_pr(nn, KERN_WARNING, fmt, ## args)
65 #define nn_info(nn, fmt, args...) nn_pr(nn, KERN_INFO, fmt, ## args)
66 #define nn_dbg(nn, fmt, args...) nn_pr(nn, KERN_DEBUG, fmt, ## args)
67
68 #define nn_dp_warn(dp, fmt, args...) \
69 ({ \
70 struct nfp_net_dp *__dp = (dp); \
71 \
72 if (unlikely(net_ratelimit())) { \
73 if (__dp->netdev) \
74 netdev_warn(__dp->netdev, fmt, ## args); \
75 else \
76 dev_warn(__dp->dev, fmt, ## args); \
77 } \
78 })
79
80 /* Max time to wait for NFP to respond on updates (in seconds) */
81 #define NFP_NET_POLL_TIMEOUT 5
82
83 /* Interval for reading offloaded filter stats */
84 #define NFP_NET_STAT_POLL_IVL msecs_to_jiffies(100)
85
86 /* Bar allocation */
87 #define NFP_NET_CTRL_BAR 0
88 #define NFP_NET_Q0_BAR 2
89 #define NFP_NET_Q1_BAR 4 /* OBSOLETE */
90
91 /* Max bits in DMA address */
92 #define NFP_NET_MAX_DMA_BITS 40
93
94 /* Default size for MTU and freelist buffer sizes */
95 #define NFP_NET_DEFAULT_MTU 1500
96
97 /* Maximum number of bytes prepended to a packet */
98 #define NFP_NET_MAX_PREPEND 64
99
100 /* Interrupt definitions */
101 #define NFP_NET_NON_Q_VECTORS 2
102 #define NFP_NET_IRQ_LSC_IDX 0
103 #define NFP_NET_IRQ_EXN_IDX 1
104 #define NFP_NET_MIN_VNIC_IRQS (NFP_NET_NON_Q_VECTORS + 1)
105
106 /* Queue/Ring definitions */
107 #define NFP_NET_MAX_TX_RINGS 64 /* Max. # of Tx rings per device */
108 #define NFP_NET_MAX_RX_RINGS 64 /* Max. # of Rx rings per device */
109 #define NFP_NET_MAX_R_VECS (NFP_NET_MAX_TX_RINGS > NFP_NET_MAX_RX_RINGS ? \
110 NFP_NET_MAX_TX_RINGS : NFP_NET_MAX_RX_RINGS)
111 #define NFP_NET_MAX_IRQS (NFP_NET_NON_Q_VECTORS + NFP_NET_MAX_R_VECS)
112
113 #define NFP_NET_MIN_TX_DESCS 256 /* Min. # of Tx descs per ring */
114 #define NFP_NET_MIN_RX_DESCS 256 /* Min. # of Rx descs per ring */
115 #define NFP_NET_MAX_TX_DESCS (256 * 1024) /* Max. # of Tx descs per ring */
116 #define NFP_NET_MAX_RX_DESCS (256 * 1024) /* Max. # of Rx descs per ring */
117
118 #define NFP_NET_TX_DESCS_DEFAULT 4096 /* Default # of Tx descs per ring */
119 #define NFP_NET_RX_DESCS_DEFAULT 4096 /* Default # of Rx descs per ring */
120
121 #define NFP_NET_FL_BATCH 16 /* Add freelist in this Batch size */
122 #define NFP_NET_XDP_MAX_COMPLETE 2048 /* XDP bufs to reclaim in NAPI poll */
123
124 /* Offload definitions */
125 #define NFP_NET_N_VXLAN_PORTS (NFP_NET_CFG_VXLAN_SZ / sizeof(__be16))
126
127 #define NFP_NET_RX_BUF_HEADROOM (NET_SKB_PAD + NET_IP_ALIGN)
128 #define NFP_NET_RX_BUF_NON_DATA (NFP_NET_RX_BUF_HEADROOM + \
129 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)))
130
131 /* Forward declarations */
132 struct nfp_cpp;
133 struct nfp_eth_table_port;
134 struct nfp_net;
135 struct nfp_net_r_vector;
136 struct nfp_port;
137
138 /* Convenience macro for wrapping descriptor index on ring size */
139 #define D_IDX(ring, idx) ((idx) & ((ring)->cnt - 1))
140
141 /* Convenience macro for writing dma address into RX/TX descriptors */
142 #define nfp_desc_set_dma_addr(desc, dma_addr) \
143 do { \
144 __typeof(desc) __d = (desc); \
145 dma_addr_t __addr = (dma_addr); \
146 \
147 __d->dma_addr_lo = cpu_to_le32(lower_32_bits(__addr)); \
148 __d->dma_addr_hi = upper_32_bits(__addr) & 0xff; \
149 } while (0)
150
151 /* TX descriptor format */
152
153 #define PCIE_DESC_TX_EOP BIT(7)
154 #define PCIE_DESC_TX_OFFSET_MASK GENMASK(6, 0)
155 #define PCIE_DESC_TX_MSS_MASK GENMASK(13, 0)
156
157 /* Flags in the host TX descriptor */
158 #define PCIE_DESC_TX_CSUM BIT(7)
159 #define PCIE_DESC_TX_IP4_CSUM BIT(6)
160 #define PCIE_DESC_TX_TCP_CSUM BIT(5)
161 #define PCIE_DESC_TX_UDP_CSUM BIT(4)
162 #define PCIE_DESC_TX_VLAN BIT(3)
163 #define PCIE_DESC_TX_LSO BIT(2)
164 #define PCIE_DESC_TX_ENCAP BIT(1)
165 #define PCIE_DESC_TX_O_IP4_CSUM BIT(0)
166
167 struct nfp_net_tx_desc {
168 union {
169 struct {
170 u8 dma_addr_hi; /* High bits of host buf address */
171 __le16 dma_len; /* Length to DMA for this desc */
172 u8 offset_eop; /* Offset in buf where pkt starts +
173 * highest bit is eop flag.
174 */
175 __le32 dma_addr_lo; /* Low 32bit of host buf addr */
176
177 __le16 mss; /* MSS to be used for LSO */
178 u8 lso_hdrlen; /* LSO, TCP payload offset */
179 u8 flags; /* TX Flags, see @PCIE_DESC_TX_* */
180 union {
181 struct {
182 u8 l3_offset; /* L3 header offset */
183 u8 l4_offset; /* L4 header offset */
184 };
185 __le16 vlan; /* VLAN tag to add if indicated */
186 };
187 __le16 data_len; /* Length of frame + meta data */
188 } __packed;
189 __le32 vals[4];
190 };
191 };
192
193 /**
194 * struct nfp_net_tx_buf - software TX buffer descriptor
195 * @skb: sk_buff associated with this buffer
196 * @dma_addr: DMA mapping address of the buffer
197 * @fidx: Fragment index (-1 for the head and [0..nr_frags-1] for frags)
198 * @pkt_cnt: Number of packets to be produced out of the skb associated
199 * with this buffer (valid only on the head's buffer).
200 * Will be 1 for all non-TSO packets.
201 * @real_len: Number of bytes which to be produced out of the skb (valid only
202 * on the head's buffer). Equal to skb->len for non-TSO packets.
203 */
204 struct nfp_net_tx_buf {
205 union {
206 struct sk_buff *skb;
207 void *frag;
208 };
209 dma_addr_t dma_addr;
210 short int fidx;
211 u16 pkt_cnt;
212 u32 real_len;
213 };
214
215 /**
216 * struct nfp_net_tx_ring - TX ring structure
217 * @r_vec: Back pointer to ring vector structure
218 * @idx: Ring index from Linux's perspective
219 * @qcidx: Queue Controller Peripheral (QCP) queue index for the TX queue
220 * @qcp_q: Pointer to base of the QCP TX queue
221 * @cnt: Size of the queue in number of descriptors
222 * @wr_p: TX ring write pointer (free running)
223 * @rd_p: TX ring read pointer (free running)
224 * @qcp_rd_p: Local copy of QCP TX queue read pointer
225 * @wr_ptr_add: Accumulated number of buffers to add to QCP write pointer
226 * (used for .xmit_more delayed kick)
227 * @txbufs: Array of transmitted TX buffers, to free on transmit
228 * @txds: Virtual address of TX ring in host memory
229 * @dma: DMA address of the TX ring
230 * @size: Size, in bytes, of the TX ring (needed to free)
231 * @is_xdp: Is this a XDP TX ring?
232 */
233 struct nfp_net_tx_ring {
234 struct nfp_net_r_vector *r_vec;
235
236 u32 idx;
237 int qcidx;
238 u8 __iomem *qcp_q;
239
240 u32 cnt;
241 u32 wr_p;
242 u32 rd_p;
243 u32 qcp_rd_p;
244
245 u32 wr_ptr_add;
246
247 struct nfp_net_tx_buf *txbufs;
248 struct nfp_net_tx_desc *txds;
249
250 dma_addr_t dma;
251 unsigned int size;
252 bool is_xdp;
253 } ____cacheline_aligned;
254
255 /* RX and freelist descriptor format */
256
257 #define PCIE_DESC_RX_DD BIT(7)
258 #define PCIE_DESC_RX_META_LEN_MASK GENMASK(6, 0)
259
260 /* Flags in the RX descriptor */
261 #define PCIE_DESC_RX_RSS cpu_to_le16(BIT(15))
262 #define PCIE_DESC_RX_I_IP4_CSUM cpu_to_le16(BIT(14))
263 #define PCIE_DESC_RX_I_IP4_CSUM_OK cpu_to_le16(BIT(13))
264 #define PCIE_DESC_RX_I_TCP_CSUM cpu_to_le16(BIT(12))
265 #define PCIE_DESC_RX_I_TCP_CSUM_OK cpu_to_le16(BIT(11))
266 #define PCIE_DESC_RX_I_UDP_CSUM cpu_to_le16(BIT(10))
267 #define PCIE_DESC_RX_I_UDP_CSUM_OK cpu_to_le16(BIT(9))
268 #define PCIE_DESC_RX_BPF cpu_to_le16(BIT(8))
269 #define PCIE_DESC_RX_EOP cpu_to_le16(BIT(7))
270 #define PCIE_DESC_RX_IP4_CSUM cpu_to_le16(BIT(6))
271 #define PCIE_DESC_RX_IP4_CSUM_OK cpu_to_le16(BIT(5))
272 #define PCIE_DESC_RX_TCP_CSUM cpu_to_le16(BIT(4))
273 #define PCIE_DESC_RX_TCP_CSUM_OK cpu_to_le16(BIT(3))
274 #define PCIE_DESC_RX_UDP_CSUM cpu_to_le16(BIT(2))
275 #define PCIE_DESC_RX_UDP_CSUM_OK cpu_to_le16(BIT(1))
276 #define PCIE_DESC_RX_VLAN cpu_to_le16(BIT(0))
277
278 #define PCIE_DESC_RX_CSUM_ALL (PCIE_DESC_RX_IP4_CSUM | \
279 PCIE_DESC_RX_TCP_CSUM | \
280 PCIE_DESC_RX_UDP_CSUM | \
281 PCIE_DESC_RX_I_IP4_CSUM | \
282 PCIE_DESC_RX_I_TCP_CSUM | \
283 PCIE_DESC_RX_I_UDP_CSUM)
284 #define PCIE_DESC_RX_CSUM_OK_SHIFT 1
285 #define __PCIE_DESC_RX_CSUM_ALL le16_to_cpu(PCIE_DESC_RX_CSUM_ALL)
286 #define __PCIE_DESC_RX_CSUM_ALL_OK (__PCIE_DESC_RX_CSUM_ALL >> \
287 PCIE_DESC_RX_CSUM_OK_SHIFT)
288
289 struct nfp_net_rx_desc {
290 union {
291 struct {
292 u8 dma_addr_hi; /* High bits of the buf address */
293 __le16 reserved; /* Must be zero */
294 u8 meta_len_dd; /* Must be zero */
295
296 __le32 dma_addr_lo; /* Low bits of the buffer address */
297 } __packed fld;
298
299 struct {
300 __le16 data_len; /* Length of the frame + meta data */
301 u8 reserved;
302 u8 meta_len_dd; /* Length of meta data prepended +
303 * descriptor done flag.
304 */
305
306 __le16 flags; /* RX flags. See @PCIE_DESC_RX_* */
307 __le16 vlan; /* VLAN if stripped */
308 } __packed rxd;
309
310 __le32 vals[2];
311 };
312 };
313
314 #define NFP_NET_META_FIELD_MASK GENMASK(NFP_NET_META_FIELD_SIZE - 1, 0)
315
316 struct nfp_meta_parsed {
317 u8 hash_type;
318 u8 csum_type;
319 u32 hash;
320 u32 mark;
321 u32 portid;
322 __wsum csum;
323 };
324
325 struct nfp_net_rx_hash {
326 __be32 hash_type;
327 __be32 hash;
328 };
329
330 /**
331 * struct nfp_net_rx_buf - software RX buffer descriptor
332 * @frag: page fragment buffer
333 * @dma_addr: DMA mapping address of the buffer
334 */
335 struct nfp_net_rx_buf {
336 void *frag;
337 dma_addr_t dma_addr;
338 };
339
340 /**
341 * struct nfp_net_rx_ring - RX ring structure
342 * @r_vec: Back pointer to ring vector structure
343 * @cnt: Size of the queue in number of descriptors
344 * @wr_p: FL/RX ring write pointer (free running)
345 * @rd_p: FL/RX ring read pointer (free running)
346 * @idx: Ring index from Linux's perspective
347 * @fl_qcidx: Queue Controller Peripheral (QCP) queue index for the freelist
348 * @qcp_fl: Pointer to base of the QCP freelist queue
349 * @rxbufs: Array of transmitted FL/RX buffers
350 * @rxds: Virtual address of FL/RX ring in host memory
351 * @dma: DMA address of the FL/RX ring
352 * @size: Size, in bytes, of the FL/RX ring (needed to free)
353 */
354 struct nfp_net_rx_ring {
355 struct nfp_net_r_vector *r_vec;
356
357 u32 cnt;
358 u32 wr_p;
359 u32 rd_p;
360
361 u32 idx;
362
363 int fl_qcidx;
364 u8 __iomem *qcp_fl;
365
366 struct nfp_net_rx_buf *rxbufs;
367 struct nfp_net_rx_desc *rxds;
368
369 dma_addr_t dma;
370 unsigned int size;
371 } ____cacheline_aligned;
372
373 /**
374 * struct nfp_net_r_vector - Per ring interrupt vector configuration
375 * @nfp_net: Backpointer to nfp_net structure
376 * @napi: NAPI structure for this ring vec
377 * @tx_ring: Pointer to TX ring
378 * @rx_ring: Pointer to RX ring
379 * @xdp_ring: Pointer to an extra TX ring for XDP
380 * @irq_entry: MSI-X table entry (use for talking to the device)
381 * @rx_sync: Seqlock for atomic updates of RX stats
382 * @rx_pkts: Number of received packets
383 * @rx_bytes: Number of received bytes
384 * @rx_drops: Number of packets dropped on RX due to lack of resources
385 * @hw_csum_rx_ok: Counter of packets where the HW checksum was OK
386 * @hw_csum_rx_inner_ok: Counter of packets where the inner HW checksum was OK
387 * @hw_csum_rx_error: Counter of packets with bad checksums
388 * @tx_sync: Seqlock for atomic updates of TX stats
389 * @tx_pkts: Number of Transmitted packets
390 * @tx_bytes: Number of Transmitted bytes
391 * @hw_csum_tx: Counter of packets with TX checksum offload requested
392 * @hw_csum_tx_inner: Counter of inner TX checksum offload requests
393 * @tx_gather: Counter of packets with Gather DMA
394 * @tx_lso: Counter of LSO packets sent
395 * @tx_errors: How many TX errors were encountered
396 * @tx_busy: How often was TX busy (no space)?
397 * @irq_vector: Interrupt vector number (use for talking to the OS)
398 * @handler: Interrupt handler for this ring vector
399 * @name: Name of the interrupt vector
400 * @affinity_mask: SMP affinity mask for this vector
401 *
402 * This structure ties RX and TX rings to interrupt vectors and a NAPI
403 * context. This currently only supports one RX and TX ring per
404 * interrupt vector but might be extended in the future to allow
405 * association of multiple rings per vector.
406 */
407 struct nfp_net_r_vector {
408 struct nfp_net *nfp_net;
409 union {
410 struct napi_struct napi;
411 struct {
412 struct tasklet_struct tasklet;
413 struct sk_buff_head queue;
414 struct spinlock lock;
415 };
416 };
417
418 struct nfp_net_tx_ring *tx_ring;
419 struct nfp_net_rx_ring *rx_ring;
420
421 u16 irq_entry;
422
423 struct u64_stats_sync rx_sync;
424 u64 rx_pkts;
425 u64 rx_bytes;
426 u64 rx_drops;
427 u64 hw_csum_rx_ok;
428 u64 hw_csum_rx_inner_ok;
429 u64 hw_csum_rx_error;
430
431 struct nfp_net_tx_ring *xdp_ring;
432
433 struct u64_stats_sync tx_sync;
434 u64 tx_pkts;
435 u64 tx_bytes;
436 u64 hw_csum_tx;
437 u64 hw_csum_tx_inner;
438 u64 tx_gather;
439 u64 tx_lso;
440 u64 tx_errors;
441 u64 tx_busy;
442
443 u32 irq_vector;
444 irq_handler_t handler;
445 char name[IFNAMSIZ + 8];
446 cpumask_t affinity_mask;
447 } ____cacheline_aligned;
448
449 /* Firmware version as it is written in the 32bit value in the BAR */
450 struct nfp_net_fw_version {
451 u8 minor;
452 u8 major;
453 u8 class;
454 u8 resv;
455 } __packed;
456
nfp_net_fw_ver_eq(struct nfp_net_fw_version * fw_ver,u8 resv,u8 class,u8 major,u8 minor)457 static inline bool nfp_net_fw_ver_eq(struct nfp_net_fw_version *fw_ver,
458 u8 resv, u8 class, u8 major, u8 minor)
459 {
460 return fw_ver->resv == resv &&
461 fw_ver->class == class &&
462 fw_ver->major == major &&
463 fw_ver->minor == minor;
464 }
465
466 struct nfp_stat_pair {
467 u64 pkts;
468 u64 bytes;
469 };
470
471 /**
472 * struct nfp_net_dp - NFP network device datapath data structure
473 * @dev: Backpointer to struct device
474 * @netdev: Backpointer to net_device structure
475 * @is_vf: Is the driver attached to a VF?
476 * @bpf_offload_skip_sw: Offloaded BPF program will not be rerun by cls_bpf
477 * @bpf_offload_xdp: Offloaded BPF program is XDP
478 * @chained_metadata_format: Firemware will use new metadata format
479 * @rx_dma_dir: Mapping direction for RX buffers
480 * @rx_dma_off: Offset at which DMA packets (for XDP headroom)
481 * @rx_offset: Offset in the RX buffers where packet data starts
482 * @ctrl: Local copy of the control register/word.
483 * @fl_bufsz: Currently configured size of the freelist buffers
484 * @xdp_prog: Installed XDP program
485 * @tx_rings: Array of pre-allocated TX ring structures
486 * @rx_rings: Array of pre-allocated RX ring structures
487 * @ctrl_bar: Pointer to mapped control BAR
488 *
489 * @txd_cnt: Size of the TX ring in number of descriptors
490 * @rxd_cnt: Size of the RX ring in number of descriptors
491 * @num_r_vecs: Number of used ring vectors
492 * @num_tx_rings: Currently configured number of TX rings
493 * @num_stack_tx_rings: Number of TX rings used by the stack (not XDP)
494 * @num_rx_rings: Currently configured number of RX rings
495 * @mtu: Device MTU
496 */
497 struct nfp_net_dp {
498 struct device *dev;
499 struct net_device *netdev;
500
501 u8 is_vf:1;
502 u8 bpf_offload_skip_sw:1;
503 u8 bpf_offload_xdp:1;
504 u8 chained_metadata_format:1;
505
506 u8 rx_dma_dir;
507 u8 rx_offset;
508
509 u32 rx_dma_off;
510
511 u32 ctrl;
512 u32 fl_bufsz;
513
514 struct bpf_prog *xdp_prog;
515
516 struct nfp_net_tx_ring *tx_rings;
517 struct nfp_net_rx_ring *rx_rings;
518
519 u8 __iomem *ctrl_bar;
520
521 /* Cold data follows */
522
523 unsigned int txd_cnt;
524 unsigned int rxd_cnt;
525
526 unsigned int num_r_vecs;
527
528 unsigned int num_tx_rings;
529 unsigned int num_stack_tx_rings;
530 unsigned int num_rx_rings;
531
532 unsigned int mtu;
533 };
534
535 /**
536 * struct nfp_net - NFP network device structure
537 * @dp: Datapath structure
538 * @fw_ver: Firmware version
539 * @cap: Capabilities advertised by the Firmware
540 * @max_mtu: Maximum support MTU advertised by the Firmware
541 * @rss_hfunc: RSS selected hash function
542 * @rss_cfg: RSS configuration
543 * @rss_key: RSS secret key
544 * @rss_itbl: RSS indirection table
545 * @xdp_flags: Flags with which XDP prog was loaded
546 * @xdp_prog: XDP prog (for ctrl path, both DRV and HW modes)
547 * @max_r_vecs: Number of allocated interrupt vectors for RX/TX
548 * @max_tx_rings: Maximum number of TX rings supported by the Firmware
549 * @max_rx_rings: Maximum number of RX rings supported by the Firmware
550 * @r_vecs: Pre-allocated array of ring vectors
551 * @irq_entries: Pre-allocated array of MSI-X entries
552 * @lsc_handler: Handler for Link State Change interrupt
553 * @lsc_name: Name for Link State Change interrupt
554 * @exn_handler: Handler for Exception interrupt
555 * @exn_name: Name for Exception interrupt
556 * @shared_handler: Handler for shared interrupts
557 * @shared_name: Name for shared interrupt
558 * @me_freq_mhz: ME clock_freq (MHz)
559 * @reconfig_lock: Protects HW reconfiguration request regs/machinery
560 * @reconfig_posted: Pending reconfig bits coming from async sources
561 * @reconfig_timer_active: Timer for reading reconfiguration results is pending
562 * @reconfig_sync_present: Some thread is performing synchronous reconfig
563 * @reconfig_timer: Timer for async reading of reconfig results
564 * @link_up: Is the link up?
565 * @link_status_lock: Protects @link_* and ensures atomicity with BAR reading
566 * @rx_coalesce_usecs: RX interrupt moderation usecs delay parameter
567 * @rx_coalesce_max_frames: RX interrupt moderation frame count parameter
568 * @tx_coalesce_usecs: TX interrupt moderation usecs delay parameter
569 * @tx_coalesce_max_frames: TX interrupt moderation frame count parameter
570 * @vxlan_ports: VXLAN ports for RX inner csum offload communicated to HW
571 * @vxlan_usecnt: IPv4/IPv6 VXLAN port use counts
572 * @qcp_cfg: Pointer to QCP queue used for configuration notification
573 * @tx_bar: Pointer to mapped TX queues
574 * @rx_bar: Pointer to mapped FL/RX queues
575 * @debugfs_dir: Device directory in debugfs
576 * @vnic_list: Entry on device vNIC list
577 * @pdev: Backpointer to PCI device
578 * @app: APP handle if available
579 * @port: Pointer to nfp_port structure if vNIC is a port
580 * @app_priv: APP private data for this vNIC
581 */
582 struct nfp_net {
583 struct nfp_net_dp dp;
584
585 struct nfp_net_fw_version fw_ver;
586
587 u32 cap;
588 u32 max_mtu;
589
590 u8 rss_hfunc;
591 u32 rss_cfg;
592 u8 rss_key[NFP_NET_CFG_RSS_KEY_SZ];
593 u8 rss_itbl[NFP_NET_CFG_RSS_ITBL_SZ];
594
595 u32 xdp_flags;
596 struct bpf_prog *xdp_prog;
597
598 unsigned int max_tx_rings;
599 unsigned int max_rx_rings;
600
601 int stride_tx;
602 int stride_rx;
603
604 unsigned int max_r_vecs;
605 struct nfp_net_r_vector r_vecs[NFP_NET_MAX_R_VECS];
606 struct msix_entry irq_entries[NFP_NET_MAX_IRQS];
607
608 irq_handler_t lsc_handler;
609 char lsc_name[IFNAMSIZ + 8];
610
611 irq_handler_t exn_handler;
612 char exn_name[IFNAMSIZ + 8];
613
614 irq_handler_t shared_handler;
615 char shared_name[IFNAMSIZ + 8];
616
617 u32 me_freq_mhz;
618
619 bool link_up;
620 spinlock_t link_status_lock;
621
622 spinlock_t reconfig_lock;
623 u32 reconfig_posted;
624 bool reconfig_timer_active;
625 bool reconfig_sync_present;
626 struct timer_list reconfig_timer;
627
628 u32 rx_coalesce_usecs;
629 u32 rx_coalesce_max_frames;
630 u32 tx_coalesce_usecs;
631 u32 tx_coalesce_max_frames;
632
633 __be16 vxlan_ports[NFP_NET_N_VXLAN_PORTS];
634 u8 vxlan_usecnt[NFP_NET_N_VXLAN_PORTS];
635
636 u8 __iomem *qcp_cfg;
637
638 u8 __iomem *tx_bar;
639 u8 __iomem *rx_bar;
640
641 struct dentry *debugfs_dir;
642
643 struct list_head vnic_list;
644
645 struct pci_dev *pdev;
646 struct nfp_app *app;
647
648 struct nfp_port *port;
649
650 void *app_priv;
651 };
652
653 /* Functions to read/write from/to a BAR
654 * Performs any endian conversion necessary.
655 */
nn_readb(struct nfp_net * nn,int off)656 static inline u16 nn_readb(struct nfp_net *nn, int off)
657 {
658 return readb(nn->dp.ctrl_bar + off);
659 }
660
nn_writeb(struct nfp_net * nn,int off,u8 val)661 static inline void nn_writeb(struct nfp_net *nn, int off, u8 val)
662 {
663 writeb(val, nn->dp.ctrl_bar + off);
664 }
665
nn_readw(struct nfp_net * nn,int off)666 static inline u16 nn_readw(struct nfp_net *nn, int off)
667 {
668 return readw(nn->dp.ctrl_bar + off);
669 }
670
nn_writew(struct nfp_net * nn,int off,u16 val)671 static inline void nn_writew(struct nfp_net *nn, int off, u16 val)
672 {
673 writew(val, nn->dp.ctrl_bar + off);
674 }
675
nn_readl(struct nfp_net * nn,int off)676 static inline u32 nn_readl(struct nfp_net *nn, int off)
677 {
678 return readl(nn->dp.ctrl_bar + off);
679 }
680
nn_writel(struct nfp_net * nn,int off,u32 val)681 static inline void nn_writel(struct nfp_net *nn, int off, u32 val)
682 {
683 writel(val, nn->dp.ctrl_bar + off);
684 }
685
nn_readq(struct nfp_net * nn,int off)686 static inline u64 nn_readq(struct nfp_net *nn, int off)
687 {
688 return readq(nn->dp.ctrl_bar + off);
689 }
690
nn_writeq(struct nfp_net * nn,int off,u64 val)691 static inline void nn_writeq(struct nfp_net *nn, int off, u64 val)
692 {
693 writeq(val, nn->dp.ctrl_bar + off);
694 }
695
696 /* Flush posted PCI writes by reading something without side effects */
nn_pci_flush(struct nfp_net * nn)697 static inline void nn_pci_flush(struct nfp_net *nn)
698 {
699 nn_readl(nn, NFP_NET_CFG_VERSION);
700 }
701
702 /* Queue Controller Peripheral access functions and definitions.
703 *
704 * Some of the BARs of the NFP are mapped to portions of the Queue
705 * Controller Peripheral (QCP) address space on the NFP. A QCP queue
706 * has a read and a write pointer (as well as a size and flags,
707 * indicating overflow etc). The QCP offers a number of different
708 * operation on queue pointers, but here we only offer function to
709 * either add to a pointer or to read the pointer value.
710 */
711 #define NFP_QCP_QUEUE_ADDR_SZ 0x800
712 #define NFP_QCP_QUEUE_AREA_SZ 0x80000
713 #define NFP_QCP_QUEUE_OFF(_x) ((_x) * NFP_QCP_QUEUE_ADDR_SZ)
714 #define NFP_QCP_QUEUE_ADD_RPTR 0x0000
715 #define NFP_QCP_QUEUE_ADD_WPTR 0x0004
716 #define NFP_QCP_QUEUE_STS_LO 0x0008
717 #define NFP_QCP_QUEUE_STS_LO_READPTR_mask 0x3ffff
718 #define NFP_QCP_QUEUE_STS_HI 0x000c
719 #define NFP_QCP_QUEUE_STS_HI_WRITEPTR_mask 0x3ffff
720
721 /* The offset of a QCP queues in the PCIe Target */
722 #define NFP_PCIE_QUEUE(_q) (0x80000 + (NFP_QCP_QUEUE_ADDR_SZ * ((_q) & 0xff)))
723
724 /* nfp_qcp_ptr - Read or Write Pointer of a queue */
725 enum nfp_qcp_ptr {
726 NFP_QCP_READ_PTR = 0,
727 NFP_QCP_WRITE_PTR
728 };
729
730 /* There appear to be an *undocumented* upper limit on the value which
731 * one can add to a queue and that value is either 0x3f or 0x7f. We
732 * go with 0x3f as a conservative measure.
733 */
734 #define NFP_QCP_MAX_ADD 0x3f
735
_nfp_qcp_ptr_add(u8 __iomem * q,enum nfp_qcp_ptr ptr,u32 val)736 static inline void _nfp_qcp_ptr_add(u8 __iomem *q,
737 enum nfp_qcp_ptr ptr, u32 val)
738 {
739 u32 off;
740
741 if (ptr == NFP_QCP_READ_PTR)
742 off = NFP_QCP_QUEUE_ADD_RPTR;
743 else
744 off = NFP_QCP_QUEUE_ADD_WPTR;
745
746 while (val > NFP_QCP_MAX_ADD) {
747 writel(NFP_QCP_MAX_ADD, q + off);
748 val -= NFP_QCP_MAX_ADD;
749 }
750
751 writel(val, q + off);
752 }
753
754 /**
755 * nfp_qcp_rd_ptr_add() - Add the value to the read pointer of a queue
756 *
757 * @q: Base address for queue structure
758 * @val: Value to add to the queue pointer
759 *
760 * If @val is greater than @NFP_QCP_MAX_ADD multiple writes are performed.
761 */
nfp_qcp_rd_ptr_add(u8 __iomem * q,u32 val)762 static inline void nfp_qcp_rd_ptr_add(u8 __iomem *q, u32 val)
763 {
764 _nfp_qcp_ptr_add(q, NFP_QCP_READ_PTR, val);
765 }
766
767 /**
768 * nfp_qcp_wr_ptr_add() - Add the value to the write pointer of a queue
769 *
770 * @q: Base address for queue structure
771 * @val: Value to add to the queue pointer
772 *
773 * If @val is greater than @NFP_QCP_MAX_ADD multiple writes are performed.
774 */
nfp_qcp_wr_ptr_add(u8 __iomem * q,u32 val)775 static inline void nfp_qcp_wr_ptr_add(u8 __iomem *q, u32 val)
776 {
777 _nfp_qcp_ptr_add(q, NFP_QCP_WRITE_PTR, val);
778 }
779
_nfp_qcp_read(u8 __iomem * q,enum nfp_qcp_ptr ptr)780 static inline u32 _nfp_qcp_read(u8 __iomem *q, enum nfp_qcp_ptr ptr)
781 {
782 u32 off;
783 u32 val;
784
785 if (ptr == NFP_QCP_READ_PTR)
786 off = NFP_QCP_QUEUE_STS_LO;
787 else
788 off = NFP_QCP_QUEUE_STS_HI;
789
790 val = readl(q + off);
791
792 if (ptr == NFP_QCP_READ_PTR)
793 return val & NFP_QCP_QUEUE_STS_LO_READPTR_mask;
794 else
795 return val & NFP_QCP_QUEUE_STS_HI_WRITEPTR_mask;
796 }
797
798 /**
799 * nfp_qcp_rd_ptr_read() - Read the current read pointer value for a queue
800 * @q: Base address for queue structure
801 *
802 * Return: Value read.
803 */
nfp_qcp_rd_ptr_read(u8 __iomem * q)804 static inline u32 nfp_qcp_rd_ptr_read(u8 __iomem *q)
805 {
806 return _nfp_qcp_read(q, NFP_QCP_READ_PTR);
807 }
808
809 /**
810 * nfp_qcp_wr_ptr_read() - Read the current write pointer value for a queue
811 * @q: Base address for queue structure
812 *
813 * Return: Value read.
814 */
nfp_qcp_wr_ptr_read(u8 __iomem * q)815 static inline u32 nfp_qcp_wr_ptr_read(u8 __iomem *q)
816 {
817 return _nfp_qcp_read(q, NFP_QCP_WRITE_PTR);
818 }
819
nfp_net_is_data_vnic(struct nfp_net * nn)820 static inline bool nfp_net_is_data_vnic(struct nfp_net *nn)
821 {
822 WARN_ON_ONCE(!nn->dp.netdev && nn->port);
823 return !!nn->dp.netdev;
824 }
825
nfp_net_running(struct nfp_net * nn)826 static inline bool nfp_net_running(struct nfp_net *nn)
827 {
828 return nn->dp.ctrl & NFP_NET_CFG_CTRL_ENABLE;
829 }
830
nfp_net_name(struct nfp_net * nn)831 static inline const char *nfp_net_name(struct nfp_net *nn)
832 {
833 return nn->dp.netdev ? nn->dp.netdev->name : "ctrl";
834 }
835
836 /* Globals */
837 extern const char nfp_driver_version[];
838
839 extern const struct net_device_ops nfp_net_netdev_ops;
840
nfp_netdev_is_nfp_net(struct net_device * netdev)841 static inline bool nfp_netdev_is_nfp_net(struct net_device *netdev)
842 {
843 return netdev->netdev_ops == &nfp_net_netdev_ops;
844 }
845
846 /* Prototypes */
847 void nfp_net_get_fw_version(struct nfp_net_fw_version *fw_ver,
848 void __iomem *ctrl_bar);
849
850 struct nfp_net *
851 nfp_net_alloc(struct pci_dev *pdev, bool needs_netdev,
852 unsigned int max_tx_rings, unsigned int max_rx_rings);
853 void nfp_net_free(struct nfp_net *nn);
854
855 int nfp_net_init(struct nfp_net *nn);
856 void nfp_net_clean(struct nfp_net *nn);
857
858 int nfp_ctrl_open(struct nfp_net *nn);
859 void nfp_ctrl_close(struct nfp_net *nn);
860
861 void nfp_net_set_ethtool_ops(struct net_device *netdev);
862 void nfp_net_info(struct nfp_net *nn);
863 int nfp_net_reconfig(struct nfp_net *nn, u32 update);
864 unsigned int nfp_net_rss_key_sz(struct nfp_net *nn);
865 void nfp_net_rss_write_itbl(struct nfp_net *nn);
866 void nfp_net_rss_write_key(struct nfp_net *nn);
867 void nfp_net_coalesce_write_cfg(struct nfp_net *nn);
868
869 unsigned int
870 nfp_net_irqs_alloc(struct pci_dev *pdev, struct msix_entry *irq_entries,
871 unsigned int min_irqs, unsigned int want_irqs);
872 void nfp_net_irqs_disable(struct pci_dev *pdev);
873 void
874 nfp_net_irqs_assign(struct nfp_net *nn, struct msix_entry *irq_entries,
875 unsigned int n);
876
877 struct nfp_net_dp *nfp_net_clone_dp(struct nfp_net *nn);
878 int nfp_net_ring_reconfig(struct nfp_net *nn, struct nfp_net_dp *new,
879 struct netlink_ext_ack *extack);
880
881 #ifdef CONFIG_NFP_DEBUG
882 void nfp_net_debugfs_create(void);
883 void nfp_net_debugfs_destroy(void);
884 struct dentry *nfp_net_debugfs_device_add(struct pci_dev *pdev);
885 void nfp_net_debugfs_vnic_add(struct nfp_net *nn, struct dentry *ddir, int id);
886 void nfp_net_debugfs_dir_clean(struct dentry **dir);
887 #else
nfp_net_debugfs_create(void)888 static inline void nfp_net_debugfs_create(void)
889 {
890 }
891
nfp_net_debugfs_destroy(void)892 static inline void nfp_net_debugfs_destroy(void)
893 {
894 }
895
nfp_net_debugfs_device_add(struct pci_dev * pdev)896 static inline struct dentry *nfp_net_debugfs_device_add(struct pci_dev *pdev)
897 {
898 return NULL;
899 }
900
901 static inline void
nfp_net_debugfs_vnic_add(struct nfp_net * nn,struct dentry * ddir,int id)902 nfp_net_debugfs_vnic_add(struct nfp_net *nn, struct dentry *ddir, int id)
903 {
904 }
905
nfp_net_debugfs_dir_clean(struct dentry ** dir)906 static inline void nfp_net_debugfs_dir_clean(struct dentry **dir)
907 {
908 }
909 #endif /* CONFIG_NFP_DEBUG */
910
911 #endif /* _NFP_NET_H_ */
912