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1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * File:	portdrv_pci.c
4  * Purpose:	PCI Express Port Bus Driver
5  * Author:	Tom Nguyen <tom.l.nguyen@intel.com>
6  * Version:	v1.0
7  *
8  * Copyright (C) 2004 Intel
9  * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
10  */
11 
12 #include <linux/pci.h>
13 #include <linux/kernel.h>
14 #include <linux/errno.h>
15 #include <linux/pm.h>
16 #include <linux/pm_runtime.h>
17 #include <linux/init.h>
18 #include <linux/pcieport_if.h>
19 #include <linux/aer.h>
20 #include <linux/dmi.h>
21 #include <linux/pci-aspm.h>
22 
23 #include "../pci.h"
24 #include "portdrv.h"
25 
26 /* If this switch is set, PCIe port native services should not be enabled. */
27 bool pcie_ports_disabled;
28 
29 /*
30  * If this switch is set, ACPI _OSC will be used to determine whether or not to
31  * enable PCIe port native services.
32  */
33 bool pcie_ports_auto = true;
34 
pcie_port_setup(char * str)35 static int __init pcie_port_setup(char *str)
36 {
37 	if (!strncmp(str, "compat", 6)) {
38 		pcie_ports_disabled = true;
39 	} else if (!strncmp(str, "native", 6)) {
40 		pcie_ports_disabled = false;
41 		pcie_ports_auto = false;
42 	} else if (!strncmp(str, "auto", 4)) {
43 		pcie_ports_disabled = false;
44 		pcie_ports_auto = true;
45 	}
46 
47 	return 1;
48 }
49 __setup("pcie_ports=", pcie_port_setup);
50 
51 /* global data */
52 
53 /**
54  * pcie_clear_root_pme_status - Clear root port PME interrupt status.
55  * @dev: PCIe root port or event collector.
56  */
pcie_clear_root_pme_status(struct pci_dev * dev)57 void pcie_clear_root_pme_status(struct pci_dev *dev)
58 {
59 	pcie_capability_set_dword(dev, PCI_EXP_RTSTA, PCI_EXP_RTSTA_PME);
60 }
61 
pcie_portdrv_restore_config(struct pci_dev * dev)62 static int pcie_portdrv_restore_config(struct pci_dev *dev)
63 {
64 	int retval;
65 
66 	retval = pci_enable_device(dev);
67 	if (retval)
68 		return retval;
69 	pci_set_master(dev);
70 	return 0;
71 }
72 
73 #ifdef CONFIG_PM
pcie_port_resume_noirq(struct device * dev)74 static int pcie_port_resume_noirq(struct device *dev)
75 {
76 	struct pci_dev *pdev = to_pci_dev(dev);
77 
78 	/*
79 	 * Some BIOSes forget to clear Root PME Status bits after system wakeup
80 	 * which breaks ACPI-based runtime wakeup on PCI Express, so clear those
81 	 * bits now just in case (shouldn't hurt).
82 	 */
83 	if (pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT)
84 		pcie_clear_root_pme_status(pdev);
85 	return 0;
86 }
87 
pcie_port_runtime_suspend(struct device * dev)88 static int pcie_port_runtime_suspend(struct device *dev)
89 {
90 	return to_pci_dev(dev)->bridge_d3 ? 0 : -EBUSY;
91 }
92 
pcie_port_runtime_resume(struct device * dev)93 static int pcie_port_runtime_resume(struct device *dev)
94 {
95 	return 0;
96 }
97 
pcie_port_runtime_idle(struct device * dev)98 static int pcie_port_runtime_idle(struct device *dev)
99 {
100 	/*
101 	 * Assume the PCI core has set bridge_d3 whenever it thinks the port
102 	 * should be good to go to D3.  Everything else, including moving
103 	 * the port to D3, is handled by the PCI core.
104 	 */
105 	return to_pci_dev(dev)->bridge_d3 ? 0 : -EBUSY;
106 }
107 
108 static const struct dev_pm_ops pcie_portdrv_pm_ops = {
109 	.suspend	= pcie_port_device_suspend,
110 	.resume		= pcie_port_device_resume,
111 	.freeze		= pcie_port_device_suspend,
112 	.thaw		= pcie_port_device_resume,
113 	.poweroff	= pcie_port_device_suspend,
114 	.restore	= pcie_port_device_resume,
115 	.resume_noirq	= pcie_port_resume_noirq,
116 	.runtime_suspend = pcie_port_runtime_suspend,
117 	.runtime_resume	= pcie_port_runtime_resume,
118 	.runtime_idle	= pcie_port_runtime_idle,
119 };
120 
121 #define PCIE_PORTDRV_PM_OPS	(&pcie_portdrv_pm_ops)
122 
123 #else /* !PM */
124 
125 #define PCIE_PORTDRV_PM_OPS	NULL
126 #endif /* !PM */
127 
128 /*
129  * pcie_portdrv_probe - Probe PCI-Express port devices
130  * @dev: PCI-Express port device being probed
131  *
132  * If detected invokes the pcie_port_device_register() method for
133  * this port device.
134  *
135  */
pcie_portdrv_probe(struct pci_dev * dev,const struct pci_device_id * id)136 static int pcie_portdrv_probe(struct pci_dev *dev,
137 					const struct pci_device_id *id)
138 {
139 	int status;
140 
141 	if (!pci_is_pcie(dev) ||
142 	    ((pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT) &&
143 	     (pci_pcie_type(dev) != PCI_EXP_TYPE_UPSTREAM) &&
144 	     (pci_pcie_type(dev) != PCI_EXP_TYPE_DOWNSTREAM)))
145 		return -ENODEV;
146 
147 	status = pcie_port_device_register(dev);
148 	if (status)
149 		return status;
150 
151 	pci_save_state(dev);
152 
153 	if (pci_bridge_d3_possible(dev)) {
154 		/*
155 		 * Keep the port resumed 100ms to make sure things like
156 		 * config space accesses from userspace (lspci) will not
157 		 * cause the port to repeatedly suspend and resume.
158 		 */
159 		pm_runtime_set_autosuspend_delay(&dev->dev, 100);
160 		pm_runtime_use_autosuspend(&dev->dev);
161 		pm_runtime_mark_last_busy(&dev->dev);
162 		pm_runtime_put_autosuspend(&dev->dev);
163 		pm_runtime_allow(&dev->dev);
164 	}
165 
166 	return 0;
167 }
168 
pcie_portdrv_remove(struct pci_dev * dev)169 static void pcie_portdrv_remove(struct pci_dev *dev)
170 {
171 	if (pci_bridge_d3_possible(dev)) {
172 		pm_runtime_forbid(&dev->dev);
173 		pm_runtime_get_noresume(&dev->dev);
174 		pm_runtime_dont_use_autosuspend(&dev->dev);
175 	}
176 
177 	pcie_port_device_remove(dev);
178 }
179 
pcie_portdrv_error_detected(struct pci_dev * dev,enum pci_channel_state error)180 static pci_ers_result_t pcie_portdrv_error_detected(struct pci_dev *dev,
181 					enum pci_channel_state error)
182 {
183 	/* Root Port has no impact. Always recovers. */
184 	return PCI_ERS_RESULT_CAN_RECOVER;
185 }
186 
pcie_portdrv_mmio_enabled(struct pci_dev * dev)187 static pci_ers_result_t pcie_portdrv_mmio_enabled(struct pci_dev *dev)
188 {
189 	return PCI_ERS_RESULT_RECOVERED;
190 }
191 
pcie_portdrv_slot_reset(struct pci_dev * dev)192 static pci_ers_result_t pcie_portdrv_slot_reset(struct pci_dev *dev)
193 {
194 	/* If fatal, restore cfg space for possible link reset at upstream */
195 	if (dev->error_state == pci_channel_io_frozen) {
196 		dev->state_saved = true;
197 		pci_restore_state(dev);
198 		pcie_portdrv_restore_config(dev);
199 		pci_enable_pcie_error_reporting(dev);
200 	}
201 
202 	return PCI_ERS_RESULT_RECOVERED;
203 }
204 
resume_iter(struct device * device,void * data)205 static int resume_iter(struct device *device, void *data)
206 {
207 	struct pcie_device *pcie_device;
208 	struct pcie_port_service_driver *driver;
209 
210 	if (device->bus == &pcie_port_bus_type && device->driver) {
211 		driver = to_service_driver(device->driver);
212 		if (driver && driver->error_resume) {
213 			pcie_device = to_pcie_device(device);
214 
215 			/* Forward error message to service drivers */
216 			driver->error_resume(pcie_device->port);
217 		}
218 	}
219 
220 	return 0;
221 }
222 
pcie_portdrv_err_resume(struct pci_dev * dev)223 static void pcie_portdrv_err_resume(struct pci_dev *dev)
224 {
225 	device_for_each_child(&dev->dev, NULL, resume_iter);
226 }
227 
228 /*
229  * LINUX Device Driver Model
230  */
231 static const struct pci_device_id port_pci_ids[] = { {
232 	/* handle any PCI-Express port */
233 	PCI_DEVICE_CLASS(((PCI_CLASS_BRIDGE_PCI << 8) | 0x00), ~0),
234 	}, { /* end: all zeroes */ }
235 };
236 
237 static const struct pci_error_handlers pcie_portdrv_err_handler = {
238 	.error_detected = pcie_portdrv_error_detected,
239 	.mmio_enabled = pcie_portdrv_mmio_enabled,
240 	.slot_reset = pcie_portdrv_slot_reset,
241 	.resume = pcie_portdrv_err_resume,
242 };
243 
244 static struct pci_driver pcie_portdriver = {
245 	.name		= "pcieport",
246 	.id_table	= &port_pci_ids[0],
247 
248 	.probe		= pcie_portdrv_probe,
249 	.remove		= pcie_portdrv_remove,
250 
251 	.err_handler	= &pcie_portdrv_err_handler,
252 
253 	.driver.pm	= PCIE_PORTDRV_PM_OPS,
254 };
255 
dmi_pcie_pme_disable_msi(const struct dmi_system_id * d)256 static int __init dmi_pcie_pme_disable_msi(const struct dmi_system_id *d)
257 {
258 	pr_notice("%s detected: will not use MSI for PCIe PME signaling\n",
259 		  d->ident);
260 	pcie_pme_disable_msi();
261 	return 0;
262 }
263 
264 static const struct dmi_system_id pcie_portdrv_dmi_table[] __initconst = {
265 	/*
266 	 * Boxes that should not use MSI for PCIe PME signaling.
267 	 */
268 	{
269 	 .callback = dmi_pcie_pme_disable_msi,
270 	 .ident = "MSI Wind U-100",
271 	 .matches = {
272 		     DMI_MATCH(DMI_SYS_VENDOR,
273 				"MICRO-STAR INTERNATIONAL CO., LTD"),
274 		     DMI_MATCH(DMI_PRODUCT_NAME, "U-100"),
275 		     },
276 	 },
277 	 {}
278 };
279 
pcie_portdrv_init(void)280 static int __init pcie_portdrv_init(void)
281 {
282 	int retval;
283 
284 	if (pcie_ports_disabled)
285 		return pci_register_driver(&pcie_portdriver);
286 
287 	dmi_check_system(pcie_portdrv_dmi_table);
288 
289 	retval = pcie_port_bus_register();
290 	if (retval) {
291 		printk(KERN_WARNING "PCIE: bus_register error: %d\n", retval);
292 		goto out;
293 	}
294 	retval = pci_register_driver(&pcie_portdriver);
295 	if (retval)
296 		pcie_port_bus_unregister();
297  out:
298 	return retval;
299 }
300 device_initcall(pcie_portdrv_init);
301