/arch/arm/net/ |
D | bpf_jit_32.h | 157 #define _AL3_R(op, rd, rn, rm) ((op ## _R) | (rd) << 12 | (rn) << 16 | (rm)) argument 159 #define _AL3_I(op, rd, rn, imm) ((op ## _I) | (rd) << 12 | (rn) << 16 | (imm)) argument 163 #define ARM_ADD_R(rd, rn, rm) _AL3_R(ARM_INST_ADD, rd, rn, rm) argument 164 #define ARM_ADDS_R(rd, rn, rm) _AL3_R(ARM_INST_ADDS, rd, rn, rm) argument 165 #define ARM_ADD_I(rd, rn, imm) _AL3_I(ARM_INST_ADD, rd, rn, imm) argument 166 #define ARM_ADDS_I(rd, rn, imm) _AL3_I(ARM_INST_ADDS, rd, rn, imm) argument 167 #define ARM_ADC_R(rd, rn, rm) _AL3_R(ARM_INST_ADC, rd, rn, rm) argument 168 #define ARM_ADC_I(rd, rn, imm) _AL3_I(ARM_INST_ADC, rd, rn, imm) argument 170 #define ARM_AND_R(rd, rn, rm) _AL3_R(ARM_INST_AND, rd, rn, rm) argument 171 #define ARM_AND_I(rd, rn, imm) _AL3_I(ARM_INST_AND, rd, rn, imm) argument [all …]
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D | bpf_jit_32.c | 312 static inline void emit_mov_i_no8m(const u8 rd, u32 val, struct jit_ctx *ctx) in emit_mov_i_no8m() 323 static inline void emit_mov_i(const u8 rd, u32 val, struct jit_ctx *ctx) in emit_mov_i() 363 static inline void emit_udivmod(u8 rd, u8 rm, u8 rn, struct jit_ctx *ctx, u8 op) in emit_udivmod() 604 u8 rd = dstk ? tmp[0] : dst; in emit_a32_alu_i() local 630 u8 rd = dstk ? tmp[1] : dst[1]; in emit_a32_neg64() local 657 u8 rd = dstk ? tmp[1] : dst_lo; in emit_a32_lsh_r64() local 691 u8 rd = dstk ? tmp[1] : dst_lo; in emit_a32_arsh_r64() local 725 u8 rd = dstk ? tmp[1] : dst_lo; in emit_a32_rsh_r64() local 757 u8 rd = dstk ? tmp[1] : dst_lo; in emit_a32_lsh_i64() local 790 u8 rd = dstk ? tmp[1] : dst_lo; in emit_a32_rsh_i64() local [all …]
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/arch/tile/kernel/ |
D | head_64.S | 30 #define GET_FIRST_INT(rd, rs) shrsi rd, rs, 32 argument 31 #define GET_SECOND_INT(rd, rs) addxi rd, rs, 0 argument 33 #define GET_FIRST_INT(rd, rs) addxi rd, rs, 0 argument 34 #define GET_SECOND_INT(rd, rs) shrsi rd, rs, 32 argument
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D | unaligned.c | 180 static void find_regs(tilegx_bundle_bits bundle, uint64_t *rd, uint64_t *ra, in find_regs() 317 static bool check_regs(uint64_t rd, uint64_t ra, uint64_t rb, in check_regs() 378 static tilegx_bundle_bits jit_x0_addi(int rd, int ra, int imm8) in jit_x0_addi() 387 static tilegx_bundle_bits jit_x1_ldna(int rd, int ra) in jit_x1_ldna() 395 static tilegx_bundle_bits jit_x0_dblalign(int rd, int ra, int rb) in jit_x0_dblalign() 465 static tilegx_bundle_bits jit_x1_ld(int rd, int ra) in jit_x1_ld() 473 static tilegx_bundle_bits jit_x1_ld_add(int rd, int ra, int imm8) in jit_x1_ld_add() 483 static tilegx_bundle_bits jit_x0_bfexts(int rd, int ra, int bfs, int bfe) in jit_x0_bfexts() 493 static tilegx_bundle_bits jit_x0_bfextu(int rd, int ra, int bfs, int bfe) in jit_x0_bfextu() 503 static tilegx_bundle_bits jit_x1_addi(int rd, int ra, int imm8) in jit_x1_addi() [all …]
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/arch/arm/probes/kprobes/ |
D | actions-arm.c | 167 int rd = (insn >> 12) & 0xf; in emulate_rd12rn16rm0rs8_rwflags() local 201 int rd = (insn >> 12) & 0xf; in emulate_rd12rn16rm0_rwflags_nopc() local 229 int rd = (insn >> 16) & 0xf; in emulate_rd16rn12rm0rs8_rwflags_nopc() local 258 int rd = (insn >> 12) & 0xf; in emulate_rd12rm0_noflags_nopc() local
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D | actions-thumb.c | 50 int rd = (insn >> 8) & 0xf; in t32_simulate_mrs() local 217 int rd = (insn >> 8) & 0xf; in t32_emulate_rd8rn16rm0_rwflags() local 245 int rd = (insn >> 8) & 0xf; in t32_emulate_rd8pc16_noflags() local 264 int rd = (insn >> 8) & 0xf; in t32_emulate_rd8rn16_noflags() local
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/arch/arm/mm/ |
D | proc-xscale.S | 71 .macro cpwait, rd argument 77 .macro cpwait_ret, lr, rd
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D | proc-xsc3.S | 58 .macro cpwait_ret, lr, rd
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D | proc-macros.S | 32 .macro act_mm, rd argument
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D | alignment.c | 345 unsigned int rd = RD_BITS(instr); in do_alignment_ldrhstrh() local 395 unsigned int rd = RD_BITS(instr); in do_alignment_ldrdstrd() local 457 unsigned int rd = RD_BITS(instr); in do_alignment_ldrstr() local 506 unsigned int rd, rn, correction, nr_regs, regbits; in do_alignment_ldmstm() local
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/arch/mips/kvm/ |
D | dyntrans.c | 101 u32 rd, sel; in kvm_mips_trans_mfc0() local 128 u32 rd, sel; in kvm_mips_trans_mtc0() local
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/arch/mips/include/asm/ |
D | uasm.h | 203 # define UASM_i_ADDU(buf, rs, rt, rd) uasm_i_daddu(buf, rs, rt, rd) argument 206 # define UASM_i_LWX(buf, rs, rt, rd) uasm_i_ldx(buf, rs, rt, rd) argument 207 # define UASM_i_MFC0(buf, rt, rd...) uasm_i_dmfc0(buf, rt, rd) argument 208 # define UASM_i_MTC0(buf, rt, rd...) uasm_i_dmtc0(buf, rt, rd) argument 215 # define UASM_i_SUBU(buf, rs, rt, rd) uasm_i_dsubu(buf, rs, rt, rd) argument 219 # define UASM_i_ADDU(buf, rs, rt, rd) uasm_i_addu(buf, rs, rt, rd) argument 222 # define UASM_i_LWX(buf, rs, rt, rd) uasm_i_lwx(buf, rs, rt, rd) argument 223 # define UASM_i_MFC0(buf, rt, rd...) uasm_i_mfc0(buf, rt, rd) argument 224 # define UASM_i_MTC0(buf, rt, rd...) uasm_i_mtc0(buf, rt, rd) argument 231 # define UASM_i_SUBU(buf, rs, rt, rd) uasm_i_subu(buf, rs, rt, rd) argument
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D | asm.h | 183 #define MOVN(rd, rs, rt) \ argument 190 #define MOVZ(rd, rs, rt) \ argument 199 #define MOVN(rd, rs, rt) \ argument 206 #define MOVZ(rd, rs, rt) \ argument 216 #define MOVN(rd, rs, rt) \ argument 218 #define MOVZ(rd, rs, rt) \ argument
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D | mipsmtregs.h | 330 #define mttgpr(rd,v) \ argument 343 #define mttc0(rd, sel, v) \ argument 358 #define mttr(rd, u, sel, v) \ argument
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/arch/arm64/kvm/ |
D | sys_regs.c | 279 const struct sys_reg_desc *rd) in trap_bvr() 293 static int set_bvr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd, in set_bvr() 303 static int get_bvr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd, in get_bvr() 314 const struct sys_reg_desc *rd) in reset_bvr() 321 const struct sys_reg_desc *rd) in trap_bcr() 335 static int set_bcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd, in set_bcr() 346 static int get_bcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd, in get_bcr() 357 const struct sys_reg_desc *rd) in reset_bcr() 364 const struct sys_reg_desc *rd) in trap_wvr() 379 static int set_wvr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd, in set_wvr() [all …]
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/arch/arm/lib/ |
D | io-writesb.S | 13 .macro outword, rd argument
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D | io-writesw-armv4.S | 13 .macro outword, rd argument
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/arch/sparc/kernel/ |
D | unaligned_32.c | 72 unsigned int rd) in maybe_flush_windows() 140 unsigned int rd = (insn >> 25) & 0x1f; in compute_effective_address() local 156 unsigned int rd = (insn >> 25) & 0x1f; in safe_compute_effective_address() local
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D | unaligned_64.c | 105 unsigned int rd, int from_kernel) in maybe_flush_windows() 170 unsigned int insn, unsigned int rd) in compute_effective_address() 399 int ret, rd = ((insn >> 25) & 0x1f); in handle_popc() local 572 int rd = ((insn >> 25) & 0x1f); in handle_ld_nf() local
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/arch/unicore32/mm/ |
D | proc-macros.S | 60 .macro act_mm, rd argument
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D | alignment.c | 218 unsigned int rd = RD_BITS(instr); in do_alignment_ldrhstrh() local 253 unsigned int rd = RD_BITS(instr); in do_alignment_ldrstr() local 292 unsigned int rd, rn, pc_correction, reg_correction, nr_regs, regbits; in do_alignment_ldmstm() local
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/arch/microblaze/include/asm/ |
D | page.h | 186 #define tophys(rd, rs) addik rd, rs, 0 argument 187 #define tovirt(rd, rs) addik rd, rs, 0 argument 193 #define tophys(rd, rs) \ argument 195 #define tovirt(rd, rs) \ argument
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/arch/arm/probes/ |
D | decode-arm.c | 102 int rd = (insn >> 12) & 0xf; in simulate_mrs() local
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/arch/unicore32/kernel/ |
D | entry.S | 88 .macro get_thread_info, rd argument
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/arch/xtensa/platforms/iss/ |
D | console.c | 99 int rd = 1; in rs_poll() local
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