1 /* linux/arch/arm/plat-samsung/devs.c
2 *
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Base SAMSUNG platform device definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 #include <linux/kernel.h>
14 #include <linux/types.h>
15 #include <linux/interrupt.h>
16 #include <linux/list.h>
17 #include <linux/timer.h>
18 #include <linux/init.h>
19 #include <linux/serial_core.h>
20 #include <linux/serial_s3c.h>
21 #include <linux/platform_device.h>
22 #include <linux/io.h>
23 #include <linux/slab.h>
24 #include <linux/string.h>
25 #include <linux/dma-mapping.h>
26 #include <linux/fb.h>
27 #include <linux/gfp.h>
28 #include <linux/mtd/mtd.h>
29 #include <linux/mtd/onenand.h>
30 #include <linux/mtd/partitions.h>
31 #include <linux/mmc/host.h>
32 #include <linux/ioport.h>
33 #include <linux/sizes.h>
34 #include <linux/platform_data/s3c-hsudc.h>
35 #include <linux/platform_data/s3c-hsotg.h>
36 #include <linux/platform_data/dma-s3c24xx.h>
37
38 #include <linux/platform_data/media/s5p_hdmi.h>
39
40 #include <asm/irq.h>
41 #include <asm/mach/arch.h>
42 #include <asm/mach/map.h>
43 #include <asm/mach/irq.h>
44
45 #include <mach/dma.h>
46 #include <mach/irqs.h>
47 #include <mach/map.h>
48
49 #include <plat/cpu.h>
50 #include <plat/devs.h>
51 #include <plat/adc.h>
52 #include <linux/platform_data/ata-samsung_cf.h>
53 #include <plat/fb.h>
54 #include <plat/fb-s3c2410.h>
55 #include <linux/platform_data/hwmon-s3c.h>
56 #include <linux/platform_data/i2c-s3c2410.h>
57 #include <plat/keypad.h>
58 #include <linux/platform_data/mmc-s3cmci.h>
59 #include <linux/platform_data/mtd-nand-s3c2410.h>
60 #include <plat/pwm-core.h>
61 #include <plat/sdhci.h>
62 #include <linux/platform_data/touchscreen-s3c2410.h>
63 #include <linux/platform_data/usb-s3c2410_udc.h>
64 #include <linux/platform_data/usb-ohci-s3c2410.h>
65 #include <plat/usb-phy.h>
66 #include <plat/regs-spi.h>
67 #include <linux/platform_data/asoc-s3c.h>
68 #include <linux/platform_data/spi-s3c64xx.h>
69
70 #define samsung_device_dma_mask (*((u64[]) { DMA_BIT_MASK(32) }))
71
72 /* AC97 */
73 #ifdef CONFIG_CPU_S3C2440
74 static struct resource s3c_ac97_resource[] = {
75 [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97),
76 [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97),
77 };
78
79 struct platform_device s3c_device_ac97 = {
80 .name = "samsung-ac97",
81 .id = -1,
82 .num_resources = ARRAY_SIZE(s3c_ac97_resource),
83 .resource = s3c_ac97_resource,
84 .dev = {
85 .dma_mask = &samsung_device_dma_mask,
86 .coherent_dma_mask = DMA_BIT_MASK(32),
87 }
88 };
89 #endif /* CONFIG_CPU_S3C2440 */
90
91 /* ADC */
92
93 #ifdef CONFIG_PLAT_S3C24XX
94 static struct resource s3c_adc_resource[] = {
95 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
96 [1] = DEFINE_RES_IRQ(IRQ_TC),
97 [2] = DEFINE_RES_IRQ(IRQ_ADC),
98 };
99
100 struct platform_device s3c_device_adc = {
101 .name = "s3c24xx-adc",
102 .id = -1,
103 .num_resources = ARRAY_SIZE(s3c_adc_resource),
104 .resource = s3c_adc_resource,
105 };
106 #endif /* CONFIG_PLAT_S3C24XX */
107
108 #if defined(CONFIG_SAMSUNG_DEV_ADC)
109 static struct resource s3c_adc_resource[] = {
110 [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
111 [1] = DEFINE_RES_IRQ(IRQ_ADC),
112 [2] = DEFINE_RES_IRQ(IRQ_TC),
113 };
114
115 struct platform_device s3c_device_adc = {
116 .name = "exynos-adc",
117 .id = -1,
118 .num_resources = ARRAY_SIZE(s3c_adc_resource),
119 .resource = s3c_adc_resource,
120 };
121 #endif /* CONFIG_SAMSUNG_DEV_ADC */
122
123 /* Camif Controller */
124
125 #ifdef CONFIG_CPU_S3C2440
126 static struct resource s3c_camif_resource[] = {
127 [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF),
128 [1] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_C),
129 [2] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_P),
130 };
131
132 struct platform_device s3c_device_camif = {
133 .name = "s3c2440-camif",
134 .id = -1,
135 .num_resources = ARRAY_SIZE(s3c_camif_resource),
136 .resource = s3c_camif_resource,
137 .dev = {
138 .dma_mask = &samsung_device_dma_mask,
139 .coherent_dma_mask = DMA_BIT_MASK(32),
140 }
141 };
142 #endif /* CONFIG_CPU_S3C2440 */
143
144 /* FB */
145
146 #ifdef CONFIG_S3C_DEV_FB
147 static struct resource s3c_fb_resource[] = {
148 [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K),
149 [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC),
150 [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO),
151 [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM),
152 };
153
154 struct platform_device s3c_device_fb = {
155 .name = "s3c-fb",
156 .id = -1,
157 .num_resources = ARRAY_SIZE(s3c_fb_resource),
158 .resource = s3c_fb_resource,
159 .dev = {
160 .dma_mask = &samsung_device_dma_mask,
161 .coherent_dma_mask = DMA_BIT_MASK(32),
162 },
163 };
164
s3c_fb_set_platdata(struct s3c_fb_platdata * pd)165 void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd)
166 {
167 s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
168 &s3c_device_fb);
169 }
170 #endif /* CONFIG_S3C_DEV_FB */
171
172 /* HWMON */
173
174 #ifdef CONFIG_S3C_DEV_HWMON
175 struct platform_device s3c_device_hwmon = {
176 .name = "s3c-hwmon",
177 .id = -1,
178 .dev.parent = &s3c_device_adc.dev,
179 };
180
s3c_hwmon_set_platdata(struct s3c_hwmon_pdata * pd)181 void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
182 {
183 s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata),
184 &s3c_device_hwmon);
185 }
186 #endif /* CONFIG_S3C_DEV_HWMON */
187
188 /* HSMMC */
189
190 #ifdef CONFIG_S3C_DEV_HSMMC
191 static struct resource s3c_hsmmc_resource[] = {
192 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K),
193 [1] = DEFINE_RES_IRQ(IRQ_HSMMC0),
194 };
195
196 struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = {
197 .max_width = 4,
198 .host_caps = (MMC_CAP_4_BIT_DATA |
199 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
200 };
201
202 struct platform_device s3c_device_hsmmc0 = {
203 .name = "s3c-sdhci",
204 .id = 0,
205 .num_resources = ARRAY_SIZE(s3c_hsmmc_resource),
206 .resource = s3c_hsmmc_resource,
207 .dev = {
208 .dma_mask = &samsung_device_dma_mask,
209 .coherent_dma_mask = DMA_BIT_MASK(32),
210 .platform_data = &s3c_hsmmc0_def_platdata,
211 },
212 };
213
s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata * pd)214 void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
215 {
216 s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata);
217 }
218 #endif /* CONFIG_S3C_DEV_HSMMC */
219
220 #ifdef CONFIG_S3C_DEV_HSMMC1
221 static struct resource s3c_hsmmc1_resource[] = {
222 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K),
223 [1] = DEFINE_RES_IRQ(IRQ_HSMMC1),
224 };
225
226 struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = {
227 .max_width = 4,
228 .host_caps = (MMC_CAP_4_BIT_DATA |
229 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
230 };
231
232 struct platform_device s3c_device_hsmmc1 = {
233 .name = "s3c-sdhci",
234 .id = 1,
235 .num_resources = ARRAY_SIZE(s3c_hsmmc1_resource),
236 .resource = s3c_hsmmc1_resource,
237 .dev = {
238 .dma_mask = &samsung_device_dma_mask,
239 .coherent_dma_mask = DMA_BIT_MASK(32),
240 .platform_data = &s3c_hsmmc1_def_platdata,
241 },
242 };
243
s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata * pd)244 void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
245 {
246 s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata);
247 }
248 #endif /* CONFIG_S3C_DEV_HSMMC1 */
249
250 /* HSMMC2 */
251
252 #ifdef CONFIG_S3C_DEV_HSMMC2
253 static struct resource s3c_hsmmc2_resource[] = {
254 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K),
255 [1] = DEFINE_RES_IRQ(IRQ_HSMMC2),
256 };
257
258 struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
259 .max_width = 4,
260 .host_caps = (MMC_CAP_4_BIT_DATA |
261 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
262 };
263
264 struct platform_device s3c_device_hsmmc2 = {
265 .name = "s3c-sdhci",
266 .id = 2,
267 .num_resources = ARRAY_SIZE(s3c_hsmmc2_resource),
268 .resource = s3c_hsmmc2_resource,
269 .dev = {
270 .dma_mask = &samsung_device_dma_mask,
271 .coherent_dma_mask = DMA_BIT_MASK(32),
272 .platform_data = &s3c_hsmmc2_def_platdata,
273 },
274 };
275
s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata * pd)276 void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
277 {
278 s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata);
279 }
280 #endif /* CONFIG_S3C_DEV_HSMMC2 */
281
282 #ifdef CONFIG_S3C_DEV_HSMMC3
283 static struct resource s3c_hsmmc3_resource[] = {
284 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K),
285 [1] = DEFINE_RES_IRQ(IRQ_HSMMC3),
286 };
287
288 struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = {
289 .max_width = 4,
290 .host_caps = (MMC_CAP_4_BIT_DATA |
291 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
292 };
293
294 struct platform_device s3c_device_hsmmc3 = {
295 .name = "s3c-sdhci",
296 .id = 3,
297 .num_resources = ARRAY_SIZE(s3c_hsmmc3_resource),
298 .resource = s3c_hsmmc3_resource,
299 .dev = {
300 .dma_mask = &samsung_device_dma_mask,
301 .coherent_dma_mask = DMA_BIT_MASK(32),
302 .platform_data = &s3c_hsmmc3_def_platdata,
303 },
304 };
305
s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata * pd)306 void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
307 {
308 s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata);
309 }
310 #endif /* CONFIG_S3C_DEV_HSMMC3 */
311
312 /* I2C */
313
314 static struct resource s3c_i2c0_resource[] = {
315 [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K),
316 [1] = DEFINE_RES_IRQ(IRQ_IIC),
317 };
318
319 struct platform_device s3c_device_i2c0 = {
320 .name = "s3c2410-i2c",
321 .id = 0,
322 .num_resources = ARRAY_SIZE(s3c_i2c0_resource),
323 .resource = s3c_i2c0_resource,
324 };
325
326 struct s3c2410_platform_i2c default_i2c_data __initdata = {
327 .flags = 0,
328 .slave_addr = 0x10,
329 .frequency = 100*1000,
330 .sda_delay = 100,
331 };
332
s3c_i2c0_set_platdata(struct s3c2410_platform_i2c * pd)333 void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
334 {
335 struct s3c2410_platform_i2c *npd;
336
337 if (!pd) {
338 pd = &default_i2c_data;
339 pd->bus_num = 0;
340 }
341
342 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
343 &s3c_device_i2c0);
344
345 if (!npd->cfg_gpio)
346 npd->cfg_gpio = s3c_i2c0_cfg_gpio;
347 }
348
349 #ifdef CONFIG_S3C_DEV_I2C1
350 static struct resource s3c_i2c1_resource[] = {
351 [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K),
352 [1] = DEFINE_RES_IRQ(IRQ_IIC1),
353 };
354
355 struct platform_device s3c_device_i2c1 = {
356 .name = "s3c2410-i2c",
357 .id = 1,
358 .num_resources = ARRAY_SIZE(s3c_i2c1_resource),
359 .resource = s3c_i2c1_resource,
360 };
361
s3c_i2c1_set_platdata(struct s3c2410_platform_i2c * pd)362 void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd)
363 {
364 struct s3c2410_platform_i2c *npd;
365
366 if (!pd) {
367 pd = &default_i2c_data;
368 pd->bus_num = 1;
369 }
370
371 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
372 &s3c_device_i2c1);
373
374 if (!npd->cfg_gpio)
375 npd->cfg_gpio = s3c_i2c1_cfg_gpio;
376 }
377 #endif /* CONFIG_S3C_DEV_I2C1 */
378
379 #ifdef CONFIG_S3C_DEV_I2C2
380 static struct resource s3c_i2c2_resource[] = {
381 [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K),
382 [1] = DEFINE_RES_IRQ(IRQ_IIC2),
383 };
384
385 struct platform_device s3c_device_i2c2 = {
386 .name = "s3c2410-i2c",
387 .id = 2,
388 .num_resources = ARRAY_SIZE(s3c_i2c2_resource),
389 .resource = s3c_i2c2_resource,
390 };
391
s3c_i2c2_set_platdata(struct s3c2410_platform_i2c * pd)392 void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd)
393 {
394 struct s3c2410_platform_i2c *npd;
395
396 if (!pd) {
397 pd = &default_i2c_data;
398 pd->bus_num = 2;
399 }
400
401 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
402 &s3c_device_i2c2);
403
404 if (!npd->cfg_gpio)
405 npd->cfg_gpio = s3c_i2c2_cfg_gpio;
406 }
407 #endif /* CONFIG_S3C_DEV_I2C2 */
408
409 #ifdef CONFIG_S3C_DEV_I2C3
410 static struct resource s3c_i2c3_resource[] = {
411 [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K),
412 [1] = DEFINE_RES_IRQ(IRQ_IIC3),
413 };
414
415 struct platform_device s3c_device_i2c3 = {
416 .name = "s3c2440-i2c",
417 .id = 3,
418 .num_resources = ARRAY_SIZE(s3c_i2c3_resource),
419 .resource = s3c_i2c3_resource,
420 };
421
s3c_i2c3_set_platdata(struct s3c2410_platform_i2c * pd)422 void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd)
423 {
424 struct s3c2410_platform_i2c *npd;
425
426 if (!pd) {
427 pd = &default_i2c_data;
428 pd->bus_num = 3;
429 }
430
431 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
432 &s3c_device_i2c3);
433
434 if (!npd->cfg_gpio)
435 npd->cfg_gpio = s3c_i2c3_cfg_gpio;
436 }
437 #endif /*CONFIG_S3C_DEV_I2C3 */
438
439 #ifdef CONFIG_S3C_DEV_I2C4
440 static struct resource s3c_i2c4_resource[] = {
441 [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K),
442 [1] = DEFINE_RES_IRQ(IRQ_IIC4),
443 };
444
445 struct platform_device s3c_device_i2c4 = {
446 .name = "s3c2440-i2c",
447 .id = 4,
448 .num_resources = ARRAY_SIZE(s3c_i2c4_resource),
449 .resource = s3c_i2c4_resource,
450 };
451
s3c_i2c4_set_platdata(struct s3c2410_platform_i2c * pd)452 void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd)
453 {
454 struct s3c2410_platform_i2c *npd;
455
456 if (!pd) {
457 pd = &default_i2c_data;
458 pd->bus_num = 4;
459 }
460
461 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
462 &s3c_device_i2c4);
463
464 if (!npd->cfg_gpio)
465 npd->cfg_gpio = s3c_i2c4_cfg_gpio;
466 }
467 #endif /*CONFIG_S3C_DEV_I2C4 */
468
469 #ifdef CONFIG_S3C_DEV_I2C5
470 static struct resource s3c_i2c5_resource[] = {
471 [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K),
472 [1] = DEFINE_RES_IRQ(IRQ_IIC5),
473 };
474
475 struct platform_device s3c_device_i2c5 = {
476 .name = "s3c2440-i2c",
477 .id = 5,
478 .num_resources = ARRAY_SIZE(s3c_i2c5_resource),
479 .resource = s3c_i2c5_resource,
480 };
481
s3c_i2c5_set_platdata(struct s3c2410_platform_i2c * pd)482 void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd)
483 {
484 struct s3c2410_platform_i2c *npd;
485
486 if (!pd) {
487 pd = &default_i2c_data;
488 pd->bus_num = 5;
489 }
490
491 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
492 &s3c_device_i2c5);
493
494 if (!npd->cfg_gpio)
495 npd->cfg_gpio = s3c_i2c5_cfg_gpio;
496 }
497 #endif /*CONFIG_S3C_DEV_I2C5 */
498
499 #ifdef CONFIG_S3C_DEV_I2C6
500 static struct resource s3c_i2c6_resource[] = {
501 [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K),
502 [1] = DEFINE_RES_IRQ(IRQ_IIC6),
503 };
504
505 struct platform_device s3c_device_i2c6 = {
506 .name = "s3c2440-i2c",
507 .id = 6,
508 .num_resources = ARRAY_SIZE(s3c_i2c6_resource),
509 .resource = s3c_i2c6_resource,
510 };
511
s3c_i2c6_set_platdata(struct s3c2410_platform_i2c * pd)512 void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd)
513 {
514 struct s3c2410_platform_i2c *npd;
515
516 if (!pd) {
517 pd = &default_i2c_data;
518 pd->bus_num = 6;
519 }
520
521 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
522 &s3c_device_i2c6);
523
524 if (!npd->cfg_gpio)
525 npd->cfg_gpio = s3c_i2c6_cfg_gpio;
526 }
527 #endif /* CONFIG_S3C_DEV_I2C6 */
528
529 #ifdef CONFIG_S3C_DEV_I2C7
530 static struct resource s3c_i2c7_resource[] = {
531 [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K),
532 [1] = DEFINE_RES_IRQ(IRQ_IIC7),
533 };
534
535 struct platform_device s3c_device_i2c7 = {
536 .name = "s3c2440-i2c",
537 .id = 7,
538 .num_resources = ARRAY_SIZE(s3c_i2c7_resource),
539 .resource = s3c_i2c7_resource,
540 };
541
s3c_i2c7_set_platdata(struct s3c2410_platform_i2c * pd)542 void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd)
543 {
544 struct s3c2410_platform_i2c *npd;
545
546 if (!pd) {
547 pd = &default_i2c_data;
548 pd->bus_num = 7;
549 }
550
551 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
552 &s3c_device_i2c7);
553
554 if (!npd->cfg_gpio)
555 npd->cfg_gpio = s3c_i2c7_cfg_gpio;
556 }
557 #endif /* CONFIG_S3C_DEV_I2C7 */
558
559 /* I2S */
560
561 #ifdef CONFIG_PLAT_S3C24XX
562 static struct resource s3c_iis_resource[] = {
563 [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS),
564 };
565
566 struct platform_device s3c_device_iis = {
567 .name = "s3c24xx-iis",
568 .id = -1,
569 .num_resources = ARRAY_SIZE(s3c_iis_resource),
570 .resource = s3c_iis_resource,
571 .dev = {
572 .dma_mask = &samsung_device_dma_mask,
573 .coherent_dma_mask = DMA_BIT_MASK(32),
574 }
575 };
576 #endif /* CONFIG_PLAT_S3C24XX */
577
578 /* IDE CFCON */
579
580 #ifdef CONFIG_SAMSUNG_DEV_IDE
581 static struct resource s3c_cfcon_resource[] = {
582 [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K),
583 [1] = DEFINE_RES_IRQ(IRQ_CFCON),
584 };
585
586 struct platform_device s3c_device_cfcon = {
587 .id = 0,
588 .num_resources = ARRAY_SIZE(s3c_cfcon_resource),
589 .resource = s3c_cfcon_resource,
590 };
591
s3c_ide_set_platdata(struct s3c_ide_platdata * pdata)592 void __init s3c_ide_set_platdata(struct s3c_ide_platdata *pdata)
593 {
594 s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata),
595 &s3c_device_cfcon);
596 }
597 #endif /* CONFIG_SAMSUNG_DEV_IDE */
598
599 /* KEYPAD */
600
601 #ifdef CONFIG_SAMSUNG_DEV_KEYPAD
602 static struct resource samsung_keypad_resources[] = {
603 [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32),
604 [1] = DEFINE_RES_IRQ(IRQ_KEYPAD),
605 };
606
607 struct platform_device samsung_device_keypad = {
608 .name = "samsung-keypad",
609 .id = -1,
610 .num_resources = ARRAY_SIZE(samsung_keypad_resources),
611 .resource = samsung_keypad_resources,
612 };
613
samsung_keypad_set_platdata(struct samsung_keypad_platdata * pd)614 void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd)
615 {
616 struct samsung_keypad_platdata *npd;
617
618 npd = s3c_set_platdata(pd, sizeof(struct samsung_keypad_platdata),
619 &samsung_device_keypad);
620
621 if (!npd->cfg_gpio)
622 npd->cfg_gpio = samsung_keypad_cfg_gpio;
623 }
624 #endif /* CONFIG_SAMSUNG_DEV_KEYPAD */
625
626 /* LCD Controller */
627
628 #ifdef CONFIG_PLAT_S3C24XX
629 static struct resource s3c_lcd_resource[] = {
630 [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD),
631 [1] = DEFINE_RES_IRQ(IRQ_LCD),
632 };
633
634 struct platform_device s3c_device_lcd = {
635 .name = "s3c2410-lcd",
636 .id = -1,
637 .num_resources = ARRAY_SIZE(s3c_lcd_resource),
638 .resource = s3c_lcd_resource,
639 .dev = {
640 .dma_mask = &samsung_device_dma_mask,
641 .coherent_dma_mask = DMA_BIT_MASK(32),
642 }
643 };
644
s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info * pd)645 void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
646 {
647 struct s3c2410fb_mach_info *npd;
648
649 npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd);
650 if (npd) {
651 npd->displays = kmemdup(pd->displays,
652 sizeof(struct s3c2410fb_display) * npd->num_displays,
653 GFP_KERNEL);
654 if (!npd->displays)
655 printk(KERN_ERR "no memory for LCD display data\n");
656 } else {
657 printk(KERN_ERR "no memory for LCD platform data\n");
658 }
659 }
660 #endif /* CONFIG_PLAT_S3C24XX */
661
662 /* NAND */
663
664 #ifdef CONFIG_S3C_DEV_NAND
665 static struct resource s3c_nand_resource[] = {
666 [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M),
667 };
668
669 struct platform_device s3c_device_nand = {
670 .name = "s3c2410-nand",
671 .id = -1,
672 .num_resources = ARRAY_SIZE(s3c_nand_resource),
673 .resource = s3c_nand_resource,
674 };
675
676 /*
677 * s3c_nand_copy_set() - copy nand set data
678 * @set: The new structure, directly copied from the old.
679 *
680 * Copy all the fields from the NAND set field from what is probably __initdata
681 * to new kernel memory. The code returns 0 if the copy happened correctly or
682 * an error code for the calling function to display.
683 *
684 * Note, we currently do not try and look to see if we've already copied the
685 * data in a previous set.
686 */
s3c_nand_copy_set(struct s3c2410_nand_set * set)687 static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set)
688 {
689 void *ptr;
690 int size;
691
692 size = sizeof(struct mtd_partition) * set->nr_partitions;
693 if (size) {
694 ptr = kmemdup(set->partitions, size, GFP_KERNEL);
695 set->partitions = ptr;
696
697 if (!ptr)
698 return -ENOMEM;
699 }
700
701 if (set->nr_map && set->nr_chips) {
702 size = sizeof(int) * set->nr_chips;
703 ptr = kmemdup(set->nr_map, size, GFP_KERNEL);
704 set->nr_map = ptr;
705
706 if (!ptr)
707 return -ENOMEM;
708 }
709
710 return 0;
711 }
712
s3c_nand_set_platdata(struct s3c2410_platform_nand * nand)713 void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand)
714 {
715 struct s3c2410_platform_nand *npd;
716 int size;
717 int ret;
718
719 /* note, if we get a failure in allocation, we simply drop out of the
720 * function. If there is so little memory available at initialisation
721 * time then there is little chance the system is going to run.
722 */
723
724 npd = s3c_set_platdata(nand, sizeof(struct s3c2410_platform_nand),
725 &s3c_device_nand);
726 if (!npd)
727 return;
728
729 /* now see if we need to copy any of the nand set data */
730
731 size = sizeof(struct s3c2410_nand_set) * npd->nr_sets;
732 if (size) {
733 struct s3c2410_nand_set *from = npd->sets;
734 struct s3c2410_nand_set *to;
735 int i;
736
737 to = kmemdup(from, size, GFP_KERNEL);
738 npd->sets = to; /* set, even if we failed */
739
740 if (!to) {
741 printk(KERN_ERR "%s: no memory for sets\n", __func__);
742 return;
743 }
744
745 for (i = 0; i < npd->nr_sets; i++) {
746 ret = s3c_nand_copy_set(to);
747 if (ret) {
748 printk(KERN_ERR "%s: failed to copy set %d\n",
749 __func__, i);
750 return;
751 }
752 to++;
753 }
754 }
755 }
756 #endif /* CONFIG_S3C_DEV_NAND */
757
758 /* ONENAND */
759
760 #ifdef CONFIG_S3C_DEV_ONENAND
761 static struct resource s3c_onenand_resources[] = {
762 [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K),
763 [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF),
764 [2] = DEFINE_RES_IRQ(IRQ_ONENAND),
765 };
766
767 struct platform_device s3c_device_onenand = {
768 .name = "samsung-onenand",
769 .id = 0,
770 .num_resources = ARRAY_SIZE(s3c_onenand_resources),
771 .resource = s3c_onenand_resources,
772 };
773 #endif /* CONFIG_S3C_DEV_ONENAND */
774
775 #ifdef CONFIG_S3C64XX_DEV_ONENAND1
776 static struct resource s3c64xx_onenand1_resources[] = {
777 [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K),
778 [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF),
779 [2] = DEFINE_RES_IRQ(IRQ_ONENAND1),
780 };
781
782 struct platform_device s3c64xx_device_onenand1 = {
783 .name = "samsung-onenand",
784 .id = 1,
785 .num_resources = ARRAY_SIZE(s3c64xx_onenand1_resources),
786 .resource = s3c64xx_onenand1_resources,
787 };
788
s3c64xx_onenand1_set_platdata(struct onenand_platform_data * pdata)789 void __init s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata)
790 {
791 s3c_set_platdata(pdata, sizeof(struct onenand_platform_data),
792 &s3c64xx_device_onenand1);
793 }
794 #endif /* CONFIG_S3C64XX_DEV_ONENAND1 */
795
796 /* PWM Timer */
797
798 #ifdef CONFIG_SAMSUNG_DEV_PWM
799 static struct resource samsung_pwm_resource[] = {
800 DEFINE_RES_MEM(SAMSUNG_PA_TIMER, SZ_4K),
801 };
802
803 struct platform_device samsung_device_pwm = {
804 .name = "samsung-pwm",
805 .id = -1,
806 .num_resources = ARRAY_SIZE(samsung_pwm_resource),
807 .resource = samsung_pwm_resource,
808 };
809
samsung_pwm_set_platdata(struct samsung_pwm_variant * pd)810 void __init samsung_pwm_set_platdata(struct samsung_pwm_variant *pd)
811 {
812 samsung_device_pwm.dev.platform_data = pd;
813 }
814 #endif /* CONFIG_SAMSUNG_DEV_PWM */
815
816 /* RTC */
817
818 #ifdef CONFIG_PLAT_S3C24XX
819 static struct resource s3c_rtc_resource[] = {
820 [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256),
821 [1] = DEFINE_RES_IRQ(IRQ_RTC),
822 [2] = DEFINE_RES_IRQ(IRQ_TICK),
823 };
824
825 struct platform_device s3c_device_rtc = {
826 .name = "s3c2410-rtc",
827 .id = -1,
828 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
829 .resource = s3c_rtc_resource,
830 };
831 #endif /* CONFIG_PLAT_S3C24XX */
832
833 #ifdef CONFIG_S3C_DEV_RTC
834 static struct resource s3c_rtc_resource[] = {
835 [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256),
836 [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM),
837 [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC),
838 };
839
840 struct platform_device s3c_device_rtc = {
841 .name = "s3c64xx-rtc",
842 .id = -1,
843 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
844 .resource = s3c_rtc_resource,
845 };
846 #endif /* CONFIG_S3C_DEV_RTC */
847
848 /* SDI */
849
850 #ifdef CONFIG_PLAT_S3C24XX
851 static struct resource s3c_sdi_resource[] = {
852 [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI),
853 [1] = DEFINE_RES_IRQ(IRQ_SDI),
854 };
855
856 struct platform_device s3c_device_sdi = {
857 .name = "s3c2410-sdi",
858 .id = -1,
859 .num_resources = ARRAY_SIZE(s3c_sdi_resource),
860 .resource = s3c_sdi_resource,
861 };
862
s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata * pdata)863 void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
864 {
865 s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata),
866 &s3c_device_sdi);
867 }
868 #endif /* CONFIG_PLAT_S3C24XX */
869
870 /* SPI */
871
872 #ifdef CONFIG_PLAT_S3C24XX
873 static struct resource s3c_spi0_resource[] = {
874 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32),
875 [1] = DEFINE_RES_IRQ(IRQ_SPI0),
876 };
877
878 struct platform_device s3c_device_spi0 = {
879 .name = "s3c2410-spi",
880 .id = 0,
881 .num_resources = ARRAY_SIZE(s3c_spi0_resource),
882 .resource = s3c_spi0_resource,
883 .dev = {
884 .dma_mask = &samsung_device_dma_mask,
885 .coherent_dma_mask = DMA_BIT_MASK(32),
886 }
887 };
888
889 static struct resource s3c_spi1_resource[] = {
890 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32),
891 [1] = DEFINE_RES_IRQ(IRQ_SPI1),
892 };
893
894 struct platform_device s3c_device_spi1 = {
895 .name = "s3c2410-spi",
896 .id = 1,
897 .num_resources = ARRAY_SIZE(s3c_spi1_resource),
898 .resource = s3c_spi1_resource,
899 .dev = {
900 .dma_mask = &samsung_device_dma_mask,
901 .coherent_dma_mask = DMA_BIT_MASK(32),
902 }
903 };
904 #endif /* CONFIG_PLAT_S3C24XX */
905
906 /* Touchscreen */
907
908 #ifdef CONFIG_PLAT_S3C24XX
909 static struct resource s3c_ts_resource[] = {
910 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
911 [1] = DEFINE_RES_IRQ(IRQ_TC),
912 };
913
914 struct platform_device s3c_device_ts = {
915 .name = "s3c2410-ts",
916 .id = -1,
917 .dev.parent = &s3c_device_adc.dev,
918 .num_resources = ARRAY_SIZE(s3c_ts_resource),
919 .resource = s3c_ts_resource,
920 };
921
s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info * hard_s3c2410ts_info)922 void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
923 {
924 s3c_set_platdata(hard_s3c2410ts_info,
925 sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts);
926 }
927 #endif /* CONFIG_PLAT_S3C24XX */
928
929 #ifdef CONFIG_SAMSUNG_DEV_TS
930 static struct s3c2410_ts_mach_info default_ts_data __initdata = {
931 .delay = 10000,
932 .presc = 49,
933 .oversampling_shift = 2,
934 };
935
s3c64xx_ts_set_platdata(struct s3c2410_ts_mach_info * pd)936 void __init s3c64xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
937 {
938 if (!pd)
939 pd = &default_ts_data;
940
941 s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info),
942 &s3c_device_adc);
943 }
944 #endif /* CONFIG_SAMSUNG_DEV_TS */
945
946 /* USB */
947
948 #ifdef CONFIG_S3C_DEV_USB_HOST
949 static struct resource s3c_usb_resource[] = {
950 [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256),
951 [1] = DEFINE_RES_IRQ(IRQ_USBH),
952 };
953
954 struct platform_device s3c_device_ohci = {
955 .name = "s3c2410-ohci",
956 .id = -1,
957 .num_resources = ARRAY_SIZE(s3c_usb_resource),
958 .resource = s3c_usb_resource,
959 .dev = {
960 .dma_mask = &samsung_device_dma_mask,
961 .coherent_dma_mask = DMA_BIT_MASK(32),
962 }
963 };
964
965 /*
966 * s3c_ohci_set_platdata - initialise OHCI device platform data
967 * @info: The platform data.
968 *
969 * This call copies the @info passed in and sets the device .platform_data
970 * field to that copy. The @info is copied so that the original can be marked
971 * __initdata.
972 */
973
s3c_ohci_set_platdata(struct s3c2410_hcd_info * info)974 void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info)
975 {
976 s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info),
977 &s3c_device_ohci);
978 }
979 #endif /* CONFIG_S3C_DEV_USB_HOST */
980
981 /* USB Device (Gadget) */
982
983 #ifdef CONFIG_PLAT_S3C24XX
984 static struct resource s3c_usbgadget_resource[] = {
985 [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV),
986 [1] = DEFINE_RES_IRQ(IRQ_USBD),
987 };
988
989 struct platform_device s3c_device_usbgadget = {
990 .name = "s3c2410-usbgadget",
991 .id = -1,
992 .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
993 .resource = s3c_usbgadget_resource,
994 };
995
s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info * pd)996 void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
997 {
998 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget);
999 }
1000 #endif /* CONFIG_PLAT_S3C24XX */
1001
1002 /* USB HSOTG */
1003
1004 #ifdef CONFIG_S3C_DEV_USB_HSOTG
1005 static struct resource s3c_usb_hsotg_resources[] = {
1006 [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K),
1007 [1] = DEFINE_RES_IRQ(IRQ_OTG),
1008 };
1009
1010 struct platform_device s3c_device_usb_hsotg = {
1011 .name = "s3c-hsotg",
1012 .id = -1,
1013 .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources),
1014 .resource = s3c_usb_hsotg_resources,
1015 .dev = {
1016 .dma_mask = &samsung_device_dma_mask,
1017 .coherent_dma_mask = DMA_BIT_MASK(32),
1018 },
1019 };
1020
dwc2_hsotg_set_platdata(struct dwc2_hsotg_plat * pd)1021 void __init dwc2_hsotg_set_platdata(struct dwc2_hsotg_plat *pd)
1022 {
1023 struct dwc2_hsotg_plat *npd;
1024
1025 npd = s3c_set_platdata(pd, sizeof(struct dwc2_hsotg_plat),
1026 &s3c_device_usb_hsotg);
1027
1028 if (!npd->phy_init)
1029 npd->phy_init = s5p_usb_phy_init;
1030 if (!npd->phy_exit)
1031 npd->phy_exit = s5p_usb_phy_exit;
1032 }
1033 #endif /* CONFIG_S3C_DEV_USB_HSOTG */
1034
1035 /* USB High Spped 2.0 Device (Gadget) */
1036
1037 #ifdef CONFIG_PLAT_S3C24XX
1038 static struct resource s3c_hsudc_resource[] = {
1039 [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC),
1040 [1] = DEFINE_RES_IRQ(IRQ_USBD),
1041 };
1042
1043 struct platform_device s3c_device_usb_hsudc = {
1044 .name = "s3c-hsudc",
1045 .id = -1,
1046 .num_resources = ARRAY_SIZE(s3c_hsudc_resource),
1047 .resource = s3c_hsudc_resource,
1048 .dev = {
1049 .dma_mask = &samsung_device_dma_mask,
1050 .coherent_dma_mask = DMA_BIT_MASK(32),
1051 },
1052 };
1053
s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata * pd)1054 void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd)
1055 {
1056 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc);
1057 }
1058 #endif /* CONFIG_PLAT_S3C24XX */
1059
1060 /* WDT */
1061
1062 #ifdef CONFIG_S3C_DEV_WDT
1063 static struct resource s3c_wdt_resource[] = {
1064 [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K),
1065 [1] = DEFINE_RES_IRQ(IRQ_WDT),
1066 };
1067
1068 struct platform_device s3c_device_wdt = {
1069 .name = "s3c2410-wdt",
1070 .id = -1,
1071 .num_resources = ARRAY_SIZE(s3c_wdt_resource),
1072 .resource = s3c_wdt_resource,
1073 };
1074 #endif /* CONFIG_S3C_DEV_WDT */
1075
1076 #ifdef CONFIG_S3C64XX_DEV_SPI0
1077 static struct resource s3c64xx_spi0_resource[] = {
1078 [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256),
1079 [1] = DEFINE_RES_IRQ(IRQ_SPI0),
1080 };
1081
1082 struct platform_device s3c64xx_device_spi0 = {
1083 .name = "s3c6410-spi",
1084 .id = 0,
1085 .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource),
1086 .resource = s3c64xx_spi0_resource,
1087 .dev = {
1088 .dma_mask = &samsung_device_dma_mask,
1089 .coherent_dma_mask = DMA_BIT_MASK(32),
1090 },
1091 };
1092
s3c64xx_spi0_set_platdata(int (* cfg_gpio)(void),int src_clk_nr,int num_cs)1093 void __init s3c64xx_spi0_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1094 int num_cs)
1095 {
1096 struct s3c64xx_spi_info pd;
1097
1098 /* Reject invalid configuration */
1099 if (!num_cs || src_clk_nr < 0) {
1100 pr_err("%s: Invalid SPI configuration\n", __func__);
1101 return;
1102 }
1103
1104 pd.num_cs = num_cs;
1105 pd.src_clk_nr = src_clk_nr;
1106 pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi0_cfg_gpio;
1107
1108 s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi0);
1109 }
1110 #endif /* CONFIG_S3C64XX_DEV_SPI0 */
1111
1112 #ifdef CONFIG_S3C64XX_DEV_SPI1
1113 static struct resource s3c64xx_spi1_resource[] = {
1114 [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256),
1115 [1] = DEFINE_RES_IRQ(IRQ_SPI1),
1116 };
1117
1118 struct platform_device s3c64xx_device_spi1 = {
1119 .name = "s3c6410-spi",
1120 .id = 1,
1121 .num_resources = ARRAY_SIZE(s3c64xx_spi1_resource),
1122 .resource = s3c64xx_spi1_resource,
1123 .dev = {
1124 .dma_mask = &samsung_device_dma_mask,
1125 .coherent_dma_mask = DMA_BIT_MASK(32),
1126 },
1127 };
1128
s3c64xx_spi1_set_platdata(int (* cfg_gpio)(void),int src_clk_nr,int num_cs)1129 void __init s3c64xx_spi1_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1130 int num_cs)
1131 {
1132 struct s3c64xx_spi_info pd;
1133
1134 /* Reject invalid configuration */
1135 if (!num_cs || src_clk_nr < 0) {
1136 pr_err("%s: Invalid SPI configuration\n", __func__);
1137 return;
1138 }
1139
1140 pd.num_cs = num_cs;
1141 pd.src_clk_nr = src_clk_nr;
1142 pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi1_cfg_gpio;
1143
1144 s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi1);
1145 }
1146 #endif /* CONFIG_S3C64XX_DEV_SPI1 */
1147
1148 #ifdef CONFIG_S3C64XX_DEV_SPI2
1149 static struct resource s3c64xx_spi2_resource[] = {
1150 [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256),
1151 [1] = DEFINE_RES_IRQ(IRQ_SPI2),
1152 };
1153
1154 struct platform_device s3c64xx_device_spi2 = {
1155 .name = "s3c6410-spi",
1156 .id = 2,
1157 .num_resources = ARRAY_SIZE(s3c64xx_spi2_resource),
1158 .resource = s3c64xx_spi2_resource,
1159 .dev = {
1160 .dma_mask = &samsung_device_dma_mask,
1161 .coherent_dma_mask = DMA_BIT_MASK(32),
1162 },
1163 };
1164
s3c64xx_spi2_set_platdata(int (* cfg_gpio)(void),int src_clk_nr,int num_cs)1165 void __init s3c64xx_spi2_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1166 int num_cs)
1167 {
1168 struct s3c64xx_spi_info pd;
1169
1170 /* Reject invalid configuration */
1171 if (!num_cs || src_clk_nr < 0) {
1172 pr_err("%s: Invalid SPI configuration\n", __func__);
1173 return;
1174 }
1175
1176 pd.num_cs = num_cs;
1177 pd.src_clk_nr = src_clk_nr;
1178 pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi2_cfg_gpio;
1179
1180 s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi2);
1181 }
1182 #endif /* CONFIG_S3C64XX_DEV_SPI2 */
1183