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1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * HD-audio core stuff
4  */
5 
6 #ifndef __SOUND_HDAUDIO_H
7 #define __SOUND_HDAUDIO_H
8 
9 #include <linux/device.h>
10 #include <linux/interrupt.h>
11 #include <linux/timecounter.h>
12 #include <sound/core.h>
13 #include <sound/memalloc.h>
14 #include <sound/hda_verbs.h>
15 #include <drm/i915_component.h>
16 
17 /* codec node id */
18 typedef u16 hda_nid_t;
19 
20 struct hdac_bus;
21 struct hdac_stream;
22 struct hdac_device;
23 struct hdac_driver;
24 struct hdac_widget_tree;
25 struct hda_device_id;
26 
27 /*
28  * exported bus type
29  */
30 extern struct bus_type snd_hda_bus_type;
31 
32 /*
33  * generic arrays
34  */
35 struct snd_array {
36 	unsigned int used;
37 	unsigned int alloced;
38 	unsigned int elem_size;
39 	unsigned int alloc_align;
40 	void *list;
41 };
42 
43 /*
44  * HD-audio codec base device
45  */
46 struct hdac_device {
47 	struct device dev;
48 	int type;
49 	struct hdac_bus *bus;
50 	unsigned int addr;		/* codec address */
51 	struct list_head list;		/* list point for bus codec_list */
52 
53 	hda_nid_t afg;			/* AFG node id */
54 	hda_nid_t mfg;			/* MFG node id */
55 
56 	/* ids */
57 	unsigned int vendor_id;
58 	unsigned int subsystem_id;
59 	unsigned int revision_id;
60 	unsigned int afg_function_id;
61 	unsigned int mfg_function_id;
62 	unsigned int afg_unsol:1;
63 	unsigned int mfg_unsol:1;
64 
65 	unsigned int power_caps;	/* FG power caps */
66 
67 	const char *vendor_name;	/* codec vendor name */
68 	const char *chip_name;		/* codec chip name */
69 
70 	/* verb exec op override */
71 	int (*exec_verb)(struct hdac_device *dev, unsigned int cmd,
72 			 unsigned int flags, unsigned int *res);
73 
74 	/* widgets */
75 	unsigned int num_nodes;
76 	hda_nid_t start_nid, end_nid;
77 
78 	/* misc flags */
79 	atomic_t in_pm;		/* suspend/resume being performed */
80 	bool  link_power_control:1;
81 
82 	/* sysfs */
83 	struct hdac_widget_tree *widgets;
84 
85 	/* regmap */
86 	struct regmap *regmap;
87 	struct snd_array vendor_verbs;
88 	bool lazy_cache:1;	/* don't wake up for writes */
89 	bool caps_overwriting:1; /* caps overwrite being in process */
90 	bool cache_coef:1;	/* cache COEF read/write too */
91 };
92 
93 /* device/driver type used for matching */
94 enum {
95 	HDA_DEV_CORE,
96 	HDA_DEV_LEGACY,
97 	HDA_DEV_ASOC,
98 };
99 
100 /* direction */
101 enum {
102 	HDA_INPUT, HDA_OUTPUT
103 };
104 
105 #define dev_to_hdac_dev(_dev)	container_of(_dev, struct hdac_device, dev)
106 
107 int snd_hdac_device_init(struct hdac_device *dev, struct hdac_bus *bus,
108 			 const char *name, unsigned int addr);
109 void snd_hdac_device_exit(struct hdac_device *dev);
110 int snd_hdac_device_register(struct hdac_device *codec);
111 void snd_hdac_device_unregister(struct hdac_device *codec);
112 int snd_hdac_device_set_chip_name(struct hdac_device *codec, const char *name);
113 int snd_hdac_codec_modalias(struct hdac_device *hdac, char *buf, size_t size);
114 
115 int snd_hdac_refresh_widgets(struct hdac_device *codec);
116 int snd_hdac_refresh_widget_sysfs(struct hdac_device *codec);
117 
118 unsigned int snd_hdac_make_cmd(struct hdac_device *codec, hda_nid_t nid,
119 			       unsigned int verb, unsigned int parm);
120 int snd_hdac_exec_verb(struct hdac_device *codec, unsigned int cmd,
121 		       unsigned int flags, unsigned int *res);
122 int snd_hdac_read(struct hdac_device *codec, hda_nid_t nid,
123 		  unsigned int verb, unsigned int parm, unsigned int *res);
124 int _snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid, int parm,
125 			unsigned int *res);
126 int snd_hdac_read_parm_uncached(struct hdac_device *codec, hda_nid_t nid,
127 				int parm);
128 int snd_hdac_override_parm(struct hdac_device *codec, hda_nid_t nid,
129 			   unsigned int parm, unsigned int val);
130 int snd_hdac_get_connections(struct hdac_device *codec, hda_nid_t nid,
131 			     hda_nid_t *conn_list, int max_conns);
132 int snd_hdac_get_sub_nodes(struct hdac_device *codec, hda_nid_t nid,
133 			   hda_nid_t *start_id);
134 unsigned int snd_hdac_calc_stream_format(unsigned int rate,
135 					 unsigned int channels,
136 					 unsigned int format,
137 					 unsigned int maxbps,
138 					 unsigned short spdif_ctls);
139 int snd_hdac_query_supported_pcm(struct hdac_device *codec, hda_nid_t nid,
140 				u32 *ratesp, u64 *formatsp, unsigned int *bpsp);
141 bool snd_hdac_is_supported_format(struct hdac_device *codec, hda_nid_t nid,
142 				  unsigned int format);
143 
144 int snd_hdac_codec_read(struct hdac_device *hdac, hda_nid_t nid,
145 			int flags, unsigned int verb, unsigned int parm);
146 int snd_hdac_codec_write(struct hdac_device *hdac, hda_nid_t nid,
147 			int flags, unsigned int verb, unsigned int parm);
148 bool snd_hdac_check_power_state(struct hdac_device *hdac,
149 		hda_nid_t nid, unsigned int target_state);
150 /**
151  * snd_hdac_read_parm - read a codec parameter
152  * @codec: the codec object
153  * @nid: NID to read a parameter
154  * @parm: parameter to read
155  *
156  * Returns -1 for error.  If you need to distinguish the error more
157  * strictly, use _snd_hdac_read_parm() directly.
158  */
snd_hdac_read_parm(struct hdac_device * codec,hda_nid_t nid,int parm)159 static inline int snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid,
160 				     int parm)
161 {
162 	unsigned int val;
163 
164 	return _snd_hdac_read_parm(codec, nid, parm, &val) < 0 ? -1 : val;
165 }
166 
167 #ifdef CONFIG_PM
168 int snd_hdac_power_up(struct hdac_device *codec);
169 int snd_hdac_power_down(struct hdac_device *codec);
170 int snd_hdac_power_up_pm(struct hdac_device *codec);
171 int snd_hdac_power_down_pm(struct hdac_device *codec);
172 int snd_hdac_keep_power_up(struct hdac_device *codec);
173 #else
snd_hdac_power_up(struct hdac_device * codec)174 static inline int snd_hdac_power_up(struct hdac_device *codec) { return 0; }
snd_hdac_power_down(struct hdac_device * codec)175 static inline int snd_hdac_power_down(struct hdac_device *codec) { return 0; }
snd_hdac_power_up_pm(struct hdac_device * codec)176 static inline int snd_hdac_power_up_pm(struct hdac_device *codec) { return 0; }
snd_hdac_power_down_pm(struct hdac_device * codec)177 static inline int snd_hdac_power_down_pm(struct hdac_device *codec) { return 0; }
snd_hdac_keep_power_up(struct hdac_device * codec)178 static inline int snd_hdac_keep_power_up(struct hdac_device *codec) { return 0; }
179 #endif
180 
181 /*
182  * HD-audio codec base driver
183  */
184 struct hdac_driver {
185 	struct device_driver driver;
186 	int type;
187 	const struct hda_device_id *id_table;
188 	int (*match)(struct hdac_device *dev, struct hdac_driver *drv);
189 	void (*unsol_event)(struct hdac_device *dev, unsigned int event);
190 };
191 
192 #define drv_to_hdac_driver(_drv) container_of(_drv, struct hdac_driver, driver)
193 
194 const struct hda_device_id *
195 hdac_get_device_id(struct hdac_device *hdev, struct hdac_driver *drv);
196 
197 /*
198  * Bus verb operators
199  */
200 struct hdac_bus_ops {
201 	/* send a single command */
202 	int (*command)(struct hdac_bus *bus, unsigned int cmd);
203 	/* get a response from the last command */
204 	int (*get_response)(struct hdac_bus *bus, unsigned int addr,
205 			    unsigned int *res);
206 	/* control the link power  */
207 	int (*link_power)(struct hdac_bus *bus, bool enable);
208 };
209 
210 /*
211  * Lowlevel I/O operators
212  */
213 struct hdac_io_ops {
214 	/* mapped register accesses */
215 	void (*reg_writel)(u32 value, u32 __iomem *addr);
216 	u32 (*reg_readl)(u32 __iomem *addr);
217 	void (*reg_writew)(u16 value, u16 __iomem *addr);
218 	u16 (*reg_readw)(u16 __iomem *addr);
219 	void (*reg_writeb)(u8 value, u8 __iomem *addr);
220 	u8 (*reg_readb)(u8 __iomem *addr);
221 	/* Allocation ops */
222 	int (*dma_alloc_pages)(struct hdac_bus *bus, int type, size_t size,
223 			       struct snd_dma_buffer *buf);
224 	void (*dma_free_pages)(struct hdac_bus *bus,
225 			       struct snd_dma_buffer *buf);
226 };
227 
228 #define HDA_UNSOL_QUEUE_SIZE	64
229 #define HDA_MAX_CODECS		8	/* limit by controller side */
230 
231 /* HD Audio class code */
232 #define PCI_CLASS_MULTIMEDIA_HD_AUDIO	0x0403
233 
234 /*
235  * CORB/RIRB
236  *
237  * Each CORB entry is 4byte, RIRB is 8byte
238  */
239 struct hdac_rb {
240 	__le32 *buf;		/* virtual address of CORB/RIRB buffer */
241 	dma_addr_t addr;	/* physical address of CORB/RIRB buffer */
242 	unsigned short rp, wp;	/* RIRB read/write pointers */
243 	int cmds[HDA_MAX_CODECS];	/* number of pending requests */
244 	u32 res[HDA_MAX_CODECS];	/* last read value */
245 };
246 
247 /*
248  * HD-audio bus base driver
249  *
250  * @ppcap: pp capabilities pointer
251  * @spbcap: SPIB capabilities pointer
252  * @mlcap: MultiLink capabilities pointer
253  * @gtscap: gts capabilities pointer
254  * @drsmcap: dma resume capabilities pointer
255  */
256 struct hdac_bus {
257 	struct device *dev;
258 	const struct hdac_bus_ops *ops;
259 	const struct hdac_io_ops *io_ops;
260 
261 	/* h/w resources */
262 	unsigned long addr;
263 	void __iomem *remap_addr;
264 	int irq;
265 
266 	void __iomem *ppcap;
267 	void __iomem *spbcap;
268 	void __iomem *mlcap;
269 	void __iomem *gtscap;
270 	void __iomem *drsmcap;
271 
272 	/* codec linked list */
273 	struct list_head codec_list;
274 	unsigned int num_codecs;
275 
276 	/* link caddr -> codec */
277 	struct hdac_device *caddr_tbl[HDA_MAX_CODEC_ADDRESS + 1];
278 
279 	/* unsolicited event queue */
280 	u32 unsol_queue[HDA_UNSOL_QUEUE_SIZE * 2]; /* ring buffer */
281 	unsigned int unsol_rp, unsol_wp;
282 	struct work_struct unsol_work;
283 
284 	/* bit flags of detected codecs */
285 	unsigned long codec_mask;
286 
287 	/* bit flags of powered codecs */
288 	unsigned long codec_powered;
289 
290 	/* CORB/RIRB */
291 	struct hdac_rb corb;
292 	struct hdac_rb rirb;
293 	unsigned int last_cmd[HDA_MAX_CODECS];	/* last sent command */
294 
295 	/* CORB/RIRB and position buffers */
296 	struct snd_dma_buffer rb;
297 	struct snd_dma_buffer posbuf;
298 
299 	/* hdac_stream linked list */
300 	struct list_head stream_list;
301 
302 	/* operation state */
303 	bool chip_init:1;		/* h/w initialized */
304 
305 	/* behavior flags */
306 	bool sync_write:1;		/* sync after verb write */
307 	bool use_posbuf:1;		/* use position buffer */
308 	bool snoop:1;			/* enable snooping */
309 	bool align_bdle_4k:1;		/* BDLE align 4K boundary */
310 	bool reverse_assign:1;		/* assign devices in reverse order */
311 	bool corbrp_self_clear:1;	/* CORBRP clears itself after reset */
312 
313 	int bdl_pos_adj;		/* BDL position adjustment */
314 
315 	/* locks */
316 	spinlock_t reg_lock;
317 	struct mutex cmd_mutex;
318 
319 	/* i915 component interface */
320 	struct i915_audio_component *audio_component;
321 	int i915_power_refcount;
322 };
323 
324 int snd_hdac_bus_init(struct hdac_bus *bus, struct device *dev,
325 		      const struct hdac_bus_ops *ops,
326 		      const struct hdac_io_ops *io_ops);
327 void snd_hdac_bus_exit(struct hdac_bus *bus);
328 int snd_hdac_bus_exec_verb(struct hdac_bus *bus, unsigned int addr,
329 			   unsigned int cmd, unsigned int *res);
330 int snd_hdac_bus_exec_verb_unlocked(struct hdac_bus *bus, unsigned int addr,
331 				    unsigned int cmd, unsigned int *res);
332 void snd_hdac_bus_queue_event(struct hdac_bus *bus, u32 res, u32 res_ex);
333 
334 int snd_hdac_bus_add_device(struct hdac_bus *bus, struct hdac_device *codec);
335 void snd_hdac_bus_remove_device(struct hdac_bus *bus,
336 				struct hdac_device *codec);
337 
snd_hdac_codec_link_up(struct hdac_device * codec)338 static inline void snd_hdac_codec_link_up(struct hdac_device *codec)
339 {
340 	set_bit(codec->addr, &codec->bus->codec_powered);
341 }
342 
snd_hdac_codec_link_down(struct hdac_device * codec)343 static inline void snd_hdac_codec_link_down(struct hdac_device *codec)
344 {
345 	clear_bit(codec->addr, &codec->bus->codec_powered);
346 }
347 
348 int snd_hdac_bus_send_cmd(struct hdac_bus *bus, unsigned int val);
349 int snd_hdac_bus_get_response(struct hdac_bus *bus, unsigned int addr,
350 			      unsigned int *res);
351 int snd_hdac_bus_parse_capabilities(struct hdac_bus *bus);
352 int snd_hdac_link_power(struct hdac_device *codec, bool enable);
353 
354 bool snd_hdac_bus_init_chip(struct hdac_bus *bus, bool full_reset);
355 void snd_hdac_bus_stop_chip(struct hdac_bus *bus);
356 void snd_hdac_bus_init_cmd_io(struct hdac_bus *bus);
357 void snd_hdac_bus_stop_cmd_io(struct hdac_bus *bus);
358 void snd_hdac_bus_enter_link_reset(struct hdac_bus *bus);
359 void snd_hdac_bus_exit_link_reset(struct hdac_bus *bus);
360 int snd_hdac_bus_reset_link(struct hdac_bus *bus, bool full_reset);
361 
362 void snd_hdac_bus_update_rirb(struct hdac_bus *bus);
363 int snd_hdac_bus_handle_stream_irq(struct hdac_bus *bus, unsigned int status,
364 				    void (*ack)(struct hdac_bus *,
365 						struct hdac_stream *));
366 
367 int snd_hdac_bus_alloc_stream_pages(struct hdac_bus *bus);
368 void snd_hdac_bus_free_stream_pages(struct hdac_bus *bus);
369 
370 /*
371  * macros for easy use
372  */
373 #define _snd_hdac_chip_writeb(chip, reg, value) \
374 	((chip)->io_ops->reg_writeb(value, (chip)->remap_addr + (reg)))
375 #define _snd_hdac_chip_readb(chip, reg) \
376 	((chip)->io_ops->reg_readb((chip)->remap_addr + (reg)))
377 #define _snd_hdac_chip_writew(chip, reg, value) \
378 	((chip)->io_ops->reg_writew(value, (chip)->remap_addr + (reg)))
379 #define _snd_hdac_chip_readw(chip, reg) \
380 	((chip)->io_ops->reg_readw((chip)->remap_addr + (reg)))
381 #define _snd_hdac_chip_writel(chip, reg, value) \
382 	((chip)->io_ops->reg_writel(value, (chip)->remap_addr + (reg)))
383 #define _snd_hdac_chip_readl(chip, reg) \
384 	((chip)->io_ops->reg_readl((chip)->remap_addr + (reg)))
385 
386 /* read/write a register, pass without AZX_REG_ prefix */
387 #define snd_hdac_chip_writel(chip, reg, value) \
388 	_snd_hdac_chip_writel(chip, AZX_REG_ ## reg, value)
389 #define snd_hdac_chip_writew(chip, reg, value) \
390 	_snd_hdac_chip_writew(chip, AZX_REG_ ## reg, value)
391 #define snd_hdac_chip_writeb(chip, reg, value) \
392 	_snd_hdac_chip_writeb(chip, AZX_REG_ ## reg, value)
393 #define snd_hdac_chip_readl(chip, reg) \
394 	_snd_hdac_chip_readl(chip, AZX_REG_ ## reg)
395 #define snd_hdac_chip_readw(chip, reg) \
396 	_snd_hdac_chip_readw(chip, AZX_REG_ ## reg)
397 #define snd_hdac_chip_readb(chip, reg) \
398 	_snd_hdac_chip_readb(chip, AZX_REG_ ## reg)
399 
400 /* update a register, pass without AZX_REG_ prefix */
401 #define snd_hdac_chip_updatel(chip, reg, mask, val) \
402 	snd_hdac_chip_writel(chip, reg, \
403 			     (snd_hdac_chip_readl(chip, reg) & ~(mask)) | (val))
404 #define snd_hdac_chip_updatew(chip, reg, mask, val) \
405 	snd_hdac_chip_writew(chip, reg, \
406 			     (snd_hdac_chip_readw(chip, reg) & ~(mask)) | (val))
407 #define snd_hdac_chip_updateb(chip, reg, mask, val) \
408 	snd_hdac_chip_writeb(chip, reg, \
409 			     (snd_hdac_chip_readb(chip, reg) & ~(mask)) | (val))
410 
411 /*
412  * HD-audio stream
413  */
414 struct hdac_stream {
415 	struct hdac_bus *bus;
416 	struct snd_dma_buffer bdl; /* BDL buffer */
417 	__le32 *posbuf;		/* position buffer pointer */
418 	int direction;		/* playback / capture (SNDRV_PCM_STREAM_*) */
419 
420 	unsigned int bufsize;	/* size of the play buffer in bytes */
421 	unsigned int period_bytes; /* size of the period in bytes */
422 	unsigned int frags;	/* number for period in the play buffer */
423 	unsigned int fifo_size;	/* FIFO size */
424 
425 	void __iomem *sd_addr;	/* stream descriptor pointer */
426 
427 	u32 sd_int_sta_mask;	/* stream int status mask */
428 
429 	/* pcm support */
430 	struct snd_pcm_substream *substream;	/* assigned substream,
431 						 * set in PCM open
432 						 */
433 	unsigned int format_val;	/* format value to be set in the
434 					 * controller and the codec
435 					 */
436 	unsigned char stream_tag;	/* assigned stream */
437 	unsigned char index;		/* stream index */
438 	int assigned_key;		/* last device# key assigned to */
439 
440 	bool opened:1;
441 	bool running:1;
442 	bool prepared:1;
443 	bool no_period_wakeup:1;
444 	bool locked:1;
445 
446 	/* timestamp */
447 	unsigned long start_wallclk;	/* start + minimum wallclk */
448 	unsigned long period_wallclk;	/* wallclk for period */
449 	struct timecounter  tc;
450 	struct cyclecounter cc;
451 	int delay_negative_threshold;
452 
453 	struct list_head list;
454 #ifdef CONFIG_SND_HDA_DSP_LOADER
455 	/* DSP access mutex */
456 	struct mutex dsp_mutex;
457 #endif
458 };
459 
460 void snd_hdac_stream_init(struct hdac_bus *bus, struct hdac_stream *azx_dev,
461 			  int idx, int direction, int tag);
462 struct hdac_stream *snd_hdac_stream_assign(struct hdac_bus *bus,
463 					   struct snd_pcm_substream *substream);
464 void snd_hdac_stream_release(struct hdac_stream *azx_dev);
465 struct hdac_stream *snd_hdac_get_stream(struct hdac_bus *bus,
466 					int dir, int stream_tag);
467 
468 int snd_hdac_stream_setup(struct hdac_stream *azx_dev);
469 void snd_hdac_stream_cleanup(struct hdac_stream *azx_dev);
470 int snd_hdac_stream_setup_periods(struct hdac_stream *azx_dev);
471 int snd_hdac_stream_set_params(struct hdac_stream *azx_dev,
472 				unsigned int format_val);
473 void snd_hdac_stream_start(struct hdac_stream *azx_dev, bool fresh_start);
474 void snd_hdac_stream_clear(struct hdac_stream *azx_dev);
475 void snd_hdac_stream_stop(struct hdac_stream *azx_dev);
476 void snd_hdac_stream_reset(struct hdac_stream *azx_dev);
477 void snd_hdac_stream_sync_trigger(struct hdac_stream *azx_dev, bool set,
478 				  unsigned int streams, unsigned int reg);
479 void snd_hdac_stream_sync(struct hdac_stream *azx_dev, bool start,
480 			  unsigned int streams);
481 void snd_hdac_stream_timecounter_init(struct hdac_stream *azx_dev,
482 				      unsigned int streams);
483 /*
484  * macros for easy use
485  */
486 #define _snd_hdac_stream_write(type, dev, reg, value)			\
487 	((dev)->bus->io_ops->reg_write ## type(value, (dev)->sd_addr + (reg)))
488 #define _snd_hdac_stream_read(type, dev, reg)				\
489 	((dev)->bus->io_ops->reg_read ## type((dev)->sd_addr + (reg)))
490 
491 /* read/write a register, pass without AZX_REG_ prefix */
492 #define snd_hdac_stream_writel(dev, reg, value) \
493 	_snd_hdac_stream_write(l, dev, AZX_REG_ ## reg, value)
494 #define snd_hdac_stream_writew(dev, reg, value) \
495 	_snd_hdac_stream_write(w, dev, AZX_REG_ ## reg, value)
496 #define snd_hdac_stream_writeb(dev, reg, value) \
497 	_snd_hdac_stream_write(b, dev, AZX_REG_ ## reg, value)
498 #define snd_hdac_stream_readl(dev, reg) \
499 	_snd_hdac_stream_read(l, dev, AZX_REG_ ## reg)
500 #define snd_hdac_stream_readw(dev, reg) \
501 	_snd_hdac_stream_read(w, dev, AZX_REG_ ## reg)
502 #define snd_hdac_stream_readb(dev, reg) \
503 	_snd_hdac_stream_read(b, dev, AZX_REG_ ## reg)
504 
505 /* update a register, pass without AZX_REG_ prefix */
506 #define snd_hdac_stream_updatel(dev, reg, mask, val) \
507 	snd_hdac_stream_writel(dev, reg, \
508 			       (snd_hdac_stream_readl(dev, reg) & \
509 				~(mask)) | (val))
510 #define snd_hdac_stream_updatew(dev, reg, mask, val) \
511 	snd_hdac_stream_writew(dev, reg, \
512 			       (snd_hdac_stream_readw(dev, reg) & \
513 				~(mask)) | (val))
514 #define snd_hdac_stream_updateb(dev, reg, mask, val) \
515 	snd_hdac_stream_writeb(dev, reg, \
516 			       (snd_hdac_stream_readb(dev, reg) & \
517 				~(mask)) | (val))
518 
519 #ifdef CONFIG_SND_HDA_DSP_LOADER
520 /* DSP lock helpers */
521 #define snd_hdac_dsp_lock_init(dev)	mutex_init(&(dev)->dsp_mutex)
522 #define snd_hdac_dsp_lock(dev)		mutex_lock(&(dev)->dsp_mutex)
523 #define snd_hdac_dsp_unlock(dev)	mutex_unlock(&(dev)->dsp_mutex)
524 #define snd_hdac_stream_is_locked(dev)	((dev)->locked)
525 /* DSP loader helpers */
526 int snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format,
527 			 unsigned int byte_size, struct snd_dma_buffer *bufp);
528 void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start);
529 void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev,
530 			  struct snd_dma_buffer *dmab);
531 #else /* CONFIG_SND_HDA_DSP_LOADER */
532 #define snd_hdac_dsp_lock_init(dev)	do {} while (0)
533 #define snd_hdac_dsp_lock(dev)		do {} while (0)
534 #define snd_hdac_dsp_unlock(dev)	do {} while (0)
535 #define snd_hdac_stream_is_locked(dev)	0
536 
537 static inline int
snd_hdac_dsp_prepare(struct hdac_stream * azx_dev,unsigned int format,unsigned int byte_size,struct snd_dma_buffer * bufp)538 snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format,
539 		     unsigned int byte_size, struct snd_dma_buffer *bufp)
540 {
541 	return 0;
542 }
543 
snd_hdac_dsp_trigger(struct hdac_stream * azx_dev,bool start)544 static inline void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start)
545 {
546 }
547 
snd_hdac_dsp_cleanup(struct hdac_stream * azx_dev,struct snd_dma_buffer * dmab)548 static inline void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev,
549 					struct snd_dma_buffer *dmab)
550 {
551 }
552 #endif /* CONFIG_SND_HDA_DSP_LOADER */
553 
554 
555 /*
556  * generic array helpers
557  */
558 void *snd_array_new(struct snd_array *array);
559 void snd_array_free(struct snd_array *array);
snd_array_init(struct snd_array * array,unsigned int size,unsigned int align)560 static inline void snd_array_init(struct snd_array *array, unsigned int size,
561 				  unsigned int align)
562 {
563 	array->elem_size = size;
564 	array->alloc_align = align;
565 }
566 
snd_array_elem(struct snd_array * array,unsigned int idx)567 static inline void *snd_array_elem(struct snd_array *array, unsigned int idx)
568 {
569 	return array->list + idx * array->elem_size;
570 }
571 
snd_array_index(struct snd_array * array,void * ptr)572 static inline unsigned int snd_array_index(struct snd_array *array, void *ptr)
573 {
574 	return (unsigned long)(ptr - array->list) / array->elem_size;
575 }
576 
577 #endif /* __SOUND_HDAUDIO_H */
578