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/arch/cris/include/arch-v10/arch/
Dio.h40 #define CRIS_LED_NETWORK_SET_G(x) argument
41 #define CRIS_LED_NETWORK_SET_R(x) argument
42 #define CRIS_LED_ACTIVE_SET_G(x) argument
43 #define CRIS_LED_ACTIVE_SET_R(x) argument
44 #define CRIS_LED_DISK_WRITE(x) argument
45 #define CRIS_LED_DISK_READ(x) argument
49 #define CRIS_LED_BIT_SET(x) argument
50 #define CRIS_LED_BIT_CLR(x) argument
59 #define CRIS_LED_NETWORK_SET(x) argument
62 #define CRIS_LED_NETWORK_SET(x) \ argument
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/arch/arm/include/asm/
Dopcodes.h27 #define ___asm_opcode_swab32(x) ( \ argument
33 #define ___asm_opcode_swab16(x) ( \ argument
37 #define ___asm_opcode_swahb32(x) ( \ argument
41 #define ___asm_opcode_swahw32(x) ( \ argument
45 #define ___asm_opcode_identity32(x) ((x) & 0xFFFFFFFF) argument
46 #define ___asm_opcode_identity16(x) ((x) & 0xFFFF) argument
91 #define ___opcode_swab32(x) swab32(x) argument
92 #define ___opcode_swab16(x) swab16(x) argument
93 #define ___opcode_swahb32(x) swahb32(x) argument
94 #define ___opcode_swahw32(x) swahw32(x) argument
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Dpgtable-3level-types.h41 #define pte_val(x) ((x).pte) argument
42 #define pmd_val(x) ((x).pmd) argument
43 #define pgd_val(x) ((x).pgd) argument
44 #define pgprot_val(x) ((x).pgprot) argument
46 #define __pte(x) ((pte_t) { (x) } ) argument
47 #define __pmd(x) ((pmd_t) { (x) } ) argument
48 #define __pgd(x) ((pgd_t) { (x) } ) argument
49 #define __pgprot(x) ((pgprot_t) { (x) } ) argument
58 #define pte_val(x) (x) argument
59 #define pmd_val(x) (x) argument
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Dpgtable-2level-types.h38 #define pte_val(x) ((x).pte) argument
39 #define pmd_val(x) ((x).pmd) argument
40 #define pgd_val(x) ((x).pgd[0]) argument
41 #define pgprot_val(x) ((x).pgprot) argument
43 #define __pte(x) ((pte_t) { (x) } ) argument
44 #define __pmd(x) ((pmd_t) { (x) } ) argument
45 #define __pgprot(x) ((pgprot_t) { (x) } ) argument
56 #define pte_val(x) (x) argument
57 #define pmd_val(x) (x) argument
58 #define pgd_val(x) ((x)[0]) argument
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/arch/sh/include/mach-common/mach/
Dmangle-port.h27 # define ioswabb(x) (x) argument
28 # define __mem_ioswabb(x) (x) argument
29 # define ioswabw(x) le16_to_cpu(x) argument
30 # define __mem_ioswabw(x) (x) argument
31 # define ioswabl(x) le32_to_cpu(x) argument
32 # define __mem_ioswabl(x) (x) argument
33 # define ioswabq(x) le64_to_cpu(x) argument
34 # define __mem_ioswabq(x) (x) argument
38 # define ioswabb(x) (x) argument
39 # define __mem_ioswabb(x) (x) argument
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/arch/mips/include/asm/sibyte/
Dsb1250_genbus.h58 #define V_IO_WIDTH_SEL(x) _SB_MAKEVALUE(x, S_IO_WIDTH_SEL) argument
59 #define G_IO_WIDTH_SEL(x) _SB_GETVALUE(x, S_IO_WIDTH_SEL, M_IO_WIDTH_SEL) argument
75 #define V_IO_TIMEOUT(x) _SB_MAKEVALUE(x, S_IO_TIMEOUT) argument
76 #define G_IO_TIMEOUT(x) _SB_GETVALUE(x, S_IO_TIMEOUT, M_IO_TIMEOUT) argument
84 #define V_IO_MULT_SIZE(x) _SB_MAKEVALUE(x, S_IO_MULT_SIZE) argument
85 #define G_IO_MULT_SIZE(x) _SB_GETVALUE(x, S_IO_MULT_SIZE, M_IO_MULT_SIZE) argument
95 #define V_IO_START_ADDR(x) _SB_MAKEVALUE(x, S_IO_START_ADDR) argument
96 #define G_IO_START_ADDR(x) _SB_GETVALUE(x, S_IO_START_ADDR, M_IO_START_ADDR) argument
109 #define V_IO_ALE_WIDTH(x) _SB_MAKEVALUE(x, S_IO_ALE_WIDTH) argument
110 #define G_IO_ALE_WIDTH(x) _SB_GETVALUE(x, S_IO_ALE_WIDTH, M_IO_ALE_WIDTH) argument
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Dbcm1480_mc.h44 #define V_BCM1480_MC_INTLV0(x) _SB_MAKEVALUE(x, S_BCM1480_MC_INTLV0) argument
45 #define G_BCM1480_MC_INTLV0(x) _SB_GETVALUE(x, S_BCM1480_MC_INTLV0, M_BCM1480_MC_INTLV0) argument
50 #define V_BCM1480_MC_INTLV1(x) _SB_MAKEVALUE(x, S_BCM1480_MC_INTLV1) argument
51 #define G_BCM1480_MC_INTLV1(x) _SB_GETVALUE(x, S_BCM1480_MC_INTLV1, M_BCM1480_MC_INTLV1) argument
56 #define V_BCM1480_MC_INTLV2(x) _SB_MAKEVALUE(x, S_BCM1480_MC_INTLV2) argument
57 #define G_BCM1480_MC_INTLV2(x) _SB_GETVALUE(x, S_BCM1480_MC_INTLV2, M_BCM1480_MC_INTLV2) argument
62 #define V_BCM1480_MC_CS_MODE(x) _SB_MAKEVALUE(x, S_BCM1480_MC_CS_MODE) argument
63 #define G_BCM1480_MC_CS_MODE(x) _SB_GETVALUE(x, S_BCM1480_MC_CS_MODE, M_BCM1480_MC_CS_MODE) argument
85 #define V_BCM1480_MC_CS0_START(x) _SB_MAKEVALUE(x, S_BCM1480_MC_CS0_START) argument
86 #define G_BCM1480_MC_CS0_START(x) _SB_GETVALUE(x, S_BCM1480_MC_CS0_START, M_BCM1480_MC_CS0_STAR… argument
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Dbcm1480_l2c.h44 #define V_BCM1480_L2C_MGMT_INDEX(x) _SB_MAKEVALUE(x, S_BCM1480_L2C_MGMT_INDEX) argument
45 #define G_BCM1480_L2C_MGMT_INDEX(x) _SB_GETVALUE(x, S_BCM1480_L2C_MGMT_INDEX, M_BCM1480_L2C_MGM… argument
49 #define V_BCM1480_L2C_MGMT_WAY(x) _SB_MAKEVALUE(x, S_BCM1480_L2C_MGMT_WAY) argument
50 #define G_BCM1480_L2C_MGMT_WAY(x) _SB_GETVALUE(x, S_BCM1480_L2C_MGMT_WAY, M_BCM1480_L2C_MGMT_WA… argument
57 #define V_BCM1480_L2C_MGMT_ECC_DIAG(x) _SB_MAKEVALUE(x, S_BCM1480_L2C_MGMT_ECC_DIAG) argument
58 #define G_BCM1480_L2C_MGMT_ECC_DIAG(x) _SB_GETVALUE(x, S_BCM1480_L2C_MGMT_ECC_DIAG, M_BCM1480_L… argument
75 #define V_BCM1480_L2C_TAG_INDEX(x) _SB_MAKEVALUE(x, S_BCM1480_L2C_TAG_INDEX) argument
76 #define G_BCM1480_L2C_TAG_INDEX(x) _SB_GETVALUE(x, S_BCM1480_L2C_TAG_INDEX, M_BCM1480_L2C_TAG_I… argument
81 #define V_BCM1480_L2C_TAG_TAG(x) _SB_MAKEVALUE(x, S_BCM1480_L2C_TAG_TAG) argument
82 #define G_BCM1480_L2C_TAG_TAG(x) _SB_GETVALUE(x, S_BCM1480_L2C_TAG_TAG, M_BCM1480_L2C_TAG_TAG) argument
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Dsb1250_mc.h47 #define V_MC_CHANNEL_SEL(x) _SB_MAKEVALUE(x, S_MC_CHANNEL_SEL) argument
48 #define G_MC_CHANNEL_SEL(x) _SB_GETVALUE(x, S_MC_CHANNEL_SEL, M_MC_CHANNEL_SEL) argument
52 #define V_MC_BANK0_MAP(x) _SB_MAKEVALUE(x, S_MC_BANK0_MAP) argument
53 #define G_MC_BANK0_MAP(x) _SB_GETVALUE(x, S_MC_BANK0_MAP, M_MC_BANK0_MAP) argument
60 #define V_MC_BANK1_MAP(x) _SB_MAKEVALUE(x, S_MC_BANK1_MAP) argument
61 #define G_MC_BANK1_MAP(x) _SB_GETVALUE(x, S_MC_BANK1_MAP, M_MC_BANK1_MAP) argument
68 #define V_MC_BANK2_MAP(x) _SB_MAKEVALUE(x, S_MC_BANK2_MAP) argument
69 #define G_MC_BANK2_MAP(x) _SB_GETVALUE(x, S_MC_BANK2_MAP, M_MC_BANK2_MAP) argument
76 #define V_MC_BANK3_MAP(x) _SB_MAKEVALUE(x, S_MC_BANK3_MAP) argument
77 #define G_MC_BANK3_MAP(x) _SB_GETVALUE(x, S_MC_BANK3_MAP, M_MC_BANK3_MAP) argument
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Dsb1250_ldt.h85 #define V_LDT_DEVICEID_VENDOR(x) _SB_MAKEVALUE_32(x, S_LDT_DEVICEID_VENDOR) argument
86 #define G_LDT_DEVICEID_VENDOR(x) _SB_GETVALUE_32(x, S_LDT_DEVICEID_VENDOR, M_LDT_DEVICEID_VENDOR) argument
90 #define V_LDT_DEVICEID_DEVICEID(x) _SB_MAKEVALUE_32(x, S_LDT_DEVICEID_DEVICEID) argument
91 #define G_LDT_DEVICEID_DEVICEID(x) _SB_GETVALUE_32(x, S_LDT_DEVICEID_DEVICEID, M_LDT_DEVICEID_DEVIC… argument
115 #define V_LDT_CLASSREV_REV(x) _SB_MAKEVALUE_32(x, S_LDT_CLASSREV_REV) argument
116 #define G_LDT_CLASSREV_REV(x) _SB_GETVALUE_32(x, S_LDT_CLASSREV_REV, M_LDT_CLASSREV_REV) argument
120 #define V_LDT_CLASSREV_CLASS(x) _SB_MAKEVALUE_32(x, S_LDT_CLASSREV_CLASS) argument
121 #define G_LDT_CLASSREV_CLASS(x) _SB_GETVALUE_32(x, S_LDT_CLASSREV_CLASS, M_LDT_CLASSREV_CLASS) argument
132 #define V_LDT_DEVHDR_CLINESZ(x) _SB_MAKEVALUE_32(x, S_LDT_DEVHDR_CLINESZ) argument
133 #define G_LDT_DEVHDR_CLINESZ(x) _SB_GETVALUE_32(x, S_LDT_DEVHDR_CLINESZ, M_LDT_DEVHDR_CLINESZ) argument
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Dsb1250_l2c.h47 #define V_L2C_TAG_INDEX(x) _SB_MAKEVALUE(x, S_L2C_TAG_INDEX) argument
48 #define G_L2C_TAG_INDEX(x) _SB_GETVALUE(x, S_L2C_TAG_INDEX, M_L2C_TAG_INDEX) argument
52 #define V_L2C_TAG_TAG(x) _SB_MAKEVALUE(x, S_L2C_TAG_TAG) argument
53 #define G_L2C_TAG_TAG(x) _SB_GETVALUE(x, S_L2C_TAG_TAG, M_L2C_TAG_TAG) argument
57 #define V_L2C_TAG_ECC(x) _SB_MAKEVALUE(x, S_L2C_TAG_ECC) argument
58 #define G_L2C_TAG_ECC(x) _SB_GETVALUE(x, S_L2C_TAG_ECC, M_L2C_TAG_ECC) argument
62 #define V_L2C_TAG_WAY(x) _SB_MAKEVALUE(x, S_L2C_TAG_WAY) argument
63 #define G_L2C_TAG_WAY(x) _SB_GETVALUE(x, S_L2C_TAG_WAY, M_L2C_TAG_WAY) argument
74 #define V_L2C_MGMT_INDEX(x) _SB_MAKEVALUE(x, S_L2C_MGMT_INDEX) argument
75 #define G_L2C_MGMT_INDEX(x) _SB_GETVALUE(x, S_L2C_MGMT_INDEX, M_L2C_MGMT_INDEX) argument
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Dsb1250_scd.h49 #define V_SYS_REVISION(x) _SB_MAKEVALUE(x, S_SYS_REVISION) argument
50 #define G_SYS_REVISION(x) _SB_GETVALUE(x, S_SYS_REVISION, M_SYS_REVISION) argument
98 #define V_SYS_L2C_SIZE(x) _SB_MAKEVALUE(x, S_SYS_L2C_SIZE) argument
99 #define G_SYS_L2C_SIZE(x) _SB_GETVALUE(x, S_SYS_L2C_SIZE, M_SYS_L2C_SIZE) argument
114 #define V_SYS_NUM_CPUS(x) _SB_MAKEVALUE(x, S_SYS_NUM_CPUS) argument
115 #define G_SYS_NUM_CPUS(x) _SB_GETVALUE(x, S_SYS_NUM_CPUS, M_SYS_NUM_CPUS) argument
121 #define V_SYS_PART(x) _SB_MAKEVALUE(x, S_SYS_PART) argument
122 #define G_SYS_PART(x) _SB_GETVALUE(x, S_SYS_PART, M_SYS_PART) argument
135 #define V_SYS_SOC_TYPE(x) _SB_MAKEVALUE(x, S_SYS_SOC_TYPE) argument
136 #define G_SYS_SOC_TYPE(x) _SB_GETVALUE(x, S_SYS_SOC_TYPE, M_SYS_SOC_TYPE) argument
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/arch/powerpc/boot/
Dof.h30 #define cpu_to_be16(x) swab16(x) argument
31 #define be16_to_cpu(x) swab16(x) argument
32 #define cpu_to_be32(x) swab32(x) argument
33 #define be32_to_cpu(x) swab32(x) argument
34 #define cpu_to_be64(x) swab64(x) argument
35 #define be64_to_cpu(x) swab64(x) argument
37 #define cpu_to_be16(x) (x) argument
38 #define be16_to_cpu(x) (x) argument
39 #define cpu_to_be32(x) (x) argument
40 #define be32_to_cpu(x) (x) argument
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/arch/mips/include/asm/
Dinst.h20 #define MIPSInst(x) x argument
23 #define MIPSInst_OPCODE(x) (MIPSInst(x) >> I_OPCODE_SFT) argument
26 #define MIPSInst_JTARGET(x) (MIPSInst(x) & 0x03ffffff) argument
29 #define MIPSInst_RS(x) ((MIPSInst(x) & 0x03e00000) >> I_RS_SFT) argument
32 #define MIPSInst_RT(x) ((MIPSInst(x) & 0x001f0000) >> I_RT_SFT) argument
35 #define MIPSInst_SIMM(x) ((int)((short)(MIPSInst(x) & 0xffff))) argument
36 #define MIPSInst_UIMM(x) (MIPSInst(x) & 0xffff) argument
39 #define MIPSInst_CACHEOP(x) ((MIPSInst(x) & 0x001c0000) >> I_CACHEOP_SFT) argument
42 #define MIPSInst_CACHESEL(x) ((MIPSInst(x) & 0x00030000) >> I_CACHESEL_SFT) argument
45 #define MIPSInst_RD(x) ((MIPSInst(x) & 0x0000f800) >> I_RD_SFT) argument
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/arch/tile/lib/
Dstring-endian.h24 #define MASK(x) (__insn_shl(1ULL, (x << 3)) - 1) argument
25 #define NULMASK(x) ((2ULL << x) - 1) argument
26 #define CFZ(x) __insn_ctz(x) argument
27 #define REVCZ(x) __insn_clz(x) argument
29 #define MASK(x) (__insn_shl(-2LL, ((-x << 3) - 1))) argument
30 #define NULMASK(x) (-2LL << (63 - x)) argument
31 #define CFZ(x) __insn_clz(x) argument
32 #define REVCZ(x) __insn_ctz(x) argument
/arch/mips/include/asm/mach-generic/
Dmangle-port.h30 # define ioswabb(a, x) (x) argument
31 # define __mem_ioswabb(a, x) (x) argument
32 # define ioswabw(a, x) le16_to_cpu(x) argument
33 # define __mem_ioswabw(a, x) (x) argument
34 # define ioswabl(a, x) le32_to_cpu(x) argument
35 # define __mem_ioswabl(a, x) (x) argument
36 # define ioswabq(a, x) le64_to_cpu(x) argument
37 # define __mem_ioswabq(a, x) (x) argument
41 # define ioswabb(a, x) (x) argument
42 # define __mem_ioswabb(a, x) (x) argument
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/arch/sparc/include/asm/
Dpage_32.h63 #define pte_val(x) ((x).pte) argument
64 #define iopte_val(x) ((x).iopte) argument
65 #define pmd_val(x) ((x).pmdv[0]) argument
66 #define pgd_val(x) ((x).pgd) argument
67 #define ctxd_val(x) ((x).ctxd) argument
68 #define pgprot_val(x) ((x).pgprot) argument
69 #define iopgprot_val(x) ((x).iopgprot) argument
71 #define __pte(x) ((pte_t) { (x) } ) argument
72 #define __pmd(x) ((pmd_t) { { (x) }, }) argument
73 #define __iopte(x) ((iopte_t) { (x) } ) argument
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Dpage_64.h70 #define pte_val(x) ((x).pte) argument
71 #define iopte_val(x) ((x).iopte) argument
72 #define pmd_val(x) ((x).pmd) argument
73 #define pud_val(x) ((x).pud) argument
74 #define pgd_val(x) ((x).pgd) argument
75 #define pgprot_val(x) ((x).pgprot) argument
77 #define __pte(x) ((pte_t) { (x) } ) argument
78 #define __iopte(x) ((iopte_t) { (x) } ) argument
79 #define __pmd(x) ((pmd_t) { (x) } ) argument
80 #define __pud(x) ((pud_t) { (x) } ) argument
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/arch/arm/mach-s3c24xx/include/mach/
Dregs-lcd.h15 #define S3C2410_LCDREG(x) (x) argument
24 #define S3C2410_LCDCON1_CLKVAL(x) ((x) << 8) argument
48 #define S3C2410_LCDCON2_VBPD(x) ((x) << 24) argument
49 #define S3C2410_LCDCON2_LINEVAL(x) ((x) << 14) argument
50 #define S3C2410_LCDCON2_VFPD(x) ((x) << 6) argument
51 #define S3C2410_LCDCON2_VSPW(x) ((x) << 0) argument
53 #define S3C2410_LCDCON2_GET_VBPD(x) ( ((x) >> 24) & 0xFF) argument
54 #define S3C2410_LCDCON2_GET_VFPD(x) ( ((x) >> 6) & 0xFF) argument
55 #define S3C2410_LCDCON2_GET_VSPW(x) ( ((x) >> 0) & 0x3F) argument
57 #define S3C2410_LCDCON3_HBPD(x) ((x) << 19) argument
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/arch/arm/mach-imx/
Diomux-v1.h26 #define MXC_DDIR(x) (0x00 + ((x) << 8)) argument
27 #define MXC_OCR1(x) (0x04 + ((x) << 8)) argument
28 #define MXC_OCR2(x) (0x08 + ((x) << 8)) argument
29 #define MXC_ICONFA1(x) (0x0c + ((x) << 8)) argument
30 #define MXC_ICONFA2(x) (0x10 + ((x) << 8)) argument
31 #define MXC_ICONFB1(x) (0x14 + ((x) << 8)) argument
32 #define MXC_ICONFB2(x) (0x18 + ((x) << 8)) argument
33 #define MXC_DR(x) (0x1c + ((x) << 8)) argument
34 #define MXC_GIUS(x) (0x20 + ((x) << 8)) argument
35 #define MXC_SSR(x) (0x24 + ((x) << 8)) argument
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/arch/powerpc/include/asm/
Dpgtable-be-types.h9 #define __pte(x) ((pte_t) { cpu_to_be64(x) }) argument
10 #define __pte_raw(x) ((pte_t) { (x) }) argument
11 static inline unsigned long pte_val(pte_t x) in pte_val()
16 static inline __be64 pte_raw(pte_t x) in pte_raw()
24 #define __pmd(x) ((pmd_t) { cpu_to_be64(x) }) argument
25 #define __pmd_raw(x) ((pmd_t) { (x) }) argument
26 static inline unsigned long pmd_val(pmd_t x) in pmd_val()
31 static inline __be64 pmd_raw(pmd_t x) in pmd_raw()
42 #define __pud(x) ((pud_t) { cpu_to_be64(x) }) argument
43 #define __pud_raw(x) ((pud_t) { (x) }) argument
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/arch/mips/include/asm/sn/
Dmapped_kernel.h32 #define MAPPED_ADDR_RO_TO_PHYS(x) (x - REP_BASE) argument
33 #define MAPPED_ADDR_RW_TO_PHYS(x) (x - REP_BASE - 16777216) argument
38 #define MAPPED_KERN_RO_TO_PHYS(x) \ argument
41 #define MAPPED_KERN_RW_TO_PHYS(x) \ argument
47 #define MAPPED_KERN_RO_TO_PHYS(x) (x - REP_BASE) argument
48 #define MAPPED_KERN_RW_TO_PHYS(x) (x - REP_BASE) argument
52 #define MAPPED_KERN_RO_TO_K0(x) PHYS_TO_K0(MAPPED_KERN_RO_TO_PHYS(x)) argument
53 #define MAPPED_KERN_RW_TO_K0(x) PHYS_TO_K0(MAPPED_KERN_RW_TO_PHYS(x)) argument
/arch/arm/mach-pxa/
Dcm-x2xx-pci.h7 #define cmx2xx_pci_init_irq(x) __cmx2xx_pci_init_irq(x) argument
8 #define cmx2xx_pci_suspend(x) __cmx2xx_pci_suspend(x) argument
9 #define cmx2xx_pci_resume(x) __cmx2xx_pci_resume(x) argument
11 #define cmx2xx_pci_init_irq(x) do {} while (0) argument
12 #define cmx2xx_pci_suspend(x) do {} while (0) argument
13 #define cmx2xx_pci_resume(x) do {} while (0) argument
/arch/ia64/include/asm/sn/
Daddrs.h112 #define NODE_OFFSET(x) ((x) & (NODE_ADDRSPACE_SIZE - 1)) argument
114 #define NASID_GET(x) (int) (((u64) (x) >> NASID_SHIFT) & NASID_BITMASK) argument
119 #define CHANGE_NASID(n,x) ((void *)(((u64)(x) & ~NASID_MASK) | NASID_SPACE(n))) argument
137 #define TO_PHYS(x) (TO_PHYS_MASK & (x)) argument
138 #define TO_CAC(x) (CAC_BASE | TO_PHYS(x)) argument
140 #define TO_AMO(x) (AMO_BASE | TO_PHYS(x)) argument
141 #define TO_GET(x) (GET_BASE | TO_PHYS(x)) argument
143 #define TO_AMO(x) ({ BUG(); x; }) argument
144 #define TO_GET(x) ({ BUG(); x; }) argument
155 #define SH1_TIO_PHYS_TO_DMA(x) \ argument
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/arch/arm/boot/compressed/
Ddecompress.c20 # define Trace(x) fprintf x argument
21 # define Tracev(x) {if (verbose) fprintf x ;} argument
22 # define Tracevv(x) {if (verbose>1) fprintf x ;} argument
23 # define Tracec(c,x) {if (verbose && (c)) fprintf x ;} argument
24 # define Tracecv(c,x) {if (verbose>1 && (c)) fprintf x ;} argument
27 # define Trace(x) argument
28 # define Tracev(x) argument
29 # define Tracevv(x) argument
30 # define Tracec(c,x) argument
31 # define Tracecv(c,x) argument
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