1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Core of Xen paravirt_ops implementation.
4 *
5 * This file contains the xen_paravirt_ops structure itself, and the
6 * implementations for:
7 * - privileged instructions
8 * - interrupt flags
9 * - segment operations
10 * - booting and setup
11 *
12 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
13 */
14
15 #include <linux/cpu.h>
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/smp.h>
19 #include <linux/preempt.h>
20 #include <linux/hardirq.h>
21 #include <linux/percpu.h>
22 #include <linux/delay.h>
23 #include <linux/start_kernel.h>
24 #include <linux/sched.h>
25 #include <linux/kprobes.h>
26 #include <linux/bootmem.h>
27 #include <linux/export.h>
28 #include <linux/mm.h>
29 #include <linux/page-flags.h>
30 #include <linux/highmem.h>
31 #include <linux/console.h>
32 #include <linux/pci.h>
33 #include <linux/gfp.h>
34 #include <linux/memblock.h>
35 #include <linux/edd.h>
36 #include <linux/frame.h>
37
38 #include <xen/xen.h>
39 #include <xen/events.h>
40 #include <xen/interface/xen.h>
41 #include <xen/interface/version.h>
42 #include <xen/interface/physdev.h>
43 #include <xen/interface/vcpu.h>
44 #include <xen/interface/memory.h>
45 #include <xen/interface/nmi.h>
46 #include <xen/interface/xen-mca.h>
47 #include <xen/features.h>
48 #include <xen/page.h>
49 #include <xen/hvc-console.h>
50 #include <xen/acpi.h>
51
52 #include <asm/paravirt.h>
53 #include <asm/apic.h>
54 #include <asm/page.h>
55 #include <asm/xen/pci.h>
56 #include <asm/xen/hypercall.h>
57 #include <asm/xen/hypervisor.h>
58 #include <asm/xen/cpuid.h>
59 #include <asm/fixmap.h>
60 #include <asm/processor.h>
61 #include <asm/proto.h>
62 #include <asm/msr-index.h>
63 #include <asm/traps.h>
64 #include <asm/setup.h>
65 #include <asm/desc.h>
66 #include <asm/pgalloc.h>
67 #include <asm/pgtable.h>
68 #include <asm/tlbflush.h>
69 #include <asm/reboot.h>
70 #include <asm/stackprotector.h>
71 #include <asm/hypervisor.h>
72 #include <asm/mach_traps.h>
73 #include <asm/mwait.h>
74 #include <asm/pci_x86.h>
75 #include <asm/cpu.h>
76
77 #ifdef CONFIG_ACPI
78 #include <linux/acpi.h>
79 #include <asm/acpi.h>
80 #include <acpi/pdc_intel.h>
81 #include <acpi/processor.h>
82 #include <xen/interface/platform.h>
83 #endif
84
85 #include "xen-ops.h"
86 #include "mmu.h"
87 #include "smp.h"
88 #include "multicalls.h"
89 #include "pmu.h"
90
91 #include "../kernel/cpu/cpu.h" /* get_cpu_cap() */
92
93 void *xen_initial_gdt;
94
95 static int xen_cpu_up_prepare_pv(unsigned int cpu);
96 static int xen_cpu_dead_pv(unsigned int cpu);
97
98 struct tls_descs {
99 struct desc_struct desc[3];
100 };
101
102 /*
103 * Updating the 3 TLS descriptors in the GDT on every task switch is
104 * surprisingly expensive so we avoid updating them if they haven't
105 * changed. Since Xen writes different descriptors than the one
106 * passed in the update_descriptor hypercall we keep shadow copies to
107 * compare against.
108 */
109 static DEFINE_PER_CPU(struct tls_descs, shadow_tls_desc);
110
xen_banner(void)111 static void __init xen_banner(void)
112 {
113 unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL);
114 struct xen_extraversion extra;
115 HYPERVISOR_xen_version(XENVER_extraversion, &extra);
116
117 pr_info("Booting paravirtualized kernel on %s\n", pv_info.name);
118 printk(KERN_INFO "Xen version: %d.%d%s%s\n",
119 version >> 16, version & 0xffff, extra.extraversion,
120 xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : "");
121 }
122 /* Check if running on Xen version (major, minor) or later */
123 bool
xen_running_on_version_or_later(unsigned int major,unsigned int minor)124 xen_running_on_version_or_later(unsigned int major, unsigned int minor)
125 {
126 unsigned int version;
127
128 if (!xen_domain())
129 return false;
130
131 version = HYPERVISOR_xen_version(XENVER_version, NULL);
132 if ((((version >> 16) == major) && ((version & 0xffff) >= minor)) ||
133 ((version >> 16) > major))
134 return true;
135 return false;
136 }
137
138 static __read_mostly unsigned int cpuid_leaf5_ecx_val;
139 static __read_mostly unsigned int cpuid_leaf5_edx_val;
140
xen_cpuid(unsigned int * ax,unsigned int * bx,unsigned int * cx,unsigned int * dx)141 static void xen_cpuid(unsigned int *ax, unsigned int *bx,
142 unsigned int *cx, unsigned int *dx)
143 {
144 unsigned maskebx = ~0;
145
146 /*
147 * Mask out inconvenient features, to try and disable as many
148 * unsupported kernel subsystems as possible.
149 */
150 switch (*ax) {
151 case CPUID_MWAIT_LEAF:
152 /* Synthesize the values.. */
153 *ax = 0;
154 *bx = 0;
155 *cx = cpuid_leaf5_ecx_val;
156 *dx = cpuid_leaf5_edx_val;
157 return;
158
159 case 0xb:
160 /* Suppress extended topology stuff */
161 maskebx = 0;
162 break;
163 }
164
165 asm(XEN_EMULATE_PREFIX "cpuid"
166 : "=a" (*ax),
167 "=b" (*bx),
168 "=c" (*cx),
169 "=d" (*dx)
170 : "0" (*ax), "2" (*cx));
171
172 *bx &= maskebx;
173 }
174 STACK_FRAME_NON_STANDARD(xen_cpuid); /* XEN_EMULATE_PREFIX */
175
xen_check_mwait(void)176 static bool __init xen_check_mwait(void)
177 {
178 #ifdef CONFIG_ACPI
179 struct xen_platform_op op = {
180 .cmd = XENPF_set_processor_pminfo,
181 .u.set_pminfo.id = -1,
182 .u.set_pminfo.type = XEN_PM_PDC,
183 };
184 uint32_t buf[3];
185 unsigned int ax, bx, cx, dx;
186 unsigned int mwait_mask;
187
188 /* We need to determine whether it is OK to expose the MWAIT
189 * capability to the kernel to harvest deeper than C3 states from ACPI
190 * _CST using the processor_harvest_xen.c module. For this to work, we
191 * need to gather the MWAIT_LEAF values (which the cstate.c code
192 * checks against). The hypervisor won't expose the MWAIT flag because
193 * it would break backwards compatibility; so we will find out directly
194 * from the hardware and hypercall.
195 */
196 if (!xen_initial_domain())
197 return false;
198
199 /*
200 * When running under platform earlier than Xen4.2, do not expose
201 * mwait, to avoid the risk of loading native acpi pad driver
202 */
203 if (!xen_running_on_version_or_later(4, 2))
204 return false;
205
206 ax = 1;
207 cx = 0;
208
209 native_cpuid(&ax, &bx, &cx, &dx);
210
211 mwait_mask = (1 << (X86_FEATURE_EST % 32)) |
212 (1 << (X86_FEATURE_MWAIT % 32));
213
214 if ((cx & mwait_mask) != mwait_mask)
215 return false;
216
217 /* We need to emulate the MWAIT_LEAF and for that we need both
218 * ecx and edx. The hypercall provides only partial information.
219 */
220
221 ax = CPUID_MWAIT_LEAF;
222 bx = 0;
223 cx = 0;
224 dx = 0;
225
226 native_cpuid(&ax, &bx, &cx, &dx);
227
228 /* Ask the Hypervisor whether to clear ACPI_PDC_C_C2C3_FFH. If so,
229 * don't expose MWAIT_LEAF and let ACPI pick the IOPORT version of C3.
230 */
231 buf[0] = ACPI_PDC_REVISION_ID;
232 buf[1] = 1;
233 buf[2] = (ACPI_PDC_C_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_SWSMP);
234
235 set_xen_guest_handle(op.u.set_pminfo.pdc, buf);
236
237 if ((HYPERVISOR_platform_op(&op) == 0) &&
238 (buf[2] & (ACPI_PDC_C_C1_FFH | ACPI_PDC_C_C2C3_FFH))) {
239 cpuid_leaf5_ecx_val = cx;
240 cpuid_leaf5_edx_val = dx;
241 }
242 return true;
243 #else
244 return false;
245 #endif
246 }
247
xen_check_xsave(void)248 static bool __init xen_check_xsave(void)
249 {
250 unsigned int cx, xsave_mask;
251
252 cx = cpuid_ecx(1);
253
254 xsave_mask = (1 << (X86_FEATURE_XSAVE % 32)) |
255 (1 << (X86_FEATURE_OSXSAVE % 32));
256
257 /* Xen will set CR4.OSXSAVE if supported and not disabled by force */
258 return (cx & xsave_mask) == xsave_mask;
259 }
260
xen_init_capabilities(void)261 static void __init xen_init_capabilities(void)
262 {
263 setup_force_cpu_cap(X86_FEATURE_XENPV);
264 setup_clear_cpu_cap(X86_FEATURE_DCA);
265 setup_clear_cpu_cap(X86_FEATURE_APERFMPERF);
266 setup_clear_cpu_cap(X86_FEATURE_MTRR);
267 setup_clear_cpu_cap(X86_FEATURE_ACC);
268 setup_clear_cpu_cap(X86_FEATURE_X2APIC);
269 setup_clear_cpu_cap(X86_FEATURE_SME);
270
271 /*
272 * Xen PV would need some work to support PCID: CR3 handling as well
273 * as xen_flush_tlb_others() would need updating.
274 */
275 setup_clear_cpu_cap(X86_FEATURE_PCID);
276
277 if (!xen_initial_domain())
278 setup_clear_cpu_cap(X86_FEATURE_ACPI);
279
280 if (xen_check_mwait())
281 setup_force_cpu_cap(X86_FEATURE_MWAIT);
282 else
283 setup_clear_cpu_cap(X86_FEATURE_MWAIT);
284
285 if (!xen_check_xsave()) {
286 setup_clear_cpu_cap(X86_FEATURE_XSAVE);
287 setup_clear_cpu_cap(X86_FEATURE_OSXSAVE);
288 }
289 }
290
xen_set_debugreg(int reg,unsigned long val)291 static void xen_set_debugreg(int reg, unsigned long val)
292 {
293 HYPERVISOR_set_debugreg(reg, val);
294 }
295
xen_get_debugreg(int reg)296 static unsigned long xen_get_debugreg(int reg)
297 {
298 return HYPERVISOR_get_debugreg(reg);
299 }
300
xen_end_context_switch(struct task_struct * next)301 static void xen_end_context_switch(struct task_struct *next)
302 {
303 xen_mc_flush();
304 paravirt_end_context_switch(next);
305 }
306
xen_store_tr(void)307 static unsigned long xen_store_tr(void)
308 {
309 return 0;
310 }
311
312 /*
313 * Set the page permissions for a particular virtual address. If the
314 * address is a vmalloc mapping (or other non-linear mapping), then
315 * find the linear mapping of the page and also set its protections to
316 * match.
317 */
set_aliased_prot(void * v,pgprot_t prot)318 static void set_aliased_prot(void *v, pgprot_t prot)
319 {
320 int level;
321 pte_t *ptep;
322 pte_t pte;
323 unsigned long pfn;
324 struct page *page;
325 unsigned char dummy;
326
327 ptep = lookup_address((unsigned long)v, &level);
328 BUG_ON(ptep == NULL);
329
330 pfn = pte_pfn(*ptep);
331 page = pfn_to_page(pfn);
332
333 pte = pfn_pte(pfn, prot);
334
335 /*
336 * Careful: update_va_mapping() will fail if the virtual address
337 * we're poking isn't populated in the page tables. We don't
338 * need to worry about the direct map (that's always in the page
339 * tables), but we need to be careful about vmap space. In
340 * particular, the top level page table can lazily propagate
341 * entries between processes, so if we've switched mms since we
342 * vmapped the target in the first place, we might not have the
343 * top-level page table entry populated.
344 *
345 * We disable preemption because we want the same mm active when
346 * we probe the target and when we issue the hypercall. We'll
347 * have the same nominal mm, but if we're a kernel thread, lazy
348 * mm dropping could change our pgd.
349 *
350 * Out of an abundance of caution, this uses __get_user() to fault
351 * in the target address just in case there's some obscure case
352 * in which the target address isn't readable.
353 */
354
355 preempt_disable();
356
357 probe_kernel_read(&dummy, v, 1);
358
359 if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0))
360 BUG();
361
362 if (!PageHighMem(page)) {
363 void *av = __va(PFN_PHYS(pfn));
364
365 if (av != v)
366 if (HYPERVISOR_update_va_mapping((unsigned long)av, pte, 0))
367 BUG();
368 } else
369 kmap_flush_unused();
370
371 preempt_enable();
372 }
373
xen_alloc_ldt(struct desc_struct * ldt,unsigned entries)374 static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries)
375 {
376 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
377 int i;
378
379 /*
380 * We need to mark the all aliases of the LDT pages RO. We
381 * don't need to call vm_flush_aliases(), though, since that's
382 * only responsible for flushing aliases out the TLBs, not the
383 * page tables, and Xen will flush the TLB for us if needed.
384 *
385 * To avoid confusing future readers: none of this is necessary
386 * to load the LDT. The hypervisor only checks this when the
387 * LDT is faulted in due to subsequent descriptor access.
388 */
389
390 for (i = 0; i < entries; i += entries_per_page)
391 set_aliased_prot(ldt + i, PAGE_KERNEL_RO);
392 }
393
xen_free_ldt(struct desc_struct * ldt,unsigned entries)394 static void xen_free_ldt(struct desc_struct *ldt, unsigned entries)
395 {
396 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
397 int i;
398
399 for (i = 0; i < entries; i += entries_per_page)
400 set_aliased_prot(ldt + i, PAGE_KERNEL);
401 }
402
xen_set_ldt(const void * addr,unsigned entries)403 static void xen_set_ldt(const void *addr, unsigned entries)
404 {
405 struct mmuext_op *op;
406 struct multicall_space mcs = xen_mc_entry(sizeof(*op));
407
408 trace_xen_cpu_set_ldt(addr, entries);
409
410 op = mcs.args;
411 op->cmd = MMUEXT_SET_LDT;
412 op->arg1.linear_addr = (unsigned long)addr;
413 op->arg2.nr_ents = entries;
414
415 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
416
417 xen_mc_issue(PARAVIRT_LAZY_CPU);
418 }
419
xen_load_gdt(const struct desc_ptr * dtr)420 static void xen_load_gdt(const struct desc_ptr *dtr)
421 {
422 unsigned long va = dtr->address;
423 unsigned int size = dtr->size + 1;
424 unsigned pages = DIV_ROUND_UP(size, PAGE_SIZE);
425 unsigned long frames[pages];
426 int f;
427
428 /*
429 * A GDT can be up to 64k in size, which corresponds to 8192
430 * 8-byte entries, or 16 4k pages..
431 */
432
433 BUG_ON(size > 65536);
434 BUG_ON(va & ~PAGE_MASK);
435
436 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) {
437 int level;
438 pte_t *ptep;
439 unsigned long pfn, mfn;
440 void *virt;
441
442 /*
443 * The GDT is per-cpu and is in the percpu data area.
444 * That can be virtually mapped, so we need to do a
445 * page-walk to get the underlying MFN for the
446 * hypercall. The page can also be in the kernel's
447 * linear range, so we need to RO that mapping too.
448 */
449 ptep = lookup_address(va, &level);
450 BUG_ON(ptep == NULL);
451
452 pfn = pte_pfn(*ptep);
453 mfn = pfn_to_mfn(pfn);
454 virt = __va(PFN_PHYS(pfn));
455
456 frames[f] = mfn;
457
458 make_lowmem_page_readonly((void *)va);
459 make_lowmem_page_readonly(virt);
460 }
461
462 if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct)))
463 BUG();
464 }
465
466 /*
467 * load_gdt for early boot, when the gdt is only mapped once
468 */
xen_load_gdt_boot(const struct desc_ptr * dtr)469 static void __init xen_load_gdt_boot(const struct desc_ptr *dtr)
470 {
471 unsigned long va = dtr->address;
472 unsigned int size = dtr->size + 1;
473 unsigned pages = DIV_ROUND_UP(size, PAGE_SIZE);
474 unsigned long frames[pages];
475 int f;
476
477 /*
478 * A GDT can be up to 64k in size, which corresponds to 8192
479 * 8-byte entries, or 16 4k pages..
480 */
481
482 BUG_ON(size > 65536);
483 BUG_ON(va & ~PAGE_MASK);
484
485 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) {
486 pte_t pte;
487 unsigned long pfn, mfn;
488
489 pfn = virt_to_pfn(va);
490 mfn = pfn_to_mfn(pfn);
491
492 pte = pfn_pte(pfn, PAGE_KERNEL_RO);
493
494 if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0))
495 BUG();
496
497 frames[f] = mfn;
498 }
499
500 if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct)))
501 BUG();
502 }
503
desc_equal(const struct desc_struct * d1,const struct desc_struct * d2)504 static inline bool desc_equal(const struct desc_struct *d1,
505 const struct desc_struct *d2)
506 {
507 return !memcmp(d1, d2, sizeof(*d1));
508 }
509
load_TLS_descriptor(struct thread_struct * t,unsigned int cpu,unsigned int i)510 static void load_TLS_descriptor(struct thread_struct *t,
511 unsigned int cpu, unsigned int i)
512 {
513 struct desc_struct *shadow = &per_cpu(shadow_tls_desc, cpu).desc[i];
514 struct desc_struct *gdt;
515 xmaddr_t maddr;
516 struct multicall_space mc;
517
518 if (desc_equal(shadow, &t->tls_array[i]))
519 return;
520
521 *shadow = t->tls_array[i];
522
523 gdt = get_cpu_gdt_rw(cpu);
524 maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]);
525 mc = __xen_mc_entry(0);
526
527 MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]);
528 }
529
xen_load_tls(struct thread_struct * t,unsigned int cpu)530 static void xen_load_tls(struct thread_struct *t, unsigned int cpu)
531 {
532 /*
533 * XXX sleazy hack: If we're being called in a lazy-cpu zone
534 * and lazy gs handling is enabled, it means we're in a
535 * context switch, and %gs has just been saved. This means we
536 * can zero it out to prevent faults on exit from the
537 * hypervisor if the next process has no %gs. Either way, it
538 * has been saved, and the new value will get loaded properly.
539 * This will go away as soon as Xen has been modified to not
540 * save/restore %gs for normal hypercalls.
541 *
542 * On x86_64, this hack is not used for %gs, because gs points
543 * to KERNEL_GS_BASE (and uses it for PDA references), so we
544 * must not zero %gs on x86_64
545 *
546 * For x86_64, we need to zero %fs, otherwise we may get an
547 * exception between the new %fs descriptor being loaded and
548 * %fs being effectively cleared at __switch_to().
549 */
550 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) {
551 #ifdef CONFIG_X86_32
552 lazy_load_gs(0);
553 #else
554 loadsegment(fs, 0);
555 #endif
556 }
557
558 xen_mc_batch();
559
560 load_TLS_descriptor(t, cpu, 0);
561 load_TLS_descriptor(t, cpu, 1);
562 load_TLS_descriptor(t, cpu, 2);
563
564 xen_mc_issue(PARAVIRT_LAZY_CPU);
565 }
566
567 #ifdef CONFIG_X86_64
xen_load_gs_index(unsigned int idx)568 static void xen_load_gs_index(unsigned int idx)
569 {
570 if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx))
571 BUG();
572 }
573 #endif
574
xen_write_ldt_entry(struct desc_struct * dt,int entrynum,const void * ptr)575 static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum,
576 const void *ptr)
577 {
578 xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]);
579 u64 entry = *(u64 *)ptr;
580
581 trace_xen_cpu_write_ldt_entry(dt, entrynum, entry);
582
583 preempt_disable();
584
585 xen_mc_flush();
586 if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry))
587 BUG();
588
589 preempt_enable();
590 }
591
592 #ifdef CONFIG_X86_64
593 struct trap_array_entry {
594 void (*orig)(void);
595 void (*xen)(void);
596 bool ist_okay;
597 };
598
599 static struct trap_array_entry trap_array[] = {
600 { debug, xen_xendebug, true },
601 { double_fault, xen_double_fault, true },
602 #ifdef CONFIG_X86_MCE
603 { machine_check, xen_machine_check, true },
604 #endif
605 { nmi, xen_xennmi, true },
606 { int3, xen_int3, false },
607 { overflow, xen_overflow, false },
608 #ifdef CONFIG_IA32_EMULATION
609 { entry_INT80_compat, xen_entry_INT80_compat, false },
610 #endif
611 { page_fault, xen_page_fault, false },
612 { divide_error, xen_divide_error, false },
613 { bounds, xen_bounds, false },
614 { invalid_op, xen_invalid_op, false },
615 { device_not_available, xen_device_not_available, false },
616 { coprocessor_segment_overrun, xen_coprocessor_segment_overrun, false },
617 { invalid_TSS, xen_invalid_TSS, false },
618 { segment_not_present, xen_segment_not_present, false },
619 { stack_segment, xen_stack_segment, false },
620 { general_protection, xen_general_protection, false },
621 { spurious_interrupt_bug, xen_spurious_interrupt_bug, false },
622 { coprocessor_error, xen_coprocessor_error, false },
623 { alignment_check, xen_alignment_check, false },
624 { simd_coprocessor_error, xen_simd_coprocessor_error, false },
625 };
626
get_trap_addr(void ** addr,unsigned int ist)627 static bool __ref get_trap_addr(void **addr, unsigned int ist)
628 {
629 unsigned int nr;
630 bool ist_okay = false;
631
632 /*
633 * Replace trap handler addresses by Xen specific ones.
634 * Check for known traps using IST and whitelist them.
635 * The debugger ones are the only ones we care about.
636 * Xen will handle faults like double_fault, * so we should never see
637 * them. Warn if there's an unexpected IST-using fault handler.
638 */
639 for (nr = 0; nr < ARRAY_SIZE(trap_array); nr++) {
640 struct trap_array_entry *entry = trap_array + nr;
641
642 if (*addr == entry->orig) {
643 *addr = entry->xen;
644 ist_okay = entry->ist_okay;
645 break;
646 }
647 }
648
649 if (nr == ARRAY_SIZE(trap_array) &&
650 *addr >= (void *)early_idt_handler_array[0] &&
651 *addr < (void *)early_idt_handler_array[NUM_EXCEPTION_VECTORS]) {
652 nr = (*addr - (void *)early_idt_handler_array[0]) /
653 EARLY_IDT_HANDLER_SIZE;
654 *addr = (void *)xen_early_idt_handler_array[nr];
655 }
656
657 if (WARN_ON(ist != 0 && !ist_okay))
658 return false;
659
660 return true;
661 }
662 #endif
663
cvt_gate_to_trap(int vector,const gate_desc * val,struct trap_info * info)664 static int cvt_gate_to_trap(int vector, const gate_desc *val,
665 struct trap_info *info)
666 {
667 unsigned long addr;
668
669 if (val->bits.type != GATE_TRAP && val->bits.type != GATE_INTERRUPT)
670 return 0;
671
672 info->vector = vector;
673
674 addr = gate_offset(val);
675 #ifdef CONFIG_X86_64
676 if (!get_trap_addr((void **)&addr, val->bits.ist))
677 return 0;
678 #endif /* CONFIG_X86_64 */
679 info->address = addr;
680
681 info->cs = gate_segment(val);
682 info->flags = val->bits.dpl;
683 /* interrupt gates clear IF */
684 if (val->bits.type == GATE_INTERRUPT)
685 info->flags |= 1 << 2;
686
687 return 1;
688 }
689
690 /* Locations of each CPU's IDT */
691 static DEFINE_PER_CPU(struct desc_ptr, idt_desc);
692
693 /* Set an IDT entry. If the entry is part of the current IDT, then
694 also update Xen. */
xen_write_idt_entry(gate_desc * dt,int entrynum,const gate_desc * g)695 static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g)
696 {
697 unsigned long p = (unsigned long)&dt[entrynum];
698 unsigned long start, end;
699
700 trace_xen_cpu_write_idt_entry(dt, entrynum, g);
701
702 preempt_disable();
703
704 start = __this_cpu_read(idt_desc.address);
705 end = start + __this_cpu_read(idt_desc.size) + 1;
706
707 xen_mc_flush();
708
709 native_write_idt_entry(dt, entrynum, g);
710
711 if (p >= start && (p + 8) <= end) {
712 struct trap_info info[2];
713
714 info[1].address = 0;
715
716 if (cvt_gate_to_trap(entrynum, g, &info[0]))
717 if (HYPERVISOR_set_trap_table(info))
718 BUG();
719 }
720
721 preempt_enable();
722 }
723
xen_convert_trap_info(const struct desc_ptr * desc,struct trap_info * traps)724 static void xen_convert_trap_info(const struct desc_ptr *desc,
725 struct trap_info *traps)
726 {
727 unsigned in, out, count;
728
729 count = (desc->size+1) / sizeof(gate_desc);
730 BUG_ON(count > 256);
731
732 for (in = out = 0; in < count; in++) {
733 gate_desc *entry = (gate_desc *)(desc->address) + in;
734
735 if (cvt_gate_to_trap(in, entry, &traps[out]))
736 out++;
737 }
738 traps[out].address = 0;
739 }
740
xen_copy_trap_info(struct trap_info * traps)741 void xen_copy_trap_info(struct trap_info *traps)
742 {
743 const struct desc_ptr *desc = this_cpu_ptr(&idt_desc);
744
745 xen_convert_trap_info(desc, traps);
746 }
747
748 /* Load a new IDT into Xen. In principle this can be per-CPU, so we
749 hold a spinlock to protect the static traps[] array (static because
750 it avoids allocation, and saves stack space). */
xen_load_idt(const struct desc_ptr * desc)751 static void xen_load_idt(const struct desc_ptr *desc)
752 {
753 static DEFINE_SPINLOCK(lock);
754 static struct trap_info traps[257];
755
756 trace_xen_cpu_load_idt(desc);
757
758 spin_lock(&lock);
759
760 memcpy(this_cpu_ptr(&idt_desc), desc, sizeof(idt_desc));
761
762 xen_convert_trap_info(desc, traps);
763
764 xen_mc_flush();
765 if (HYPERVISOR_set_trap_table(traps))
766 BUG();
767
768 spin_unlock(&lock);
769 }
770
771 /* Write a GDT descriptor entry. Ignore LDT descriptors, since
772 they're handled differently. */
xen_write_gdt_entry(struct desc_struct * dt,int entry,const void * desc,int type)773 static void xen_write_gdt_entry(struct desc_struct *dt, int entry,
774 const void *desc, int type)
775 {
776 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type);
777
778 preempt_disable();
779
780 switch (type) {
781 case DESC_LDT:
782 case DESC_TSS:
783 /* ignore */
784 break;
785
786 default: {
787 xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]);
788
789 xen_mc_flush();
790 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
791 BUG();
792 }
793
794 }
795
796 preempt_enable();
797 }
798
799 /*
800 * Version of write_gdt_entry for use at early boot-time needed to
801 * update an entry as simply as possible.
802 */
xen_write_gdt_entry_boot(struct desc_struct * dt,int entry,const void * desc,int type)803 static void __init xen_write_gdt_entry_boot(struct desc_struct *dt, int entry,
804 const void *desc, int type)
805 {
806 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type);
807
808 switch (type) {
809 case DESC_LDT:
810 case DESC_TSS:
811 /* ignore */
812 break;
813
814 default: {
815 xmaddr_t maddr = virt_to_machine(&dt[entry]);
816
817 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
818 dt[entry] = *(struct desc_struct *)desc;
819 }
820
821 }
822 }
823
xen_load_sp0(unsigned long sp0)824 static void xen_load_sp0(unsigned long sp0)
825 {
826 struct multicall_space mcs;
827
828 mcs = xen_mc_entry(0);
829 MULTI_stack_switch(mcs.mc, __KERNEL_DS, sp0);
830 xen_mc_issue(PARAVIRT_LAZY_CPU);
831 this_cpu_write(cpu_tss_rw.x86_tss.sp0, sp0);
832 }
833
xen_set_iopl_mask(unsigned mask)834 void xen_set_iopl_mask(unsigned mask)
835 {
836 struct physdev_set_iopl set_iopl;
837
838 /* Force the change at ring 0. */
839 set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3;
840 HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
841 }
842
xen_io_delay(void)843 static void xen_io_delay(void)
844 {
845 }
846
847 static DEFINE_PER_CPU(unsigned long, xen_cr0_value);
848
xen_read_cr0(void)849 static unsigned long xen_read_cr0(void)
850 {
851 unsigned long cr0 = this_cpu_read(xen_cr0_value);
852
853 if (unlikely(cr0 == 0)) {
854 cr0 = native_read_cr0();
855 this_cpu_write(xen_cr0_value, cr0);
856 }
857
858 return cr0;
859 }
860
xen_write_cr0(unsigned long cr0)861 static void xen_write_cr0(unsigned long cr0)
862 {
863 struct multicall_space mcs;
864
865 this_cpu_write(xen_cr0_value, cr0);
866
867 /* Only pay attention to cr0.TS; everything else is
868 ignored. */
869 mcs = xen_mc_entry(0);
870
871 MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0);
872
873 xen_mc_issue(PARAVIRT_LAZY_CPU);
874 }
875
xen_write_cr4(unsigned long cr4)876 static void xen_write_cr4(unsigned long cr4)
877 {
878 cr4 &= ~(X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PCE);
879
880 native_write_cr4(cr4);
881 }
882 #ifdef CONFIG_X86_64
xen_read_cr8(void)883 static inline unsigned long xen_read_cr8(void)
884 {
885 return 0;
886 }
xen_write_cr8(unsigned long val)887 static inline void xen_write_cr8(unsigned long val)
888 {
889 BUG_ON(val);
890 }
891 #endif
892
xen_read_msr_safe(unsigned int msr,int * err)893 static u64 xen_read_msr_safe(unsigned int msr, int *err)
894 {
895 u64 val;
896
897 if (pmu_msr_read(msr, &val, err))
898 return val;
899
900 val = native_read_msr_safe(msr, err);
901 switch (msr) {
902 case MSR_IA32_APICBASE:
903 val &= ~X2APIC_ENABLE;
904 break;
905 }
906 return val;
907 }
908
xen_write_msr_safe(unsigned int msr,unsigned low,unsigned high)909 static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high)
910 {
911 int ret;
912 #ifdef CONFIG_X86_64
913 unsigned int which;
914 u64 base;
915 #endif
916
917 ret = 0;
918
919 switch (msr) {
920 #ifdef CONFIG_X86_64
921 case MSR_FS_BASE: which = SEGBASE_FS; goto set;
922 case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set;
923 case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set;
924
925 set:
926 base = ((u64)high << 32) | low;
927 if (HYPERVISOR_set_segment_base(which, base) != 0)
928 ret = -EIO;
929 break;
930 #endif
931
932 case MSR_STAR:
933 case MSR_CSTAR:
934 case MSR_LSTAR:
935 case MSR_SYSCALL_MASK:
936 case MSR_IA32_SYSENTER_CS:
937 case MSR_IA32_SYSENTER_ESP:
938 case MSR_IA32_SYSENTER_EIP:
939 /* Fast syscall setup is all done in hypercalls, so
940 these are all ignored. Stub them out here to stop
941 Xen console noise. */
942 break;
943
944 default:
945 if (!pmu_msr_write(msr, low, high, &ret))
946 ret = native_write_msr_safe(msr, low, high);
947 }
948
949 return ret;
950 }
951
xen_read_msr(unsigned int msr)952 static u64 xen_read_msr(unsigned int msr)
953 {
954 /*
955 * This will silently swallow a #GP from RDMSR. It may be worth
956 * changing that.
957 */
958 int err;
959
960 return xen_read_msr_safe(msr, &err);
961 }
962
xen_write_msr(unsigned int msr,unsigned low,unsigned high)963 static void xen_write_msr(unsigned int msr, unsigned low, unsigned high)
964 {
965 /*
966 * This will silently swallow a #GP from WRMSR. It may be worth
967 * changing that.
968 */
969 xen_write_msr_safe(msr, low, high);
970 }
971
xen_setup_shared_info(void)972 void xen_setup_shared_info(void)
973 {
974 set_fixmap(FIX_PARAVIRT_BOOTMAP, xen_start_info->shared_info);
975
976 HYPERVISOR_shared_info =
977 (struct shared_info *)fix_to_virt(FIX_PARAVIRT_BOOTMAP);
978
979 xen_setup_mfn_list_list();
980
981 if (system_state == SYSTEM_BOOTING) {
982 #ifndef CONFIG_SMP
983 /*
984 * In UP this is as good a place as any to set up shared info.
985 * Limit this to boot only, at restore vcpu setup is done via
986 * xen_vcpu_restore().
987 */
988 xen_setup_vcpu_info_placement();
989 #endif
990 /*
991 * Now that shared info is set up we can start using routines
992 * that point to pvclock area.
993 */
994 xen_init_time_ops();
995 }
996 }
997
998 /* This is called once we have the cpu_possible_mask */
xen_setup_vcpu_info_placement(void)999 void __ref xen_setup_vcpu_info_placement(void)
1000 {
1001 int cpu;
1002
1003 for_each_possible_cpu(cpu) {
1004 /* Set up direct vCPU id mapping for PV guests. */
1005 per_cpu(xen_vcpu_id, cpu) = cpu;
1006
1007 /*
1008 * xen_vcpu_setup(cpu) can fail -- in which case it
1009 * falls back to the shared_info version for cpus
1010 * where xen_vcpu_nr(cpu) < MAX_VIRT_CPUS.
1011 *
1012 * xen_cpu_up_prepare_pv() handles the rest by failing
1013 * them in hotplug.
1014 */
1015 (void) xen_vcpu_setup(cpu);
1016 }
1017
1018 /*
1019 * xen_vcpu_setup managed to place the vcpu_info within the
1020 * percpu area for all cpus, so make use of it.
1021 */
1022 if (xen_have_vcpu_info_placement) {
1023 pv_irq_ops.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct);
1024 pv_irq_ops.restore_fl = __PV_IS_CALLEE_SAVE(xen_restore_fl_direct);
1025 pv_irq_ops.irq_disable = __PV_IS_CALLEE_SAVE(xen_irq_disable_direct);
1026 pv_irq_ops.irq_enable = __PV_IS_CALLEE_SAVE(xen_irq_enable_direct);
1027 pv_mmu_ops.read_cr2 = xen_read_cr2_direct;
1028 }
1029 }
1030
1031 static const struct pv_info xen_info __initconst = {
1032 .shared_kernel_pmd = 0,
1033
1034 #ifdef CONFIG_X86_64
1035 .extra_user_64bit_cs = FLAT_USER_CS64,
1036 #endif
1037 .name = "Xen",
1038 };
1039
1040 static const struct pv_cpu_ops xen_cpu_ops __initconst = {
1041 .cpuid = xen_cpuid,
1042
1043 .set_debugreg = xen_set_debugreg,
1044 .get_debugreg = xen_get_debugreg,
1045
1046 .read_cr0 = xen_read_cr0,
1047 .write_cr0 = xen_write_cr0,
1048
1049 .write_cr4 = xen_write_cr4,
1050
1051 #ifdef CONFIG_X86_64
1052 .read_cr8 = xen_read_cr8,
1053 .write_cr8 = xen_write_cr8,
1054 #endif
1055
1056 .wbinvd = native_wbinvd,
1057
1058 .read_msr = xen_read_msr,
1059 .write_msr = xen_write_msr,
1060
1061 .read_msr_safe = xen_read_msr_safe,
1062 .write_msr_safe = xen_write_msr_safe,
1063
1064 .read_pmc = xen_read_pmc,
1065
1066 .iret = xen_iret,
1067 #ifdef CONFIG_X86_64
1068 .usergs_sysret64 = xen_sysret64,
1069 #endif
1070
1071 .load_tr_desc = paravirt_nop,
1072 .set_ldt = xen_set_ldt,
1073 .load_gdt = xen_load_gdt,
1074 .load_idt = xen_load_idt,
1075 .load_tls = xen_load_tls,
1076 #ifdef CONFIG_X86_64
1077 .load_gs_index = xen_load_gs_index,
1078 #endif
1079
1080 .alloc_ldt = xen_alloc_ldt,
1081 .free_ldt = xen_free_ldt,
1082
1083 .store_tr = xen_store_tr,
1084
1085 .write_ldt_entry = xen_write_ldt_entry,
1086 .write_gdt_entry = xen_write_gdt_entry,
1087 .write_idt_entry = xen_write_idt_entry,
1088 .load_sp0 = xen_load_sp0,
1089
1090 .set_iopl_mask = xen_set_iopl_mask,
1091 .io_delay = xen_io_delay,
1092
1093 /* Xen takes care of %gs when switching to usermode for us */
1094 .swapgs = paravirt_nop,
1095
1096 .start_context_switch = paravirt_start_context_switch,
1097 .end_context_switch = xen_end_context_switch,
1098 };
1099
xen_restart(char * msg)1100 static void xen_restart(char *msg)
1101 {
1102 xen_reboot(SHUTDOWN_reboot);
1103 }
1104
xen_machine_halt(void)1105 static void xen_machine_halt(void)
1106 {
1107 xen_reboot(SHUTDOWN_poweroff);
1108 }
1109
xen_machine_power_off(void)1110 static void xen_machine_power_off(void)
1111 {
1112 if (pm_power_off)
1113 pm_power_off();
1114 xen_reboot(SHUTDOWN_poweroff);
1115 }
1116
xen_crash_shutdown(struct pt_regs * regs)1117 static void xen_crash_shutdown(struct pt_regs *regs)
1118 {
1119 xen_reboot(SHUTDOWN_crash);
1120 }
1121
1122 static const struct machine_ops xen_machine_ops __initconst = {
1123 .restart = xen_restart,
1124 .halt = xen_machine_halt,
1125 .power_off = xen_machine_power_off,
1126 .shutdown = xen_machine_halt,
1127 .crash_shutdown = xen_crash_shutdown,
1128 .emergency_restart = xen_emergency_restart,
1129 };
1130
xen_get_nmi_reason(void)1131 static unsigned char xen_get_nmi_reason(void)
1132 {
1133 unsigned char reason = 0;
1134
1135 /* Construct a value which looks like it came from port 0x61. */
1136 if (test_bit(_XEN_NMIREASON_io_error,
1137 &HYPERVISOR_shared_info->arch.nmi_reason))
1138 reason |= NMI_REASON_IOCHK;
1139 if (test_bit(_XEN_NMIREASON_pci_serr,
1140 &HYPERVISOR_shared_info->arch.nmi_reason))
1141 reason |= NMI_REASON_SERR;
1142
1143 return reason;
1144 }
1145
xen_boot_params_init_edd(void)1146 static void __init xen_boot_params_init_edd(void)
1147 {
1148 #if IS_ENABLED(CONFIG_EDD)
1149 struct xen_platform_op op;
1150 struct edd_info *edd_info;
1151 u32 *mbr_signature;
1152 unsigned nr;
1153 int ret;
1154
1155 edd_info = boot_params.eddbuf;
1156 mbr_signature = boot_params.edd_mbr_sig_buffer;
1157
1158 op.cmd = XENPF_firmware_info;
1159
1160 op.u.firmware_info.type = XEN_FW_DISK_INFO;
1161 for (nr = 0; nr < EDDMAXNR; nr++) {
1162 struct edd_info *info = edd_info + nr;
1163
1164 op.u.firmware_info.index = nr;
1165 info->params.length = sizeof(info->params);
1166 set_xen_guest_handle(op.u.firmware_info.u.disk_info.edd_params,
1167 &info->params);
1168 ret = HYPERVISOR_platform_op(&op);
1169 if (ret)
1170 break;
1171
1172 #define C(x) info->x = op.u.firmware_info.u.disk_info.x
1173 C(device);
1174 C(version);
1175 C(interface_support);
1176 C(legacy_max_cylinder);
1177 C(legacy_max_head);
1178 C(legacy_sectors_per_track);
1179 #undef C
1180 }
1181 boot_params.eddbuf_entries = nr;
1182
1183 op.u.firmware_info.type = XEN_FW_DISK_MBR_SIGNATURE;
1184 for (nr = 0; nr < EDD_MBR_SIG_MAX; nr++) {
1185 op.u.firmware_info.index = nr;
1186 ret = HYPERVISOR_platform_op(&op);
1187 if (ret)
1188 break;
1189 mbr_signature[nr] = op.u.firmware_info.u.disk_mbr_signature.mbr_signature;
1190 }
1191 boot_params.edd_mbr_sig_buf_entries = nr;
1192 #endif
1193 }
1194
1195 /*
1196 * Set up the GDT and segment registers for -fstack-protector. Until
1197 * we do this, we have to be careful not to call any stack-protected
1198 * function, which is most of the kernel.
1199 */
xen_setup_gdt(int cpu)1200 static void xen_setup_gdt(int cpu)
1201 {
1202 pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry_boot;
1203 pv_cpu_ops.load_gdt = xen_load_gdt_boot;
1204
1205 setup_stack_canary_segment(0);
1206 switch_to_new_gdt(0);
1207
1208 pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry;
1209 pv_cpu_ops.load_gdt = xen_load_gdt;
1210 }
1211
xen_dom0_set_legacy_features(void)1212 static void __init xen_dom0_set_legacy_features(void)
1213 {
1214 x86_platform.legacy.rtc = 1;
1215 }
1216
1217 /* First C function to be called on Xen boot */
xen_start_kernel(void)1218 asmlinkage __visible void __init xen_start_kernel(void)
1219 {
1220 struct physdev_set_iopl set_iopl;
1221 unsigned long initrd_start = 0;
1222 int rc;
1223
1224 if (!xen_start_info)
1225 return;
1226
1227 xen_domain_type = XEN_PV_DOMAIN;
1228
1229 xen_setup_features();
1230
1231 /* Install Xen paravirt ops */
1232 pv_info = xen_info;
1233 pv_init_ops.patch = paravirt_patch_default;
1234 pv_cpu_ops = xen_cpu_ops;
1235 xen_init_irq_ops();
1236
1237 /*
1238 * Setup xen_vcpu early because it is needed for
1239 * local_irq_disable(), irqs_disabled(), e.g. in printk().
1240 *
1241 * Don't do the full vcpu_info placement stuff until we have
1242 * the cpu_possible_mask and a non-dummy shared_info.
1243 */
1244 xen_vcpu_info_reset(0);
1245
1246 x86_platform.get_nmi_reason = xen_get_nmi_reason;
1247
1248 x86_init.resources.memory_setup = xen_memory_setup;
1249 x86_init.oem.arch_setup = xen_arch_setup;
1250 x86_init.oem.banner = xen_banner;
1251
1252 /*
1253 * Set up some pagetable state before starting to set any ptes.
1254 */
1255
1256 xen_setup_machphys_mapping();
1257 xen_init_mmu_ops();
1258
1259 /* Prevent unwanted bits from being set in PTEs. */
1260 __supported_pte_mask &= ~_PAGE_GLOBAL;
1261
1262 /*
1263 * Prevent page tables from being allocated in highmem, even
1264 * if CONFIG_HIGHPTE is enabled.
1265 */
1266 __userpte_alloc_gfp &= ~__GFP_HIGHMEM;
1267
1268 /* Get mfn list */
1269 xen_build_dynamic_phys_to_machine();
1270
1271 /*
1272 * Set up kernel GDT and segment registers, mainly so that
1273 * -fstack-protector code can be executed.
1274 */
1275 xen_setup_gdt(0);
1276
1277 /* Work out if we support NX */
1278 get_cpu_cap(&boot_cpu_data);
1279 x86_configure_nx();
1280
1281 /* Let's presume PV guests always boot on vCPU with id 0. */
1282 per_cpu(xen_vcpu_id, 0) = 0;
1283
1284 idt_setup_early_handler();
1285
1286 xen_init_capabilities();
1287
1288 #ifdef CONFIG_X86_LOCAL_APIC
1289 /*
1290 * set up the basic apic ops.
1291 */
1292 xen_init_apic();
1293 #endif
1294
1295 if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) {
1296 pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start;
1297 pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit;
1298 }
1299
1300 machine_ops = xen_machine_ops;
1301
1302 /*
1303 * The only reliable way to retain the initial address of the
1304 * percpu gdt_page is to remember it here, so we can go and
1305 * mark it RW later, when the initial percpu area is freed.
1306 */
1307 xen_initial_gdt = &per_cpu(gdt_page, 0);
1308
1309 xen_smp_init();
1310
1311 #ifdef CONFIG_ACPI_NUMA
1312 /*
1313 * The pages we from Xen are not related to machine pages, so
1314 * any NUMA information the kernel tries to get from ACPI will
1315 * be meaningless. Prevent it from trying.
1316 */
1317 acpi_numa = -1;
1318 #endif
1319 WARN_ON(xen_cpuhp_setup(xen_cpu_up_prepare_pv, xen_cpu_dead_pv));
1320
1321 local_irq_disable();
1322 early_boot_irqs_disabled = true;
1323
1324 xen_raw_console_write("mapping kernel into physical memory\n");
1325 xen_setup_kernel_pagetable((pgd_t *)xen_start_info->pt_base,
1326 xen_start_info->nr_pages);
1327 xen_reserve_special_pages();
1328
1329 /* keep using Xen gdt for now; no urgent need to change it */
1330
1331 #ifdef CONFIG_X86_32
1332 pv_info.kernel_rpl = 1;
1333 if (xen_feature(XENFEAT_supervisor_mode_kernel))
1334 pv_info.kernel_rpl = 0;
1335 #else
1336 pv_info.kernel_rpl = 0;
1337 #endif
1338 /* set the limit of our address space */
1339 xen_reserve_top();
1340
1341 /*
1342 * We used to do this in xen_arch_setup, but that is too late
1343 * on AMD were early_cpu_init (run before ->arch_setup()) calls
1344 * early_amd_init which pokes 0xcf8 port.
1345 */
1346 set_iopl.iopl = 1;
1347 rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
1348 if (rc != 0)
1349 xen_raw_printk("physdev_op failed %d\n", rc);
1350
1351 #ifdef CONFIG_X86_32
1352 /* set up basic CPUID stuff */
1353 cpu_detect(&new_cpu_data);
1354 set_cpu_cap(&new_cpu_data, X86_FEATURE_FPU);
1355 new_cpu_data.x86_capability[CPUID_1_EDX] = cpuid_edx(1);
1356 #endif
1357
1358 if (xen_start_info->mod_start) {
1359 if (xen_start_info->flags & SIF_MOD_START_PFN)
1360 initrd_start = PFN_PHYS(xen_start_info->mod_start);
1361 else
1362 initrd_start = __pa(xen_start_info->mod_start);
1363 }
1364
1365 /* Poke various useful things into boot_params */
1366 boot_params.hdr.type_of_loader = (9 << 4) | 0;
1367 boot_params.hdr.ramdisk_image = initrd_start;
1368 boot_params.hdr.ramdisk_size = xen_start_info->mod_len;
1369 boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line);
1370 boot_params.hdr.hardware_subarch = X86_SUBARCH_XEN;
1371
1372 if (!xen_initial_domain()) {
1373 add_preferred_console("xenboot", 0, NULL);
1374 add_preferred_console("tty", 0, NULL);
1375 add_preferred_console("hvc", 0, NULL);
1376 if (pci_xen)
1377 x86_init.pci.arch_init = pci_xen_init;
1378 } else {
1379 const struct dom0_vga_console_info *info =
1380 (void *)((char *)xen_start_info +
1381 xen_start_info->console.dom0.info_off);
1382 struct xen_platform_op op = {
1383 .cmd = XENPF_firmware_info,
1384 .interface_version = XENPF_INTERFACE_VERSION,
1385 .u.firmware_info.type = XEN_FW_KBD_SHIFT_FLAGS,
1386 };
1387
1388 x86_platform.set_legacy_features =
1389 xen_dom0_set_legacy_features;
1390 xen_init_vga(info, xen_start_info->console.dom0.info_size);
1391 xen_start_info->console.domU.mfn = 0;
1392 xen_start_info->console.domU.evtchn = 0;
1393
1394 if (HYPERVISOR_platform_op(&op) == 0)
1395 boot_params.kbd_status = op.u.firmware_info.u.kbd_shift_flags;
1396
1397 /* Make sure ACS will be enabled */
1398 pci_request_acs();
1399
1400 xen_acpi_sleep_register();
1401
1402 /* Avoid searching for BIOS MP tables */
1403 x86_init.mpparse.find_smp_config = x86_init_noop;
1404 x86_init.mpparse.get_smp_config = x86_init_uint_noop;
1405
1406 xen_boot_params_init_edd();
1407 }
1408 #ifdef CONFIG_PCI
1409 /* PCI BIOS service won't work from a PV guest. */
1410 pci_probe &= ~PCI_PROBE_BIOS;
1411 #endif
1412 xen_raw_console_write("about to get started...\n");
1413
1414 /* We need this for printk timestamps */
1415 xen_setup_runstate_info(0);
1416
1417 xen_efi_init();
1418
1419 /* Start the world */
1420 #ifdef CONFIG_X86_32
1421 i386_start_kernel();
1422 #else
1423 cr4_init_shadow(); /* 32b kernel does this in i386_start_kernel() */
1424 x86_64_start_reservations((char *)__pa_symbol(&boot_params));
1425 #endif
1426 }
1427
xen_cpu_up_prepare_pv(unsigned int cpu)1428 static int xen_cpu_up_prepare_pv(unsigned int cpu)
1429 {
1430 int rc;
1431
1432 if (per_cpu(xen_vcpu, cpu) == NULL)
1433 return -ENODEV;
1434
1435 xen_setup_timer(cpu);
1436
1437 rc = xen_smp_intr_init(cpu);
1438 if (rc) {
1439 WARN(1, "xen_smp_intr_init() for CPU %d failed: %d\n",
1440 cpu, rc);
1441 return rc;
1442 }
1443
1444 rc = xen_smp_intr_init_pv(cpu);
1445 if (rc) {
1446 WARN(1, "xen_smp_intr_init_pv() for CPU %d failed: %d\n",
1447 cpu, rc);
1448 return rc;
1449 }
1450
1451 return 0;
1452 }
1453
xen_cpu_dead_pv(unsigned int cpu)1454 static int xen_cpu_dead_pv(unsigned int cpu)
1455 {
1456 xen_smp_intr_free(cpu);
1457 xen_smp_intr_free_pv(cpu);
1458
1459 xen_teardown_timer(cpu);
1460
1461 return 0;
1462 }
1463
xen_platform_pv(void)1464 static uint32_t __init xen_platform_pv(void)
1465 {
1466 if (xen_pv_domain())
1467 return xen_cpuid_base();
1468
1469 return 0;
1470 }
1471
1472 const __initconst struct hypervisor_x86 x86_hyper_xen_pv = {
1473 .name = "Xen PV",
1474 .detect = xen_platform_pv,
1475 .type = X86_HYPER_XEN_PV,
1476 .runtime.pin_vcpu = xen_pin_vcpu,
1477 };
1478