1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef __ASMARM_ARCH_SCU_H 3 #define __ASMARM_ARCH_SCU_H 4 5 #define SCU_PM_NORMAL 0 6 #define SCU_PM_DORMANT 2 7 #define SCU_PM_POWEROFF 3 8 9 #ifndef __ASSEMBLER__ 10 11 #include <linux/errno.h> 12 #include <asm/cputype.h> 13 scu_a9_has_base(void)14static inline bool scu_a9_has_base(void) 15 { 16 return read_cpuid_part() == ARM_CPU_PART_CORTEX_A9; 17 } 18 scu_a9_get_base(void)19static inline unsigned long scu_a9_get_base(void) 20 { 21 unsigned long pa; 22 23 asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (pa)); 24 25 return pa; 26 } 27 28 #ifdef CONFIG_HAVE_ARM_SCU 29 unsigned int scu_get_core_count(void __iomem *); 30 int scu_power_mode(void __iomem *, unsigned int); 31 #else scu_get_core_count(void __iomem * scu_base)32static inline unsigned int scu_get_core_count(void __iomem *scu_base) 33 { 34 return 0; 35 } scu_power_mode(void __iomem * scu_base,unsigned int mode)36static inline int scu_power_mode(void __iomem *scu_base, unsigned int mode) 37 { 38 return -EINVAL; 39 } 40 #endif 41 42 #if defined(CONFIG_SMP) && defined(CONFIG_HAVE_ARM_SCU) 43 void scu_enable(void __iomem *scu_base); 44 #else scu_enable(void __iomem * scu_base)45static inline void scu_enable(void __iomem *scu_base) {} 46 #endif 47 48 #endif 49 50 #endif 51