Searched refs:A12 (Results 1 – 9 of 9) sorted by relevance
27 || STDW .D1T1 A13:A12,*+A4(THREAD_A13_12)31 || LDDW .D1T1 *+A5(THREAD_A13_12),A13:A12
72 || STDW .D1T1 A13:A12,*A15--[1]172 LDDW .D1T1 *++A15[1],A13:A12311 GET_THREAD_INFO A12312 LDW .D1T1 *+A12(THREAD_INFO_FLAGS),A2345 GET_THREAD_INFO A12356 LDW .D1T1 *+A12(THREAD_INFO_FLAGS),A2
26 lddw .d2t1 *++B15, A13:A12
27 stdw .d2t1 A13:A12, *B15--
574 #define A12 0xffc00 /* A12 in the Coefficient Matrix */ macro
551 #define A12 0xffc00 /* A12 in the Coefficient Matrix */ macro
1166 bool "ARM errata: A12: some seqs of opposed cond code instrs => deadlock or corruption"1170 - Cortex-A12 818325: Execution of an UNPREDICTABLE STR or STM1172 - Cortex-A12 852422: Execution of a sequence of instructions might1174 any Cortex-A12 cores yet.1180 bool "ARM errata: A12: sequence of VMOV to core registers might lead to a dead lock"1183 This option enables the workaround for the 821420 Cortex-A121190 bool "ARM errata: A12: DMB NSHST/ISHST mixed ... might cause deadlock"1193 This option enables the workaround for the 825619 Cortex-A121215 This is identical to Cortex-A12 erratum 852422. It is a separate1216 config option from the A12 erratum due to the way errata are checked
561 | A12. Calculate YINT = FINT(Y) according to user's rounding mode.
493 ldr r10, =0x00000c0d @ Cortex-A12 primary part number