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Searched refs:A32 (Results 1 – 4 of 4) sorted by relevance

/arch/x86/boot/
Dcpucheck.c58 #define A32(a, b, c, d) (((d) << 24)+((c) << 16)+((b) << 8)+(a)) macro
62 return cpu_vendor[0] == A32('A', 'u', 't', 'h') && in is_amd()
63 cpu_vendor[1] == A32('e', 'n', 't', 'i') && in is_amd()
64 cpu_vendor[2] == A32('c', 'A', 'M', 'D'); in is_amd()
69 return cpu_vendor[0] == A32('C', 'e', 'n', 't') && in is_centaur()
70 cpu_vendor[1] == A32('a', 'u', 'r', 'H') && in is_centaur()
71 cpu_vendor[2] == A32('a', 'u', 'l', 's'); in is_centaur()
76 return cpu_vendor[0] == A32('G', 'e', 'n', 'u') && in is_transmeta()
77 cpu_vendor[1] == A32('i', 'n', 'e', 'T') && in is_transmeta()
78 cpu_vendor[2] == A32('M', 'x', '8', '6'); in is_transmeta()
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/arch/blackfin/mach-bf548/include/mach/
DdefBF544.h588 #define A32 0xffc00 /* A32 in the Coefficient Matrix */ macro
DdefBF547.h565 #define A32 0xffc00 /* A32 in the Coefficient Matrix */ macro
/arch/arm64/
DKconfig879 ARMv8 obsoletes the use of A32 SWP/SWPB instructions such that