Searched refs:CSR_TIMER2_CLR (Results 1 – 2 of 2) sorted by relevance
| /arch/arm/mach-footbridge/ | ||
| D | dc21285-timer.c | 31 *CSR_TIMER2_CLR = 0; in cksrc_dc21285_enable() |
| /arch/arm/include/asm/hardware/ | ||
| D | dec21285.h | 130 #define CSR_TIMER2_CLR DC21285_IO(0x032c) macro |