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Searched refs:CSR_TIMER3_CNTL (Results 1 – 2 of 2) sorted by relevance

/arch/arm/mach-footbridge/
Ddc21285-timer.c138 *CSR_TIMER3_CNTL = TIMER_CNTL_ENABLE | TIMER_CNTL_DIV16; in footbridge_sched_clock()
/arch/arm/include/asm/hardware/
Ddec21285.h133 #define CSR_TIMER3_CNTL DC21285_IO(0x0348) macro