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Searched refs:CTX (Results 1 – 23 of 23) sorted by relevance

/arch/x86/crypto/
Dcamellia-x86_64-asm_64.S53 #define CTX %rdi macro
105 movq (key_table + ((subkey) * 2) * 4)(CTX), RT2; \
115 movl (key_table + ((kl) * 2) * 4)(CTX), RT0d; \
120 movq (key_table + ((kr) * 2) * 4)(CTX), RT1; \
125 movq (key_table + ((kl) * 2) * 4)(CTX), RT2; \
129 movl (key_table + ((kr) * 2) * 4)(CTX), RT0d; \
153 xorq key_table(CTX), RAB0;
156 xorq key_table(CTX, max, 8), RCD0; \
182 xorq key_table(CTX, max, 8), RAB0;
185 xorq key_table(CTX), RCD0; \
[all …]
Dblowfish-x86_64-asm_64.S36 #define CTX %r12 macro
79 movl s0(CTX,RT0,4), RT0d; \
80 addl s1(CTX,RT1,4), RT0d; \
84 xorl s2(CTX,RT1,4), RT0d; \
85 addl s3(CTX,RT2,4), RT0d; \
89 xorq p+4*(n)(CTX), RX0;
98 movq p+4*(n-1)(CTX), RT0; \
130 movq %rdi, CTX;
167 movq %rdi, CTX;
205 movl s0(CTX,RT0,4), RT0d; \
[all …]
Dtwofish-x86_64-asm_64-3way.S39 #define CTX %rdi macro
96 op1##l T0(CTX, tmp2, 4), dst ## d; \
97 op2##l T1(CTX, tmp1, 4), dst ## d;
135 addl k+4*(2*(n))(CTX), x ## d; \
137 addl k+4*(2*(n)+1)(CTX), y ## d; \
148 addl k+4*(2*(n))(CTX), x ## d; \
149 addl k+4*(2*(n)+1)(CTX), y ## d; \
192 xorq w+4*m(CTX), xy ## 0; \
195 xorq w+4*m(CTX), xy ## 1; \
198 xorq w+4*m(CTX), xy ## 2;
[all …]
Dsha256-avx2-asm.S95 CTX = %rdi # 1st arg define
101 SRND = CTX # SRND is same register as CTX
552 mov (CTX), a
553 mov 4*1(CTX), b
554 mov 4*2(CTX), c
555 mov 4*3(CTX), d
556 mov 4*4(CTX), e
557 mov 4*5(CTX), f
558 mov 4*6(CTX), g
559 mov 4*7(CTX), h
[all …]
Dcamellia-aesni-avx-asm_64.S29 #define CTX %rdi macro
215 leaq (key_table + (i) * 8)(CTX), %r9; \
227 leaq (key_table + ((i) + (dir)) * 8)(CTX), %r9; \
749 ((key_table + (8) * 8) + 0)(CTX),
750 ((key_table + (8) * 8) + 4)(CTX),
751 ((key_table + (8) * 8) + 8)(CTX),
752 ((key_table + (8) * 8) + 12)(CTX));
761 ((key_table + (16) * 8) + 0)(CTX),
762 ((key_table + (16) * 8) + 4)(CTX),
763 ((key_table + (16) * 8) + 8)(CTX),
[all …]
Dtwofish-avx-x86_64-asm_64.S55 #define CTX %rdi macro
110 movl t0(CTX, RID1, 4), dst ## d; \
111 movl t1(CTX, RID2, 4), RID2d; \
116 xorl t2(CTX, RID1, 4), dst ## d; \
117 xorl t3(CTX, RID2, 4), dst ## d;
193 vbroadcastss (k+4*(2*(n)))(CTX), RK1; \
194 vbroadcastss (k+4*(2*(n)+1))(CTX), RK2; \
201 vbroadcastss (k+4*(2*(n)))(CTX), RK1; \
202 vbroadcastss (k+4*(2*(n)+1))(CTX), RK2; \
260 vmovdqu w(CTX), RK1;
[all …]
Dcamellia-aesni-avx2-asm_64.S24 #define CTX %rdi macro
254 leaq (key_table + (i) * 8)(CTX), %r9; \
266 leaq (key_table + ((i) + (dir)) * 8)(CTX), %r9; \
792 ((key_table + (8) * 8) + 0)(CTX),
793 ((key_table + (8) * 8) + 4)(CTX),
794 ((key_table + (8) * 8) + 8)(CTX),
795 ((key_table + (8) * 8) + 12)(CTX));
804 ((key_table + (16) * 8) + 0)(CTX),
805 ((key_table + (16) * 8) + 4)(CTX),
806 ((key_table + (16) * 8) + 8)(CTX),
[all …]
Dcast6-avx-x86_64-asm_64.S50 #define CTX %r15 macro
161 vbroadcastss (km+(4*(nn)))(CTX), RKM; \
198 vpxor (kr+n*16)(CTX), RKR, RKR; \
276 movq %rdi, CTX;
324 movq %rdi, CTX;
368 movq %rdi, CTX;
391 movq %rdi, CTX;
415 movq %rdi, CTX;
442 movq %rdi, CTX;
469 movq %rdi, CTX
[all …]
Dcast5-avx-x86_64-asm_64.S50 #define CTX %r15 macro
161 vbroadcastss (km+(4*n))(CTX), RKM; \
171 vpxor kr(CTX), RKR, RKR;
176 vpxor kr(CTX), RKR, RKR; \
252 movq %rdi, CTX;
277 movzbl rr(CTX), %eax;
326 movq %rdi, CTX;
338 movzbl rr(CTX), %eax;
386 movq %rdi, CTX;
424 movq %rdi, CTX;
[all …]
Dsha256-ssse3-asm.S92 CTX = %rdi # 1st arg define
375 mov 4*0(CTX), a
376 mov 4*1(CTX), b
377 mov 4*2(CTX), c
378 mov 4*3(CTX), d
379 mov 4*4(CTX), e
380 mov 4*5(CTX), f
381 mov 4*6(CTX), g
382 mov 4*7(CTX), h
449 addm (4*0)(CTX),a
[all …]
Dsha256-avx-asm.S100 CTX = %rdi # 1st arg define
369 mov 4*0(CTX), a
370 mov 4*1(CTX), b
371 mov 4*2(CTX), c
372 mov 4*3(CTX), d
373 mov 4*4(CTX), e
374 mov 4*5(CTX), f
375 mov 4*6(CTX), g
376 mov 4*7(CTX), h
439 addm (4*0)(CTX),a
[all …]
Ddes3_ede-asm_64.S32 #define CTX %rdi macro
158 movq (((n) + 1) * 8)(CTX), RWx;
191 movq (CTX), RW0;
462 movq 0(CTX), RW0;
Dserpent-sse2-i586-asm_32.S40 #define CTX %edx macro
54 movd (4*(i)+(j))*4(CTX), t; \
525 movl arg_ctx(%esp), CTX;
588 movl arg_ctx(%esp), CTX;
Dsha1_avx2_x86_64_asm.S74 #define CTX %rdi /* arg1 */ macro
656 mov CTX, HASH_PTR
Dsha1_ssse3_asm.S33 #define CTX %rdi // arg1 macro
84 mov CTX, HASH_PTR
Dserpent-sse2-x86_64-asm_64.S32 #define CTX %rdi macro
389 movd (4*(i)+(j))*4(CTX), t; \
Dserpent-avx-x86_64-asm_64.S43 #define CTX %rdi macro
387 vbroadcastss (4*(i)+(j))*4(CTX), t;
Dserpent-avx2-asm_64.S40 #define CTX %rdi macro
383 vpbroadcastd (4*(i)+(j))*4(CTX), t;
Dsha512-avx2-asm.S601 # save %rdi (CTX) before it gets clobbered
/arch/sparc/kernel/
Dsun4v_tlb_miss.S11 #define LOAD_ITLB_INFO(BASE, VADDR, CTX) \ argument
13 ldx [BASE + HV_FAULT_I_CTX_OFFSET], CTX;
16 #define LOAD_DTLB_INFO(BASE, VADDR, CTX) \ argument
18 ldx [BASE + HV_FAULT_D_CTX_OFFSET], CTX;
24 #define COMPUTE_TAG_TARGET(DEST, VADDR, CTX, ZERO_CTX_LABEL) \ argument
26 brz,pn CTX, ZERO_CTX_LABEL; \
Diommu.c28 #define STC_CTXMATCH_ADDR(STC, CTX) \ argument
29 ((STC)->strbuf_ctxmatch_base + ((CTX) << 3))
70 #define IOPTE_CONSISTENT(CTX) \ argument
72 (((CTX) << 47) & IOPTE_CONTEXT))
74 #define IOPTE_STREAMING(CTX) \ argument
75 (IOPTE_CONSISTENT(CTX) | IOPTE_STBUF)
/arch/sparc/net/
Dbpf_jit_comp_64.c653 #define emit_read_y(REG, CTX) emit(RD_Y | RD(REG), CTX) argument
654 #define emit_write_y(REG, CTX) emit(WR_Y | IMMED | RS1(REG) | S13(0), CTX) argument
656 #define emit_cmp(R1, R2, CTX) \ argument
657 emit(SUBCC | RS1(R1) | RS2(R2) | RD(G0), CTX)
659 #define emit_cmpi(R1, IMM, CTX) \ argument
660 emit(SUBCC | IMMED | RS1(R1) | S13(IMM) | RD(G0), CTX)
662 #define emit_btst(R1, R2, CTX) \ argument
663 emit(ANDCC | RS1(R1) | RS2(R2) | RD(G0), CTX)
665 #define emit_btsti(R1, IMM, CTX) \ argument
666 emit(ANDCC | IMMED | RS1(R1) | S13(IMM) | RD(G0), CTX)
/arch/powerpc/xmon/
Dppc-opc.c2429 #define CTX(op, xop) (OP (op) | (((unsigned long)(xop)) & 0x7)) macro
2430 #define CTX_MASK CTX(0x3f, 0x7)