/arch/metag/tbx/ |
D | tbipcx.S | 78 MOVS D0Re0,D0Ar2 /* Return in user mode? */ 88 ANDT D0Ar2,D0Ar2,#TBICTX_PRIV_BIT /* Extract PRIV bit */ 90 ADD D0Ar6,D0Ar6,D0Ar2 /* Add in PRIV bit if requested */ 93 MSETL [A0.3],D0Re0,D0Ar6,D0Ar4,D0Ar2,D0FrT,D0.5,D0.6,D0.7 142 MSETL [A1.2],D0Ar6,D0Ar4,D0Ar2,D0FrT,D0.5,D0.6,D0.7 146 MOV D0Ar2,TXMODE 153 MSETL [A1.2],D0Ar4,D0Ar2 /* Save CT regs state */ 154 MOV D0Ar2,D0Re0 /* Copy TXSTATUS */ 155 ANDMT D0Ar2,D0Ar2,#TBICTX_CBUF_BIT+TBICTX_CBRP_BIT 159 ORNZ D0Ar2,D0Ar2,D1Ar1 [all …]
|
D | tbitimer.S | 68 NEGS D0Ar6,D0Ar2 /* Set flags from time-stamp */ 117 ADD D0Re0,D0Ar2,D0Ar6 /* Regenerate new value = result */ 118 NEG D0Ar2,D0Ar2 /* Negate delta */ 119 ASR D1Re0,D0Ar2,#31 /* Sign extend negated delta */ 120 ADDS D0Ar4,D0Ar4,D0Ar2 /* Add time added to ... */ 150 SUB D0Ar2,D0Ar6,D0Ar2 /* Delta from (old - new) */ 151 ASR D1Re0,D0Ar2,#31 /* Sign extend delta */ 152 ADDS D0Ar4,D0Ar4,D0Ar2 /* Add time added to ... */ 188 MOVCS TXTIMER,D0Ar2 /* Conditional SET operation */ 189 ADDNZ TXTIMER,D0Ar2,D0Ar6 /* Conditional ADD operation */ [all …]
|
D | tbictx.S | 41 TSTT D0Ar2,#TBICTX_XDX8_BIT+TBICTX_XAXX_BIT+TBICTX_XHL2_BIT+TBICTX_XTDP_BIT+TBICTX_XCBF_BIT 42 AND D0Ar4,D0Ar2,D0Ar4 /* D0Ar4 = Ints to allow */ 43 XOR D0Ar2,D0Ar2,D0Ar4 /* Less Ints in TrigMask */ 45 TSTT D0Ar2,#TBICTX_CBUF_BIT+TBICTX_CBRP_BIT /* Is catch state dirty? */ 48 MOV D0Re0,D0Ar2 /* Update State argument */ 62 ORT D0Ar2,D0Ar2,#TBICTX_XCBF_BIT /* Add in XCBF save request */ 63 MOV D0.5,D0Ar2 /* Save State in DX.5 */ 101 TSTT D0Ar2,#TBICTX_XDX8_BIT+TBICTX_XAXX_BIT+TBICTX_XHL2_BIT+TBICTX_XTDP_BIT+TBICTX_XEXT_BIT 106 TSTT D0Ar2,#TBICTX_XEXT_BIT /* Extended base-state model? */ 109 MOV D0Ar4,D0Ar2 /* Extract Ctx.SaveFlags value */ [all …]
|
D | tbisoft.S | 90 MSETL [A0StP],D0Re0,D0Ar6,D0Ar4,D0Ar2,D0FrT,D0.5,D0.6,D0.7 100 MOV D0Re0,D0Ar2 /* Result from args */ 129 MOV D0Re0,D0Ar2 /* Result from args */ 189 MOV D1RtP,D0Ar2 204 MOVT D0Ar2,#TBICTX_SOFT_BIT /* Only soft thread state */ 209 SETL [A0.2++],D0Ar2,D1Ar1 /* Set header fields */ 210 MSETL [A0.2],D0Re0,D0Ar6,D0Ar4,D0Ar2,D0FrT,D0.5,D0.6,D0.7 211 MOV D0Ar2,#0 /* Zero values */ 213 SETL [A0.2++],D0Ar2,D1Ar1 /* Zero CurrRPT, CurrBPOBITS, */ 214 SETL [A0.2++],D0Ar2,D1Ar1 /* CurrMODE, and pCurrCBuf */ [all …]
|
D | tbicore.S | 65 XOR D0Ar2,D0Ar2,D0Re0 /* Toggle Id PSTAT if privileged */ 71 CMP D0Ar4,D0Ar2 /* Does it match? */ 123 TST D0Re0,D0Ar2 /* Are we clear to send? */ 124 ORZ D0Re0,D0Re0,D0Ar2 /* Yes: So set bits and */
|
D | tbictxfpu.S | 43 TSTT D0Ar2,#TBICTX_FPAC_BIT 98 ANDT D0Ar2, D0Ar2, #TBICTX_FPAC_BIT 99 OR D0Ar6, D0Ar6, D0Ar2 135 TSTT D0Ar2,#TBICTX_FPAC_BIT
|
D | tbilogf.S | 24 MSETL [A0StP],D0Ar6,D0Ar4,D0Ar2 40 MSETL [A0StP],D0Ar6,D0Ar4,D0Ar2
|
D | tbidspram.S | 32 MOV A0.3, D0Ar2 66 MOV A0.3, D0Ar2 100 MOV A0.3, D0Ar2 134 MOV A0.3, D0Ar2
|
/arch/metag/lib/ |
D | muldi3.S | 10 ! A = D1Ar1:D0Ar2 = a 2^48 + b 2^32 + c 2^16 + d 2^0 20 MULD D0Re0,D0Ar2,D1Ar3 ! (w 2^48 + x 2^32)(c 2^16 + d 2^0) 23 MULW D0Re0,D0Ar2,D0Ar4 ! (d 2^0) * (z 2^0) 25 RTDW D0Ar2,D0Ar2 26 MULW D0Ar6,D0Ar2,D0Ar4 ! (c 2^16)(z 2^0) 34 MULW D0Ar6,D0Ar2,D0Ar4 ! (c 2^16)(y 2^16) 37 RTDW D0Ar2,D0Ar2 38 MULW D0Ar6,D0Ar2,D0Ar4 ! (d 2^0)(y 2^16)
|
D | memset.S | 8 ! D0Ar2 c 12 AND D0Ar2,D0Ar2,#0xFF ! Ensure a byte input value 13 MULW D0Ar2,D0Ar2,#0x0101 ! Duplicate byte value into 0-15 15 LSL D0Re0,D0Ar2,#16 ! Duplicate byte value into 16-31 16 ADD A0.2,D0Ar2,D0Re0 ! Duplicate byte value into 4 (A0.2) 22 MOV D0Ar2,#8 ! Need 8 - N in D1Ar5 ... 23 SUB D1Ar5,D0Ar2,D0Ar4 ! ... subtract N 32 LSRS D0Ar2,D1Ar3,#5 36 SUB TXRPT,D0Ar2,#1 49 LSRS D0Ar2,D1Ar3,#3 [all …]
|
D | div64.S | 16 MOV D0Re0,D0Ar2 21 CMPEQ D0Ar4,D0Ar2 39 CMPEQ D0Ar4,D0Ar2 48 CMPEQ D0Ar2,D0Ar4 55 SUBS D0Ar2,D0Ar2,D0Ar4 80 XOR D0.5,D0Ar2,D0Ar4 85 NEGS D0Ar2,D0Ar2
|
D | copy_page.S | 10 !! D0Ar2 - from 14 GETL D0Re0,D1Re0,[D0Ar2++] 15 GETL D0Ar6,D1Ar5,[D0Ar2++]
|
D | memcpy.S | 8 ! D0Ar2 src 13 MOV A1.2, D0Ar2 ! source pointer 119 GETL D0Ar2, D1Ar1, [++A1.2] 122 MOV D1Re0, D0Ar2 126 LSR D0Ar2, D0Ar2, D0Ar6 128 ADD D1Re0, D1Re0, D0Ar2 149 MOV D0Ar2, D1Re0 150 LSR D0FrT, D0Ar2, D0Ar6 151 GETL D0Ar2, D1Ar1, [++A1.2] 153 MOV D1Re0, D0Ar2 [all …]
|
D | divsi3.S | 16 MOV D1Re0,D0Ar2 ! Au already in A1Ar1, Bu -> D1Re0 30 !! A already in D1Ar1, B already in D0Ar2 -> make B abs(B) 32 MOV D1Re0,D0Ar2 ! A already in A1Ar1, B -> D1Re0 54 NEG D0Ar2,D0Re0 ! Calculate neg result 55 MOVMI D0Re0,D0Ar2 ! Yes: Take neg result 81 MOV D0Ar2,D1Ar3 ! copy into bank 0 83 LSLGT D0Ar6,D0Ar6,D0Ar2 ! ( > 0) ? left shift curbit 98 NEG D0Ar2,D0Re0 ! Calculate neg result 99 MOVMI D0Re0,D0Ar2 ! Yes: Take neg result
|
D | ucmpdi2.S | 12 ! u64 a (D0Ar2, D1Ar1) 21 CMPEQ D0Ar2,D0Ar4
|
D | cmpdi2.S | 12 ! s64 a (D0Ar2, D1Ar1) 23 CMP D0Ar2,D0Ar4
|
D | memmove.S | 8 ! D0Ar2 src 16 MOV D1Ar5, D0Ar2 21 CMP D0Ar2, D0Ar4 24 MOV D1Re0, D0Ar2 26 ADD D0Ar2, D1Re0, D1Ar3 29 MOV A1.2, D0Ar2 34 MOV D0Ar4, D0Ar2 198 MOV A1.2, D0Ar2 203 MOV D0Ar4, D0Ar2
|
D | ip_fast_csum.S | 15 SUBS TXRPT,D0Ar2,#1
|
D | lshrdi3.S | 12 MOV D0Re0,D0Ar2
|
D | ashldi3.S | 12 MOV D0Re0,D0Ar2
|
D | ashrdi3.S | 12 MOV D0Re0,D0Ar2
|
/arch/metag/kernel/ |
D | tbiunexp.S | 10 TSTT D0Ar2,#TBICTX_CRIT_BIT ! Result of nestable int call? 14 OR D0Ar2,D0Ar2,D0Re0 ! Preserve bits cleared 16 MSETL [A0StP],D0Ar6,D0Ar4,D0Ar2 ! Save args on stack 17 SETL [A0StP++],D0Ar2,D1Ar1 ! Init area for returned values
|
D | ftrace_stub.S | 19 MSETL [A0StP], D0Ar6, D0Ar4, D0Ar2, D0.4 21 MOV D0Ar2, D1RtP 29 GETL D0Ar2, D1Ar1, [A0StP++#(-8)] 38 MSETL [A0StP], D0Ar6, D0Ar4, D0Ar2, D0.4 40 MOV D0Ar2, D1RtP 53 GETL D0Ar2, D1Ar1, [A0StP++#(-8)]
|
D | user_gateway.S | 73 LNKSETDZ [D1Ar3],D0Ar2 88 SETDZ [D1Ar3],D0Ar2
|
D | head.S | 15 ! D0Ar2 contains pTBI 21 SETL [D0Re0],D0Ar2,D1Ar1
|