Searched refs:DIV4_B3 (Results 1 – 4 of 4) sorted by relevance
| /arch/sh/kernel/cpu/sh4a/ |
| D | clock-sh7722.c | 123 enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P, DIV4_NR }; enumerator
130 [DIV4_B3] = DIV4(FRQCR, 4, 0x1fff, CLK_ENABLE_ON_INIT),
193 CLKDEV_CON_ID("b3_clk", &div4_clks[DIV4_B3]),
|
| D | clock-sh7366.c | 117 enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P, enumerator
128 [DIV4_B3] = DIV4(FRQCR, 4, 0x1fff, CLK_ENABLE_ON_INIT),
207 CLKDEV_CON_ID("b3_clk", &div4_clks[DIV4_B3]),
|
| D | clock-sh7723.c | 121 enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P, DIV4_NR }; enumerator
131 [DIV4_B3] = DIV4(FRQCR, 4, 0x0db4, CLK_ENABLE_ON_INIT),
218 CLKDEV_CON_ID("b3_clk", &div4_clks[DIV4_B3]),
|
| D | clock-sh7343.c | 114 enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P, enumerator
125 [DIV4_B3] = DIV4(FRQCR, 4, 0x1fff, CLK_ENABLE_ON_INIT),
209 CLKDEV_CON_ID("b3_clk", &div4_clks[DIV4_B3]),
|