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Searched refs:DMA2_0_CONFIG (Results 1 – 2 of 2) sorted by relevance

/arch/blackfin/mach-bf561/include/mach/
DdefBF561.h539 #define DMA2_0_CONFIG 0xFFC00C08 /* DMA2 Channel 0 Configuration register */ macro
DcdefBF561.h945 #define bfin_read_DMA2_0_CONFIG() bfin_read16(DMA2_0_CONFIG)
946 #define bfin_write_DMA2_0_CONFIG(val) bfin_write16(DMA2_0_CONFIG,val)