Home
last modified time | relevance | path

Searched refs:ID_AA64ISAR0_AES_SHIFT (Results 1 – 2 of 2) sorted by relevance

/arch/arm64/kernel/
Dcpufeature.c125 ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR0_AES_SHIFT, 4, 0),
1167 HWCAP_CAP(SYS_ID_AA64ISAR0_EL1, ID_AA64ISAR0_AES_SHIFT, FTR_UNSIGNED, 2, CAP_HWCAP, HWCAP_PMULL),
1168 HWCAP_CAP(SYS_ID_AA64ISAR0_EL1, ID_AA64ISAR0_AES_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, HWCAP_AES),
/arch/arm64/include/asm/
Dsysreg.h396 #define ID_AA64ISAR0_AES_SHIFT 4 macro