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Searched refs:M32R_IRQ_SIO1_S (Results 1 – 9 of 9) sorted by relevance

/arch/m32r/platforms/oaks32r/
Dsetup.c109 irq_set_chip_and_handler(M32R_IRQ_SIO1_S, &oaks32r_irq_type, in init_IRQ()
111 icu_data[M32R_IRQ_SIO1_S].icucr = 0; in init_IRQ()
112 disable_oaks32r_irq(M32R_IRQ_SIO1_S); in init_IRQ()
/arch/m32r/platforms/mappi/
Dsetup.c110 irq_set_chip_and_handler(M32R_IRQ_SIO1_S, &mappi_irq_type, in init_IRQ()
112 icu_data[M32R_IRQ_SIO1_S].icucr = 0; in init_IRQ()
113 disable_mappi_irq(M32R_IRQ_SIO1_S); in init_IRQ()
/arch/m32r/platforms/mappi2/
Dsetup.c110 irq_set_chip_and_handler(M32R_IRQ_SIO1_S, &mappi2_irq_type, in init_IRQ()
112 icu_data[M32R_IRQ_SIO1_S].icucr = 0; in init_IRQ()
113 disable_mappi2_irq(M32R_IRQ_SIO1_S); in init_IRQ()
/arch/m32r/platforms/mappi3/
Dsetup.c109 irq_set_chip_and_handler(M32R_IRQ_SIO1_S, &mappi3_irq_type, in init_IRQ()
111 icu_data[M32R_IRQ_SIO1_S].icucr = 0; in init_IRQ()
112 disable_mappi3_irq(M32R_IRQ_SIO1_S); in init_IRQ()
/arch/m32r/platforms/usrv/
Dsetup.c166 irq_set_chip_and_handler(M32R_IRQ_SIO1_S, &mappi_irq_type, in init_IRQ()
168 icu_data[M32R_IRQ_SIO1_S].icucr = 0; in init_IRQ()
169 disable_mappi_irq(M32R_IRQ_SIO1_S); in init_IRQ()
/arch/m32r/platforms/opsput/
Dsetup.c292 irq_set_chip_and_handler(M32R_IRQ_SIO1_S, &opsput_irq_type, in init_IRQ()
294 icu_data[M32R_IRQ_SIO1_S].icucr = 0; in init_IRQ()
295 disable_opsput_irq(M32R_IRQ_SIO1_S); in init_IRQ()
/arch/m32r/platforms/m32700ut/
Dsetup.c294 irq_set_chip_and_handler(M32R_IRQ_SIO1_S, &m32700ut_irq_type, in init_IRQ()
296 icu_data[M32R_IRQ_SIO1_S].icucr = 0; in init_IRQ()
297 disable_m32700ut_irq(M32R_IRQ_SIO1_S); in init_IRQ()
/arch/m32r/include/asm/
Dm32102.h260 #define M32R_IRQ_SIO1_S (43) /* SIO1 receive */ macro
273 #define M32R_IRQ_SIO1_S (51) /* SIO1 receive */ macro
Dm32r_mp_fpga.h295 #define M32R_IRQ_SIO1_S (51) /* SIO1 receive */ macro