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Searched refs:MMCR1_PMC3SEL_SH (Results 1 – 5 of 5) sorted by relevance

/arch/powerpc/perf/
Dppc970-pmu.c68 #define MMCR1_PMC3SEL_SH 27 macro
391 << (MMCR1_PMC3SEL_SH - 5 * (pmc - 2)); in p970_compute_mmcr()
414 shift = MMCR1_PMC3SEL_SH - 5 * (pmc - 2); in p970_disable_pmc()
Dpower4-pmu.c80 #define MMCR1_PMC3SEL_SH 27 macro
506 mmcr1 |= psel << (MMCR1_PMC3SEL_SH - 5 * (pmc - 2)); in p4_compute_mmcr()
537 mmcr[1] &= ~(0x1fUL << (MMCR1_PMC3SEL_SH - 5 * (pmc - 2))); in p4_disable_pmc()
Dpower7-pmu.c48 #define MMCR1_PMC3SEL_SH 8 macro
Dpower5-pmu.c70 #define MMCR1_PMC3SEL_SH 9 macro
Dpower5+-pmu.c70 #define MMCR1_PMC3SEL_SH 9 macro