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Searched refs:MMCR1_TD_CP_DBG3SEL_SH (Results 1 – 4 of 4) sorted by relevance

/arch/powerpc/perf/
Dppc970-pmu.c59 #define MMCR1_TD_CP_DBG3SEL_SH 44 macro
Dpower4-pmu.c67 #define MMCR1_TD_CP_DBG3SEL_SH 44 macro
Dpower5-pmu.c55 #define MMCR1_TD_CP_DBG3SEL_SH 48 macro
Dpower5+-pmu.c55 #define MMCR1_TD_CP_DBG3SEL_SH 48 macro