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Searched refs:MMCR1_TTM1SEL_SH (Results 1 – 5 of 5) sorted by relevance

/arch/powerpc/perf/
Dppc970-pmu.c53 #define MMCR1_TTM1SEL_SH 59 macro
323 mmcr1 |= (unsigned long)(ttm & ~4) << MMCR1_TTM1SEL_SH; in p970_compute_mmcr()
Dpower4-pmu.c57 #define MMCR1_TTM1SEL_SH 59 macro
438 << MMCR1_TTM1SEL_SH; in p4_compute_mmcr()
Dpower5-pmu.c48 #define MMCR1_TTM1SEL_SH 60 macro
468 mmcr1 |= (unsigned long)(i & 3) << MMCR1_TTM1SEL_SH; in power5_compute_mmcr()
Dpower5+-pmu.c48 #define MMCR1_TTM1SEL_SH 60 macro
528 mmcr1 |= (unsigned long)(i & 3) << MMCR1_TTM1SEL_SH; in power5p_compute_mmcr()
Dpower7-pmu.c36 #define MMCR1_TTM1SEL_SH 56 macro