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Searched refs:MSR_P4_BPU_ESCR1 (Results 1 – 3 of 3) sorted by relevance

/arch/x86/include/asm/
Dmsr-index.h696 #define MSR_P4_BPU_ESCR1 0x000003b3 macro
/arch/x86/oprofile/
Dop_model_p4.c130 { CTR_BPU_2, MSR_P4_BPU_ESCR1} }
/arch/x86/events/intel/
Dp4.c88 .escr_msr = { MSR_P4_BPU_ESCR0, MSR_P4_BPU_ESCR1 },
1133 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_BPU_ESCR1),