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Searched refs:PLLCTL (Results 1 – 6 of 6) sorted by relevance

/arch/arm/mach-davinci/
Dpm.c54 val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL); in davinci_pm_suspend()
56 __raw_writel(val, pm_config.cpupll_reg_base + PLLCTL); in davinci_pm_suspend()
61 val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL); in davinci_pm_suspend()
63 __raw_writel(val, pm_config.cpupll_reg_base + PLLCTL); in davinci_pm_suspend()
78 val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL); in davinci_pm_suspend()
80 __raw_writel(val, pm_config.cpupll_reg_base + PLLCTL); in davinci_pm_suspend()
83 val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL); in davinci_pm_suspend()
85 __raw_writel(val, pm_config.cpupll_reg_base + PLLCTL); in davinci_pm_suspend()
91 val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL); in davinci_pm_suspend()
93 __raw_writel(val, pm_config.cpupll_reg_base + PLLCTL); in davinci_pm_suspend()
[all …]
Dsleep.S91 ldr ip, [r3, #PLLCTL]
94 str ip, [r3, #PLLCTL]
102 ldr ip, [r3, #PLLCTL]
104 str ip, [r3, #PLLCTL]
122 ldr ip, [r3, #PLLCTL]
124 str ip, [r3, #PLLCTL]
127 ldr ip, [r3, #PLLCTL]
129 str ip, [r3, #PLLCTL]
136 ldr ip, [r3, #PLLCTL]
138 str ip, [r3, #PLLCTL]
[all …]
Dclock.c447 ctrl = __raw_readl(pll->base + PLLCTL); in clk_pllclk_recalc()
540 ctrl = __raw_readl(pll->base + PLLCTL); in davinci_set_pllrate()
544 __raw_writel(ctrl, pll->base + PLLCTL); in davinci_set_pllrate()
550 __raw_writel(ctrl, pll->base + PLLCTL); in davinci_set_pllrate()
564 __raw_writel(ctrl, pll->base + PLLCTL); in davinci_set_pllrate()
570 __raw_writel(ctrl, pll->base + PLLCTL); in davinci_set_pllrate()
Dclock.h20 #define PLLCTL 0x100 macro
/arch/c6x/include/asm/
Dclock.h25 #define PLLCTL 0x100 macro
/arch/c6x/platforms/
Dpll.c279 ctrl = pll_read(pll, PLLCTL); in clk_pllclk_recalc()