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Searched refs:PPC_BIT (Results 1 – 11 of 11) sorted by relevance

/arch/powerpc/platforms/powernv/
Dvas.h124 #define VAS_XLATE_MSR_DR PPC_BIT(0)
125 #define VAS_XLATE_MSR_TA PPC_BIT(1)
126 #define VAS_XLATE_MSR_PR PPC_BIT(2)
127 #define VAS_XLATE_MSR_US PPC_BIT(3)
128 #define VAS_XLATE_MSR_HV PPC_BIT(4)
129 #define VAS_XLATE_MSR_SF PPC_BIT(5)
133 #define VAS_XLATE_LPCR_ISL PPC_BIT(3)
134 #define VAS_XLATE_LPCR_TC PPC_BIT(4)
135 #define VAS_XLATE_LPCR_SC PPC_BIT(5)
171 #define VAS_XTRA_WRITE PPC_BIT(2)
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Dnpu-dma.c470 launch = PPC_BIT(12); in mmio_invalidate_pid()
473 launch |= PPC_BIT(13); in mmio_invalidate_pid()
504 launch |= PPC_BIT(13); in mmio_invalidate_va()
Dvas-window.c1007 #define RMA_LSMP_REPORT_ENABLE PPC_BIT(53)
Dpci-ioda.c2026 #define PHB3_TCE_KILL_INVAL_ALL PPC_BIT(0)
2027 #define PHB3_TCE_KILL_INVAL_PE PPC_BIT(1)
2028 #define PHB3_TCE_KILL_INVAL_ONE PPC_BIT(2)
/arch/powerpc/include/asm/
Dbitops.h51 #define PPC_BIT(bit) (1UL << PPC_BITLSHIFT(bit)) macro
52 #define PPC_BITMASK(bs, be) ((PPC_BIT(bs) - PPC_BIT(be)) | PPC_BIT(bs))
/arch/powerpc/mm/
Dtlb-radix.c62 rb = PPC_BIT(53); /* IS = 1 */ in __tlbiel_pid()
106 rb = PPC_BIT(53); /* IS = 1 */ in __tlbie_pid()
Dhash_native_64.c115 rb = PPC_BIT(52); /* IS = 2 */ in fixup_tlbie_vpn()
/arch/powerpc/kernel/
Dmce_power.c208 #define SRR1_MC_LOADSTORE(srr1) ((srr1) & PPC_BIT(42))
Ddt_cpu_ftrs.c401 hfscr |= PPC_BIT(60); in hfscr_pmu_enable()
/arch/powerpc/kvm/
Dbook3s_hv_rm_mmu.c440 rb = PPC_BIT(52); /* IS = 2 */ in fixup_tlbie_lpid()
/arch/powerpc/lib/
Dsstep.c1084 if (v2 & PPC_BIT(idx)) in do_bpermd()