1 /*
2 * Based on arch/arm/include/asm/ptrace.h
3 *
4 * Copyright (C) 1996-2003 Russell King
5 * Copyright (C) 2012 ARM Ltd.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19 #ifndef __ASM_PTRACE_H
20 #define __ASM_PTRACE_H
21
22 #include <uapi/asm/ptrace.h>
23
24 /* Current Exception Level values, as contained in CurrentEL */
25 #define CurrentEL_EL1 (1 << 2)
26 #define CurrentEL_EL2 (2 << 2)
27
28 /* AArch32-specific ptrace requests */
29 #define COMPAT_PTRACE_GETREGS 12
30 #define COMPAT_PTRACE_SETREGS 13
31 #define COMPAT_PTRACE_GET_THREAD_AREA 22
32 #define COMPAT_PTRACE_SET_SYSCALL 23
33 #define COMPAT_PTRACE_GETVFPREGS 27
34 #define COMPAT_PTRACE_SETVFPREGS 28
35 #define COMPAT_PTRACE_GETHBPREGS 29
36 #define COMPAT_PTRACE_SETHBPREGS 30
37
38 /* SPSR_ELx bits for exceptions taken from AArch32 */
39 #define PSR_AA32_MODE_MASK 0x0000001f
40 #define PSR_AA32_MODE_USR 0x00000010
41 #define PSR_AA32_MODE_FIQ 0x00000011
42 #define PSR_AA32_MODE_IRQ 0x00000012
43 #define PSR_AA32_MODE_SVC 0x00000013
44 #define PSR_AA32_MODE_ABT 0x00000017
45 #define PSR_AA32_MODE_HYP 0x0000001a
46 #define PSR_AA32_MODE_UND 0x0000001b
47 #define PSR_AA32_MODE_SYS 0x0000001f
48 #define PSR_AA32_T_BIT 0x00000020
49 #define PSR_AA32_F_BIT 0x00000040
50 #define PSR_AA32_I_BIT 0x00000080
51 #define PSR_AA32_A_BIT 0x00000100
52 #define PSR_AA32_E_BIT 0x00000200
53 #define PSR_AA32_SSBS_BIT 0x00800000
54 #define PSR_AA32_DIT_BIT 0x01000000
55 #define PSR_AA32_Q_BIT 0x08000000
56 #define PSR_AA32_V_BIT 0x10000000
57 #define PSR_AA32_C_BIT 0x20000000
58 #define PSR_AA32_Z_BIT 0x40000000
59 #define PSR_AA32_N_BIT 0x80000000
60 #define PSR_AA32_IT_MASK 0x0600fc00 /* If-Then execution state mask */
61 #define PSR_AA32_GE_MASK 0x000f0000
62
63 #ifdef CONFIG_CPU_BIG_ENDIAN
64 #define PSR_AA32_ENDSTATE PSR_AA32_E_BIT
65 #else
66 #define PSR_AA32_ENDSTATE 0
67 #endif
68
69 /* AArch32 CPSR bits, as seen in AArch32 */
70 #define COMPAT_PSR_MODE_MASK 0x0000001f
71 #define COMPAT_PSR_MODE_USR 0x00000010
72 #define COMPAT_PSR_MODE_FIQ 0x00000011
73 #define COMPAT_PSR_MODE_IRQ 0x00000012
74 #define COMPAT_PSR_MODE_SVC 0x00000013
75 #define COMPAT_PSR_MODE_ABT 0x00000017
76 #define COMPAT_PSR_MODE_HYP 0x0000001a
77 #define COMPAT_PSR_MODE_UND 0x0000001b
78 #define COMPAT_PSR_MODE_SYS 0x0000001f
79 #define COMPAT_PSR_T_BIT 0x00000020
80 #define COMPAT_PSR_F_BIT 0x00000040
81 #define COMPAT_PSR_I_BIT 0x00000080
82 #define COMPAT_PSR_A_BIT 0x00000100
83 #define COMPAT_PSR_E_BIT 0x00000200
84 #define COMPAT_PSR_DIT_BIT 0x00200000
85 #define COMPAT_PSR_J_BIT 0x01000000
86 #define COMPAT_PSR_Q_BIT 0x08000000
87 #define COMPAT_PSR_V_BIT 0x10000000
88 #define COMPAT_PSR_C_BIT 0x20000000
89 #define COMPAT_PSR_Z_BIT 0x40000000
90 #define COMPAT_PSR_N_BIT 0x80000000
91 #define COMPAT_PSR_IT_MASK 0x0600fc00 /* If-Then execution state mask */
92 #define COMPAT_PSR_GE_MASK 0x000f0000
93
94 #ifdef CONFIG_CPU_BIG_ENDIAN
95 #define COMPAT_PSR_ENDSTATE COMPAT_PSR_E_BIT
96 #else
97 #define COMPAT_PSR_ENDSTATE 0
98 #endif
99
100 /*
101 * These are 'magic' values for PTRACE_PEEKUSR that return info about where a
102 * process is located in memory.
103 */
104 #define COMPAT_PT_TEXT_ADDR 0x10000
105 #define COMPAT_PT_DATA_ADDR 0x10004
106 #define COMPAT_PT_TEXT_END_ADDR 0x10008
107
108 /*
109 * If pt_regs.syscallno == NO_SYSCALL, then the thread is not executing
110 * a syscall -- i.e., its most recent entry into the kernel from
111 * userspace was not via SVC, or otherwise a tracer cancelled the syscall.
112 *
113 * This must have the value -1, for ABI compatibility with ptrace etc.
114 */
115 #define NO_SYSCALL (-1)
116
117 #ifndef __ASSEMBLY__
118 #include <linux/bug.h>
119 #include <linux/types.h>
120
121 /* sizeof(struct user) for AArch32 */
122 #define COMPAT_USER_SZ 296
123
124 /* Architecturally defined mapping between AArch32 and AArch64 registers */
125 #define compat_usr(x) regs[(x)]
126 #define compat_fp regs[11]
127 #define compat_sp regs[13]
128 #define compat_lr regs[14]
129 #define compat_sp_hyp regs[15]
130 #define compat_lr_irq regs[16]
131 #define compat_sp_irq regs[17]
132 #define compat_lr_svc regs[18]
133 #define compat_sp_svc regs[19]
134 #define compat_lr_abt regs[20]
135 #define compat_sp_abt regs[21]
136 #define compat_lr_und regs[22]
137 #define compat_sp_und regs[23]
138 #define compat_r8_fiq regs[24]
139 #define compat_r9_fiq regs[25]
140 #define compat_r10_fiq regs[26]
141 #define compat_r11_fiq regs[27]
142 #define compat_r12_fiq regs[28]
143 #define compat_sp_fiq regs[29]
144 #define compat_lr_fiq regs[30]
145
compat_psr_to_pstate(const unsigned long psr)146 static inline unsigned long compat_psr_to_pstate(const unsigned long psr)
147 {
148 unsigned long pstate;
149
150 pstate = psr & ~COMPAT_PSR_DIT_BIT;
151
152 if (psr & COMPAT_PSR_DIT_BIT)
153 pstate |= PSR_AA32_DIT_BIT;
154
155 return pstate;
156 }
157
pstate_to_compat_psr(const unsigned long pstate)158 static inline unsigned long pstate_to_compat_psr(const unsigned long pstate)
159 {
160 unsigned long psr;
161
162 psr = pstate & ~PSR_AA32_DIT_BIT;
163
164 if (pstate & PSR_AA32_DIT_BIT)
165 psr |= COMPAT_PSR_DIT_BIT;
166
167 return psr;
168 }
169
170 /*
171 * This struct defines the way the registers are stored on the stack during an
172 * exception. Note that sizeof(struct pt_regs) has to be a multiple of 16 (for
173 * stack alignment). struct user_pt_regs must form a prefix of struct pt_regs.
174 */
175 struct pt_regs {
176 union {
177 struct user_pt_regs user_regs;
178 struct {
179 u64 regs[31];
180 u64 sp;
181 u64 pc;
182 u64 pstate;
183 };
184 };
185 u64 orig_x0;
186 #ifdef __AARCH64EB__
187 u32 unused2;
188 s32 syscallno;
189 #else
190 s32 syscallno;
191 u32 unused2;
192 #endif
193
194 u64 orig_addr_limit;
195 u64 unused; // maintain 16 byte alignment
196 u64 stackframe[2];
197 };
198
in_syscall(struct pt_regs const * regs)199 static inline bool in_syscall(struct pt_regs const *regs)
200 {
201 return regs->syscallno != NO_SYSCALL;
202 }
203
forget_syscall(struct pt_regs * regs)204 static inline void forget_syscall(struct pt_regs *regs)
205 {
206 regs->syscallno = NO_SYSCALL;
207 }
208
209 #define MAX_REG_OFFSET offsetof(struct pt_regs, pstate)
210
211 #define arch_has_single_step() (1)
212
213 #ifdef CONFIG_COMPAT
214 #define compat_thumb_mode(regs) \
215 (((regs)->pstate & COMPAT_PSR_T_BIT))
216 #else
217 #define compat_thumb_mode(regs) (0)
218 #endif
219
220 #define user_mode(regs) \
221 (((regs)->pstate & PSR_MODE_MASK) == PSR_MODE_EL0t)
222
223 #define compat_user_mode(regs) \
224 (((regs)->pstate & (PSR_MODE32_BIT | PSR_MODE_MASK)) == \
225 (PSR_MODE32_BIT | PSR_MODE_EL0t))
226
227 #define processor_mode(regs) \
228 ((regs)->pstate & PSR_MODE_MASK)
229
230 #define interrupts_enabled(regs) \
231 (!((regs)->pstate & PSR_I_BIT))
232
233 #define fast_interrupts_enabled(regs) \
234 (!((regs)->pstate & PSR_F_BIT))
235
236 #define GET_USP(regs) \
237 (!compat_user_mode(regs) ? (regs)->sp : (regs)->compat_sp)
238
239 #define SET_USP(ptregs, value) \
240 (!compat_user_mode(regs) ? ((regs)->sp = value) : ((regs)->compat_sp = value))
241
242 extern int regs_query_register_offset(const char *name);
243 extern unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs,
244 unsigned int n);
245
246 /**
247 * regs_get_register() - get register value from its offset
248 * @regs: pt_regs from which register value is gotten
249 * @offset: offset of the register.
250 *
251 * regs_get_register returns the value of a register whose offset from @regs.
252 * The @offset is the offset of the register in struct pt_regs.
253 * If @offset is bigger than MAX_REG_OFFSET, this returns 0.
254 */
regs_get_register(struct pt_regs * regs,unsigned int offset)255 static inline u64 regs_get_register(struct pt_regs *regs, unsigned int offset)
256 {
257 u64 val = 0;
258
259 WARN_ON(offset & 7);
260
261 offset >>= 3;
262 switch (offset) {
263 case 0 ... 30:
264 val = regs->regs[offset];
265 break;
266 case offsetof(struct pt_regs, sp) >> 3:
267 val = regs->sp;
268 break;
269 case offsetof(struct pt_regs, pc) >> 3:
270 val = regs->pc;
271 break;
272 case offsetof(struct pt_regs, pstate) >> 3:
273 val = regs->pstate;
274 break;
275 default:
276 val = 0;
277 }
278
279 return val;
280 }
281
282 /*
283 * Read a register given an architectural register index r.
284 * This handles the common case where 31 means XZR, not SP.
285 */
pt_regs_read_reg(const struct pt_regs * regs,int r)286 static inline unsigned long pt_regs_read_reg(const struct pt_regs *regs, int r)
287 {
288 return (r == 31) ? 0 : regs->regs[r];
289 }
290
291 /*
292 * Write a register given an architectural register index r.
293 * This handles the common case where 31 means XZR, not SP.
294 */
pt_regs_write_reg(struct pt_regs * regs,int r,unsigned long val)295 static inline void pt_regs_write_reg(struct pt_regs *regs, int r,
296 unsigned long val)
297 {
298 if (r != 31)
299 regs->regs[r] = val;
300 }
301
302 /* Valid only for Kernel mode traps. */
kernel_stack_pointer(struct pt_regs * regs)303 static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
304 {
305 return regs->sp;
306 }
307
regs_return_value(struct pt_regs * regs)308 static inline unsigned long regs_return_value(struct pt_regs *regs)
309 {
310 return regs->regs[0];
311 }
312
313 /* We must avoid circular header include via sched.h */
314 struct task_struct;
315 int valid_user_regs(struct user_pt_regs *regs, struct task_struct *task);
316
317 #define GET_IP(regs) ((unsigned long)(regs)->pc)
318 #define SET_IP(regs, value) ((regs)->pc = ((u64) (value)))
319
320 #define GET_FP(ptregs) ((unsigned long)(ptregs)->regs[29])
321 #define SET_FP(ptregs, value) ((ptregs)->regs[29] = ((u64) (value)))
322
323 #include <asm-generic/ptrace.h>
324
325 #define procedure_link_pointer(regs) ((regs)->regs[30])
326
procedure_link_pointer_set(struct pt_regs * regs,unsigned long val)327 static inline void procedure_link_pointer_set(struct pt_regs *regs,
328 unsigned long val)
329 {
330 procedure_link_pointer(regs) = val;
331 }
332
333 #undef profile_pc
334 extern unsigned long profile_pc(struct pt_regs *regs);
335
336 #endif /* __ASSEMBLY__ */
337 #endif
338