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Searched refs:PTRS_PER_PTE (Results 1 – 25 of 113) sorted by relevance

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/arch/m68k/include/asm/
Dpgtable_mm.h57 #define PTRS_PER_PTE 16 macro
62 #define PTRS_PER_PTE 512 macro
67 #define PTRS_PER_PTE 1024 macro
/arch/arm/include/asm/
Dpgtable-2level.h73 #define PTRS_PER_PTE 512 macro
77 #define PTE_HWTABLE_PTRS (PTRS_PER_PTE)
79 #define PTE_HWTABLE_SIZE (PTRS_PER_PTE * sizeof(u32))
Dhighmem.h8 #define LAST_PKMAP PTRS_PER_PTE
/arch/hexagon/include/asm/
Dpgtable.h92 #define PTRS_PER_PTE 1024 macro
96 #define PTRS_PER_PTE 256 macro
100 #define PTRS_PER_PTE 64 macro
104 #define PTRS_PER_PTE 16 macro
108 #define PTRS_PER_PTE 4 macro
446 #define __pte_offset(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
Dmem-layout.h97 #define LAST_PKMAP PTRS_PER_PTE
/arch/m68k/mm/
Dsun3mmu.c66 next_pgtable += PTRS_PER_PTE * sizeof (pte_t); in paging_init()
72 for (i=0; i<PTRS_PER_PTE; ++i, ++pg_table) { in paging_init()
/arch/mn10300/mm/
Dinit.c61 for (loop = VMALLOC_START / (PAGE_SIZE * PTRS_PER_PTE); in paging_init()
62 loop < VMALLOC_END / (PAGE_SIZE * PTRS_PER_PTE); in paging_init()
/arch/tile/include/asm/
Dpgtable_32.h37 #define PTRS_PER_PTE _HV_L2_ENTRIES(HPAGE_SHIFT, PAGE_SHIFT) macro
53 #define LAST_PKMAP PTRS_PER_PTE
/arch/xtensa/mm/
Dmmu.c29 n_pages = ALIGN(n_pages, PTRS_PER_PTE); in init_pmd()
39 for (i = 0; i < n_pages; i += PTRS_PER_PTE, ++pmd) { in init_pmd()
/arch/mips/include/asm/
Dpgtable-64.h143 #define PTRS_PER_PTE ((PAGE_SIZE << PTE_ORDER) / sizeof(pte_t)) macro
156 min(PTRS_PER_PGD * PTRS_PER_PUD * PTRS_PER_PMD * PTRS_PER_PTE * PAGE_SIZE, \
179 extern pte_t invalid_pte_table[PTRS_PER_PTE];
180 extern pte_t empty_bad_page_table[PTRS_PER_PTE];
358 (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
/arch/unicore32/include/asm/
Dpgalloc.h43 clean_dcache_area(pte, PTRS_PER_PTE * sizeof(pte_t)); in pte_alloc_one_kernel()
58 clean_dcache_area(page, PTRS_PER_PTE * sizeof(pte_t)); in pte_alloc_one()
/arch/arc/mm/
Dhighmem.c136 BUILD_BUG_ON(KM_TYPE_NR > PTRS_PER_PTE); in kmap_init()
139 BUILD_BUG_ON(LAST_PKMAP > PTRS_PER_PTE); in kmap_init()
/arch/s390/mm/
Dpgalloc.c166 clear_table(table + PTRS_PER_PTE, 0, PAGE_SIZE/2); in page_table_alloc_pgste()
200 table += PTRS_PER_PTE; in page_table_alloc()
224 clear_table(table + PTRS_PER_PTE, 0, PAGE_SIZE/2); in page_table_alloc()
244 bit = (__pa(table) & ~PAGE_MASK)/(PTRS_PER_PTE*sizeof(pte_t)); in page_table_free()
276 bit = (__pa(table) & ~PAGE_MASK) / (PTRS_PER_PTE*sizeof(pte_t)); in page_table_free_rcu()
Dpageattr.c74 mask = ~(PTRS_PER_PTE * sizeof(pte_t) - 1); in pgt_set()
129 for (i = 0; i < PTRS_PER_PTE; i++) { in split_pmd_page()
136 update_page_count(PG_DIRECT_MAP_4K, PTRS_PER_PTE); in split_pmd_page()
357 nr = PTRS_PER_PTE - (nr & (PTRS_PER_PTE - 1)); in __kernel_map_pages()
/arch/powerpc/mm/
Dsubpage-prot.c120 i = (addr >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); in subpage_prot_clear()
121 nw = PTRS_PER_PTE - i; in subpage_prot_clear()
246 i = (addr >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); in sys_subpage_prot()
247 nw = PTRS_PER_PTE - i; in sys_subpage_prot()
/arch/x86/include/asm/
Dpgtable-2level_types.h36 #define PTRS_PER_PTE 1024 macro
Dpgtable-3level_types.h45 #define PTRS_PER_PTE 512 macro
/arch/arc/include/asm/
Dpgalloc.h90 return get_order(PTRS_PER_PTE * sizeof(pte_t)); in __get_order_pte()
113 memzero((void *)pte_pg, PTRS_PER_PTE * sizeof(pte_t)); in pte_alloc_one()
/arch/x86/power/
Dhibernate_32.c114 pfn += PTRS_PER_PTE; in resume_physical_mapping_init()
122 max_pte = pte + PTRS_PER_PTE; in resume_physical_mapping_init()
/arch/metag/include/asm/
Dhighmem.h28 #define LAST_PKMAP PTRS_PER_PTE
/arch/arm64/include/asm/
Dpgtable-hwdef.h52 #define PTRS_PER_PTE (1 << (PAGE_SHIFT - 3)) macro
61 #define PTRS_PER_PMD PTRS_PER_PTE
71 #define PTRS_PER_PUD PTRS_PER_PTE
/arch/powerpc/include/asm/nohash/64/
Dpgtable-64k.h32 #define PTRS_PER_PTE (1 << PTE_INDEX_SIZE) macro
/arch/nios2/include/asm/
Dpgtable.h78 #define PTRS_PER_PTE ((PAGE_SIZE << PTE_ORDER) / sizeof(pte_t)) macro
256 (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)))
264 (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)))
/arch/um/include/asm/
Dpgtable-2level.h24 #define PTRS_PER_PTE 1024 macro
/arch/score/mm/
Dinit.c109 pte_t invalid_pte_table[PTRS_PER_PTE] __page_aligned(PTE_ORDER);

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