| /arch/cris/arch-v32/mach-fs/ |
| D | hw_settings.S | 33 .dword REG_ADDR(bif_core, regi_bif_core, rw_grp1_cfg)
35 .dword REG_ADDR(bif_core, regi_bif_core, rw_grp2_cfg)
37 .dword REG_ADDR(bif_core, regi_bif_core, rw_grp3_cfg)
39 .dword REG_ADDR(bif_core, regi_bif_core, rw_grp4_cfg)
41 .dword REG_ADDR(bif_core, regi_bif_core, rw_sdram_cfg_grp0)
43 .dword REG_ADDR(bif_core, regi_bif_core, rw_sdram_cfg_grp1)
45 .dword REG_ADDR(bif_core, regi_bif_core, rw_sdram_timing)
47 .dword REG_ADDR(bif_core, regi_bif_core, rw_sdram_cmd)
50 .dword REG_ADDR(gio, regi_gio, rw_pa_dout)
52 .dword REG_ADDR(gio, regi_gio, rw_pa_oe)
[all …]
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| D | dram_init.S | 29 move.d REG_ADDR(bif_core, regi_bif_core, rw_sdram_cfg_grp0), $r0
32 move.d REG_ADDR(bif_core, regi_bif_core, rw_sdram_cfg_grp1), $r0
69 move.d REG_ADDR(bif_core, regi_bif_core, rw_sdram_timing), $r0
73 move.d REG_ADDR(bif_core, regi_bif_core, rw_sdram_cmd), $r5
99 move.d REG_ADDR(bif_core, regi_bif_core, rw_sdram_timing), $r0
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| /arch/cris/arch-v32/mach-a3/ |
| D | hw_settings.S | 33 .dword REG_ADDR(ddr2, regi_ddr2_ctrl, rw_cfg)
35 .dword REG_ADDR(ddr2, regi_ddr2_ctrl, rw_latency)
37 .dword REG_ADDR(ddr2, regi_ddr2_ctrl, rw_timing)
41 .dword REG_ADDR(gio, regi_gio, rw_pa_dout)
43 .dword REG_ADDR(gio, regi_gio, rw_pa_oe)
45 .dword REG_ADDR(gio, regi_gio, rw_pb_dout)
47 .dword REG_ADDR(gio, regi_gio, rw_pb_oe)
49 .dword REG_ADDR(gio, regi_gio, rw_pc_dout)
51 .dword REG_ADDR(gio, regi_gio, rw_pc_oe)
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| D | dram_init.S | 34 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_phy_cfg), $r0
44 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_phy_ctrl), $r0
57 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_ctrl), $r0
75 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_timing), $r0
80 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_latency), $r0
85 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_cfg), $r0
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| /arch/cris/include/arch-v32/mach-fs/mach/ |
| D | startup.inc | 11 move.d REG_ADDR(gio, regi_gio, rw_pa_dout), $r1
15 move.d REG_ADDR(gio, regi_gio, rw_pa_oe), $r1
19 move.d REG_ADDR(gio, regi_gio, rw_pb_dout), $r1
23 move.d REG_ADDR(gio, regi_gio, rw_pb_oe), $r1
27 move.d REG_ADDR(gio, regi_gio, rw_pc_dout), $r1
31 move.d REG_ADDR(gio, regi_gio, rw_pc_oe), $r1
35 move.d REG_ADDR(gio, regi_gio, rw_pd_dout), $r1
39 move.d REG_ADDR(gio, regi_gio, rw_pd_oe), $r1
43 move.d REG_ADDR(gio, regi_gio, rw_pe_dout), $r1
47 move.d REG_ADDR(gio, regi_gio, rw_pe_oe), $r1
[all …]
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| /arch/cris/include/arch-v32/mach-a3/mach/ |
| D | startup.inc | 19 move.d REG_ADDR(gio, regi_gio, rw_pa_dout), $r1
23 move.d REG_ADDR(gio, regi_gio, rw_pa_oe), $r1
27 move.d REG_ADDR(gio, regi_gio, rw_pb_dout), $r1
31 move.d REG_ADDR(gio, regi_gio, rw_pb_oe), $r1
35 move.d REG_ADDR(gio, regi_gio, rw_pc_dout), $r1
39 move.d REG_ADDR(gio, regi_gio, rw_pc_oe), $r1
43 move.d REG_ADDR(pinmux, regi_pinmux, rw_gio_pa), $r1
45 move.d REG_ADDR(pinmux, regi_pinmux, rw_gio_pc), $r1
52 move.d REG_ADDR(pinmux, regi_pinmux, rw_hwprot), $r1
60 move.d REG_ADDR(pinmux, regi_pinmux, rw_gio_pb), $r1
[all …]
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| /arch/cris/arch-v32/drivers/mach-a3/ |
| D | nandflash.c | 66 this->IO_ADDR_W = (void __iomem *)REG_ADDR(pio, in crisv32_hwcontrol()
70 this->IO_ADDR_W = (void __iomem *)REG_ADDR(pio, in crisv32_hwcontrol()
74 this->IO_ADDR_W = (void __iomem *)REG_ADDR(pio, in crisv32_hwcontrol()
145 read_cs = write_cs = (void __iomem *)REG_ADDR(pio, regi_pio, in crisv32_nand_flash_probe()
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| /arch/cris/include/arch-v32/mach-a3/mach/hwregs/iop/asm/ |
| D | iop_version_defs_asm.h | 41 #ifndef REG_ADDR
42 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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| D | iop_sap_in_defs_asm.h | 41 #ifndef REG_ADDR
42 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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| /arch/cris/include/arch-v32/arch/hwregs/iop/asm/ |
| D | iop_version_defs_asm.h | 44 #ifndef REG_ADDR
45 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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| D | iop_scrc_out_defs_asm.h | 44 #ifndef REG_ADDR
45 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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| D | iop_scrc_in_defs_asm.h | 44 #ifndef REG_ADDR
45 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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| /arch/cris/include/arch-v32/arch/hwregs/asm/ |
| D | irq_nmi_defs_asm.h | 44 #ifndef REG_ADDR
45 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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| D | strcop_defs_asm.h | 44 #ifndef REG_ADDR
45 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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| D | cris_defs_asm.h | 44 #ifndef REG_ADDR
45 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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| D | strmux_defs_asm.h | 44 #ifndef REG_ADDR
45 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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| D | rt_trace_defs_asm.h | 44 #ifndef REG_ADDR
45 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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| D | config_defs_asm.h | 44 #ifndef REG_ADDR
45 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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| /arch/cris/include/arch-v32/arch/hwregs/ |
| D | irq_nmi_defs.h | 75 #ifndef REG_ADDR
76 #define REG_ADDR( scope, inst, reg ) \ macro
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| D | strcop_defs.h | 75 #ifndef REG_ADDR
76 #define REG_ADDR( scope, inst, reg ) \ macro
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| /arch/cris/include/arch-v32/mach-a3/mach/hwregs/iop/ |
| D | iop_version_defs.h | 72 #ifndef REG_ADDR
73 #define REG_ADDR( scope, inst, reg ) \ macro
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| /arch/cris/include/arch-v32/arch/hwregs/iop/ |
| D | iop_version_defs.h | 75 #ifndef REG_ADDR
76 #define REG_ADDR( scope, inst, reg ) \ macro
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| /arch/cris/include/arch-v32/mach-fs/mach/hwregs/asm/ |
| D | config_defs_asm.h | 44 #ifndef REG_ADDR
45 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
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| /arch/cris/include/arch-v32/mach-a3/mach/hwregs/ |
| D | strmux_defs.h | 72 #ifndef REG_ADDR
73 #define REG_ADDR( scope, inst, reg ) \ macro
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| /arch/cris/include/arch-v32/mach-fs/mach/hwregs/ |
| D | strmux_defs.h | 75 #ifndef REG_ADDR
76 #define REG_ADDR( scope, inst, reg ) \ macro
|