| /arch/cris/arch-v32/kernel/ |
| D | irq.c | 215 REG_WR_INT_VECT(intr_vect, irq_regs[cpu], rw_mask, in block_irq()
221 REG_WR_INT_VECT(intr_vect, irq_regs[cpu], rw_mask, in block_irq()
239 REG_WR_INT_VECT(intr_vect, irq_regs[cpu], rw_mask, in unblock_irq()
245 REG_WR_INT_VECT(intr_vect, irq_regs[cpu], rw_mask, in unblock_irq()
394 REG_WR_INT_VECT(intr_vect, irq_regs[cpu], rw_mask, i, mask); in crisv32_do_multiple()
427 REG_WR_INT_VECT(intr_vect, irq_regs[cpu], rw_mask, i, mask); in crisv32_do_multiple()
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| /arch/cris/include/arch-v32/arch/hwregs/ |
| D | irq_nmi_defs.h | 60 #ifndef REG_WR_INT_VECT
61 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| D | strcop_defs.h | 60 #ifndef REG_WR_INT_VECT
61 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| D | marb_defs.h | 60 #ifndef REG_WR_INT_VECT
61 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
319 #ifndef REG_WR_INT_VECT
320 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| D | config_defs.h | 60 #ifndef REG_WR_INT_VECT
61 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| D | rt_trace_defs.h | 60 #ifndef REG_WR_INT_VECT
61 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| D | marb_bp_defs.h | 60 #ifndef REG_WR_INT_VECT
61 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| /arch/cris/include/arch-v32/mach-a3/mach/hwregs/iop/ |
| D | iop_version_defs.h | 57 #ifndef REG_WR_INT_VECT
58 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| D | iop_sap_in_defs.h | 57 #ifndef REG_WR_INT_VECT
58 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| /arch/cris/include/arch-v32/arch/hwregs/iop/ |
| D | iop_version_defs.h | 60 #ifndef REG_WR_INT_VECT
61 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| D | iop_scrc_in_defs.h | 60 #ifndef REG_WR_INT_VECT
61 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| D | iop_scrc_out_defs.h | 60 #ifndef REG_WR_INT_VECT
61 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| D | iop_trigger_grp_defs.h | 60 #ifndef REG_WR_INT_VECT
61 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| D | iop_fifo_out_extra_defs.h | 60 #ifndef REG_WR_INT_VECT
61 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| D | iop_fifo_in_extra_defs.h | 60 #ifndef REG_WR_INT_VECT
61 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| D | iop_sap_in_defs.h | 60 #ifndef REG_WR_INT_VECT
61 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| D | iop_mpu_defs.h | 60 #ifndef REG_WR_INT_VECT
61 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| /arch/cris/include/arch-v32/mach-a3/mach/hwregs/ |
| D | strmux_defs.h | 57 #ifndef REG_WR_INT_VECT
58 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| D | marb_bar_defs.h | 57 #ifndef REG_WR_INT_VECT
58 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
341 #ifndef REG_WR_INT_VECT
342 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| D | l2cache_defs.h | 57 #ifndef REG_WR_INT_VECT
58 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| D | clkgen_defs.h | 57 #ifndef REG_WR_INT_VECT
58 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| /arch/cris/include/arch-v32/mach-fs/mach/hwregs/ |
| D | strmux_defs.h | 60 #ifndef REG_WR_INT_VECT
61 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| D | marb_defs.h | 60 #ifndef REG_WR_INT_VECT
61 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
319 #ifndef REG_WR_INT_VECT
320 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| D | config_defs.h | 60 #ifndef REG_WR_INT_VECT
61 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| D | marb_bp_defs.h | 60 #ifndef REG_WR_INT_VECT
61 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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