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Searched refs:RESET (Results 1 – 14 of 14) sorted by relevance

/arch/mips/cobalt/
Dreset.c21 #define RESET 0x0f macro
48 writeb(RESET, RESET_PORT); in cobalt_machine_restart()
/arch/c6x/kernel/
Dvectors.S12 ; At RESET the processor sets up the DRAM timing parameters and
47 .global RESET symbol
48 .hidden RESET
49 RESET: label
/arch/blackfin/mach-bf548/include/mach/
DdefBF542.h494 #define RESET 0x8 /* Reset indicator */ macro
DdefBF547.h771 #define RESET 0x8 /* Reset indicator */ macro
/arch/blackfin/mach-bf527/include/mach/
DdefBF525.h265 #define RESET 0x8 /* Reset indicator */ macro
/arch/arm/boot/dts/
Dimx6ul-tx6ul.dtsi750 MX6UL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x0b0b0 /* ETN PHY RESET */
762 MX6UL_PAD_CSI_DATA07__GPIO4_IO28 0x0b0b0 /* ETN PHY RESET */
967 /* eMMC RESET */
Dimx53-tx53-x03x.dts191 regulator-name = "LCD RESET";
Dimx28-tx28.dts115 regulator-name = "LCD RESET";
517 MX28_PAD_SSP0_DATA6__GPIO_2_6 /* RESET */
Dste-hrefv60plus.dtsi248 /* NFC ENA and RESET to low, pulldown IRQ line */
Dimx6ul-14x14-evk.dts455 MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x17059 /* SD1 RESET */
Dimx6qdl-tx6.dtsi335 MX6QDL_PAD_SD3_DAT2__GPIO7_IO06 0x1b0b1 /* ETN PHY RESET */
/arch/blackfin/mach-bf518/
DKconfig142 bool "Enable Hysteresis on {NMI, RESET, BMODE}"
/arch/blackfin/mach-bf527/
DKconfig144 bool "Enable Hysteresis on {NMI, RESET, BMODE}"
/arch/blackfin/
DKconfig.debug61 - RESET exactly when double fault occurs. The excepting