Home
last modified time | relevance | path

Searched refs:SPRN_MMCR0 (Results 1 – 13 of 13) sorted by relevance

/arch/powerpc/kernel/
Dpmc.c34 mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) & ~(MMCR0_PMXE|MMCR0_PMAO)); in dummy_perf()
36 mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) & ~MMCR0_PMXE); in dummy_perf()
Dcpu_setup_power.S260 mtspr SPRN_MMCR0,r5
Ddt_cpu_ftrs.c413 mtspr(SPRN_MMCR0, 0); in init_pmu_power8()
453 mtspr(SPRN_MMCR0, 0); in init_pmu_power9()
Didle_book3s.S376 mfspr r4,SPRN_MMCR0
577 mtspr SPRN_MMCR0,r4
Dsysfs.c467 SYSFS_PMCSETUP(mmcr0, SPRN_MMCR0);
/arch/powerpc/oprofile/
Dop_model_power4.c182 mtspr(SPRN_MMCR0, mmcr0); in power4_cpu_setup()
186 mtspr(SPRN_MMCR0, mmcr0); in power4_cpu_setup()
195 mfspr(SPRN_MMCR0)); in power4_cpu_setup()
220 mmcr0 = mfspr(SPRN_MMCR0); in power4_start()
234 mtspr(SPRN_MMCR0, mmcr0); in power4_start()
247 mmcr0 = mfspr(SPRN_MMCR0); in power4_stop()
249 mtspr(SPRN_MMCR0, mmcr0); in power4_stop()
412 mmcr0 = mfspr(SPRN_MMCR0); in power4_handle_interrupt()
433 mtspr(SPRN_MMCR0, mmcr0); in power4_handle_interrupt()
Dop_model_7450.c61 u32 mmcr0 = mfspr(SPRN_MMCR0); in pmc_start_ctrs()
66 mtspr(SPRN_MMCR0, mmcr0); in pmc_start_ctrs()
72 u32 mmcr0 = mfspr(SPRN_MMCR0); in pmc_stop_ctrs()
77 mtspr(SPRN_MMCR0, mmcr0); in pmc_stop_ctrs()
87 mtspr(SPRN_MMCR0, mmcr0_val); in fsl7450_cpu_setup()
/arch/powerpc/kvm/
Dbook3s_hv_interrupts.S75 mfspr r7, SPRN_MMCR0 /* save MMCR0 */
76 mtspr SPRN_MMCR0, r3 /* freeze all counters, disable interrupts */
Dbook3s_emulate.c498 case SPRN_MMCR0: in kvmppc_core_emulate_mtspr_pr()
649 case SPRN_MMCR0: in kvmppc_core_emulate_mfspr_pr()
Dbook3s_hv_rmhandlers.S140 mtspr SPRN_MMCR0, r3
785 mtspr SPRN_MMCR0, r3 /* freeze all counters, disable ints */
828 mtspr SPRN_MMCR0, r3
1696 mfspr r4, SPRN_MMCR0 /* save MMCR0 */
1697 mtspr SPRN_MMCR0, r3 /* freeze all counters, disable ints */
3205 mtspr SPRN_MMCR0, r3
/arch/powerpc/perf/
Dcore-book3s.c700 mtspr(SPRN_MMCR0, MMCR0_PMXE | MMCR0_PMCjCE | MMCR0_PMAO); in pmao_restore_workaround()
703 mtspr(SPRN_MMCR0, MMCR0_FC | MMCR0_PMAO); in pmao_restore_workaround()
837 mfspr(SPRN_MMCR0), mfspr(SPRN_MMCR1), mfspr(SPRN_MMCRA)); in perf_event_print_debug()
1171 mtspr(SPRN_MMCR0, mmcr0); in write_mmcr0()
1185 "i" (SPRN_MMCR0), in write_mmcr0()
1198 mtspr(SPRN_MMCR0, mmcr0); in write_mmcr0()
1227 val = mmcr0 = mfspr(SPRN_MMCR0); in power_pmu_disable()
1360 mtspr(SPRN_MMCR0, (cpuhw->mmcr[0] & ~(MMCR0_PMC1CE | MMCR0_PMCjCE)) in power_pmu_enable()
/arch/powerpc/include/asm/
Dreg.h787 #define SPRN_MMCR0 795 macro
963 #define SPRN_MMCR0 952 /* Monitor Mode Control Register 0 */ macro
/arch/powerpc/xmon/
Dxmon.c1801 mfspr(SPRN_MMCR0), mfspr(SPRN_MMCR1), mfspr(SPRN_MMCR2)); in dump_207_sprs()