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Searched refs:SVC_MODE (Results 1 – 23 of 23) sorted by relevance

/arch/arm/include/uapi/asm/
Dptrace.h50 #define SVC_MODE 0x00000000 macro
53 #define SVC_MODE 0x00000013 macro
/arch/arm/plat-iop/
Dcp6.c44 .cpsr_val = SVC_MODE,
/arch/arm/include/asm/
Dperf_event.h26 (regs)->ARM_cpsr = SVC_MODE; \
Dvirt.h58 #define __boot_cpu_mode (SVC_MODE)
Dassembler.h105 msr cpsr_c, #PSR_I_BIT | SVC_MODE
109 msr cpsr_c, #SVC_MODE
350 orr \reg , \reg , #PSR_I_BIT | PSR_F_BIT | SVC_MODE
365 setmode PSR_F_BIT | PSR_I_BIT | SVC_MODE, \reg
/arch/arm/kvm/
Dreset.c37 .usr_regs.ARM_cpsr = SVC_MODE | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT,
Demulate.c119 case USR_MODE...SVC_MODE: in vcpu_reg()
149 case SVC_MODE: in vcpu_spsr()
Dguest.c95 case SVC_MODE: in set_core_reg()
/arch/arm/mach-s3c24xx/
Dsleep.S57 mov r0, #PSR_I_BIT | PSR_F_BIT | SVC_MODE
/arch/arm/mach-rockchip/
Dsleep.S29 setmode PSR_I_BIT | PSR_F_BIT | SVC_MODE, r1 @ set svc, irqs off
/arch/arm/mach-s3c64xx/
Dsleep.S43 msr cpsr_c, #PSR_I_BIT | PSR_F_BIT | SVC_MODE
/arch/arm/kernel/
Dkgdb.c165 .cpsr_val = SVC_MODE,
173 .cpsr_val = SVC_MODE,
Dentry-header.S179 eor \rtemp, \rtemp, #(SVC_MODE ^ SYSTEM_MODE)
185 eor \rtemp, \rtemp, #(SVC_MODE ^ SYSTEM_MODE)
191 eor \rtemp, \rtemp, #(SVC_MODE ^ SYSTEM_MODE)
197 eor \rtemp, \rtemp, #(SVC_MODE ^ SYSTEM_MODE)
Dentry-armv.S350 ARM( msr cpsr_c, #SVC_MODE | PSR_I_BIT | PSR_F_BIT )
351 THUMB( mov r0, #SVC_MODE | PSR_I_BIT | PSR_F_BIT )
364 ARM( msr cpsr_c, #SVC_MODE | PSR_I_BIT | PSR_F_BIT )
365 THUMB( mov r0, #SVC_MODE | PSR_I_BIT | PSR_F_BIT )
1057 eor r0, r0, #(\mode ^ SVC_MODE | PSR_ISETSTATE)
Dhead-nommu.S55 setmode PSR_F_BIT | PSR_I_BIT | SVC_MODE, r9 @ ensure svc mode
99 setmode PSR_F_BIT | PSR_I_BIT | SVC_MODE, r9
Dtcm.c248 .cpsr_val = SVC_MODE,
Dprocess.c258 childregs->ARM_cpsr = SVC_MODE; in copy_thread()
Dtraps.c446 if (processor_mode(regs) == SVC_MODE) { in do_undefinstr()
Dsetup.c582 PLC (PSR_F_BIT | PSR_I_BIT | SVC_MODE) in cpu_init()
/arch/arm/probes/kprobes/
Dcore.c648 .cpsr_val = SVC_MODE,
656 .cpsr_val = SVC_MODE,
666 .cpsr_val = SVC_MODE,
/arch/arm/kvm/hyp/
Dhyp-entry.S174 orr lr, lr, #SVC_MODE
/arch/arm/mm/
Dproc-xsc3.S110 mov r1, #PSR_F_BIT|PSR_I_BIT|SVC_MODE
451 mov r0, #PSR_F_BIT|PSR_I_BIT|SVC_MODE
Dproc-xscale.S148 mov r1, #PSR_F_BIT|PSR_I_BIT|SVC_MODE