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Searched refs:TTBCR (Results 1 – 5 of 5) sorted by relevance

/arch/arm/mm/
Dproc-v7-3level.S142 orrls \tmp, \tmp, #TTBR1_SIZE @ TTBCR.T1SZ
143 mcr p15, 0, \tmp, c2, c0, 2 @ TTBCR
Dproc-v7.S512 v7_ttb_setup r10, r4, r5, r8, r3 @ TTBCR, TTBRx setup
/arch/arm/kvm/hyp/
Dcp15-sr.c36 ctxt->cp15[c2_TTBCR] = read_sysreg(TTBCR); in __sysreg_save_state()
65 write_sysreg(ctxt->cp15[c2_TTBCR], TTBCR); in __sysreg_restore_state()
/arch/arm/kvm/
Dinit.S80 @ settings as the non-secure TTBCR and with T0SZ == 0.
84 mrc p15, 0, r1, c2, c0, 2 @ TTBCR
/arch/arm/include/asm/
Dkvm_hyp.h57 #define TTBCR __ACCESS_CP15(c2, 0, c0, 2) macro