Searched refs:X1 (Results 1 – 6 of 6) sorted by relevance
/arch/c6x/lib/ |
D | mpyll.S | 31 ;; P1 = X0*Y1 + X1*Y0 32 ;; P2 = X1*Y1
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/arch/x86/crypto/ |
D | sha256-ssse3-asm.S | 75 X1 = %xmm5 define 127 X0 = X1 128 X1 = X2 define 159 movdqa X1, XTMP1 393 COPY_XMM_AND_BSWAP X1, 1*16(INP), BYTE_FLIP_MASK 435 paddd 1*16(TBL), X1 436 movdqa X1, _XFER(%rsp) 444 movdqa X3, X1
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D | sha256-avx-asm.S | 82 X1 = %xmm5 define 134 X0 = X1 135 X1 = X2 define 173 vpalignr $4, X0, X1, XTMP1 # XTMP1 = W[-15] 386 COPY_XMM_AND_BSWAP X1, 1*16(INP), BYTE_FLIP_MASK 425 vpaddd 1*16(TBL), X1, XFER 434 vmovdqa X3, X1
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D | sha256-avx2-asm.S | 69 X1 = %ymm5 define 135 X0 = X1 136 X1 = X2 define 180 vpalignr $4, X0, X1, XTMP1 # XTMP1 = W[-15] 582 vperm2i128 $0x31, XTMP2, XTMP0, X1 621 vpaddd K256+1*32(SRND), X1, XFER 627 vmovdqa X3, X1
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/arch/ia64/kernel/ |
D | unwind_decoder.c | 96 UNW_DEC_SPILL_SPREL(X1, t, abreg, off, arg); in unw_decode_x1() 98 UNW_DEC_SPILL_PSPREL(X1, t, abreg, off, arg); in unw_decode_x1()
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/arch/mips/include/asm/ |
D | mipsregs.h | 2458 _ASM_INSN_IF_MIPS(0x00000810 | %X1) \ 2473 _ASM_INSN_IF_MIPS(0x00200011 | %X1) \
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