Searched refs:___PPC_RS (Results 1 – 5 of 5) sorted by relevance
/arch/powerpc/net/ |
D | bpf_jit.h | 52 #define PPC_STD(r, base, i) EMIT(PPC_INST_STD | ___PPC_RS(r) | \ 54 #define PPC_STDX(r, base, b) EMIT(PPC_INST_STDX | ___PPC_RS(r) | \ 56 #define PPC_STDU(r, base, i) EMIT(PPC_INST_STDU | ___PPC_RS(r) | \ 58 #define PPC_STW(r, base, i) EMIT(PPC_INST_STW | ___PPC_RS(r) | \ 60 #define PPC_STWU(r, base, i) EMIT(PPC_INST_STWU | ___PPC_RS(r) | \ 62 #define PPC_STH(r, base, i) EMIT(PPC_INST_STH | ___PPC_RS(r) | \ 64 #define PPC_STB(r, base, i) EMIT(PPC_INST_STB | ___PPC_RS(r) | \ 88 #define PPC_BPF_STWCX(s, a, b) EMIT(PPC_INST_STWCX | ___PPC_RS(s) | \ 90 #define PPC_BPF_STDCX(s, a, b) EMIT(PPC_INST_STDCX | ___PPC_RS(s) | \ 122 ___PPC_RS(a) | ___PPC_RB(b)) [all …]
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/arch/powerpc/kernel/ |
D | optprobes.c | 170 ___PPC_RS(4) | (val & 0xffff)); in patch_imm32_load_insns() 186 ___PPC_RS(3) | ((val >> 32) & 0xffff)); in patch_imm64_load_insns() 191 ___PPC_RS(3) | __PPC_SH64(32) | __PPC_ME64(31)); in patch_imm64_load_insns() 196 ___PPC_RS(3) | ((val >> 16) & 0xffff)); in patch_imm64_load_insns() 201 ___PPC_RS(3) | (val & 0xffff)); in patch_imm64_load_insns()
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/arch/powerpc/include/asm/ |
D | ppc-opcode.h | 364 #define ___PPC_RS(s) (((s) & 0x1f) << 21) macro 365 #define ___PPC_RT(t) ___PPC_RS(t) 372 #define __PPC_RS(s) ___PPC_RS(__REG_##s) 451 ___PPC_RB(a) | ___PPC_RS(lp)) 454 ___PPC_RB(rb) | ___PPC_RS(rs) | \ 459 ___PPC_RB(rb) | ___PPC_RS(rs) | \ 537 TMRN(tmr) | ___PPC_RS(r)) 543 ___PPC_RS(s) | \ 547 ___PPC_RS(s) | \
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D | code-patching.h | 164 #define PPC_INST_STD_LR (PPC_INST_STD | ___PPC_RS(__REG_R0) | \
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/arch/powerpc/lib/ |
D | test_emulate_step.c | 30 #define TEST_STD(r, base, i) (PPC_INST_STD | ___PPC_RS(r) | \ 35 #define TEST_STDCX(s, a, b) (PPC_INST_STDCX | ___PPC_RS(s) | \ 39 #define TEST_STFSX(s, a, b) (PPC_INST_STFSX | ___PPC_RS(s) | \ 43 #define TEST_STFDX(s, a, b) (PPC_INST_STFDX | ___PPC_RS(s) | \ 47 #define TEST_STVX(s, a, b) (PPC_INST_STVX | ___PPC_RS(s) | \
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