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Searched refs:__cacheline_aligned (Results 1 – 25 of 25) sorted by relevance

/arch/blackfin/include/asm/
Dcache.h23 #define __cacheline_aligned macro
31 #define __cacheline_aligned \ macro
/arch/ia64/include/asm/
Dnuma.h25 extern u16 cpu_to_node_map[NR_CPUS] __cacheline_aligned;
26 extern cpumask_t node_to_cpu_mask[MAX_NUMNODES] __cacheline_aligned;
/arch/ia64/kernel/
Dnuma.c27 u16 cpu_to_node_map[NR_CPUS] __cacheline_aligned;
30 cpumask_t node_to_cpu_mask[MAX_NUMNODES] __cacheline_aligned;
Dsal.c21 __cacheline_aligned DEFINE_SPINLOCK(sal_lock);
Dtraps.c285 static struct fpu_swa_msg last __cacheline_aligned; variable
Dsmpboot.c118 cpumask_t cpu_core_map[NR_CPUS] __cacheline_aligned;
/arch/h8300/include/asm/
Dcache.h9 #define __cacheline_aligned macro
/arch/frv/include/asm/
Dcache.h20 #define __cacheline_aligned __attribute__((aligned(L1_CACHE_BYTES))) macro
/arch/hexagon/include/asm/
Dcache.h30 #define __cacheline_aligned __aligned(L1_CACHE_BYTES) macro
/arch/nios2/include/asm/
Dcache.h33 #define __cacheline_aligned macro
/arch/powerpc/platforms/pseries/
Dio_event_irq.c66 static char ioei_rtas_buf[RTAS_DATA_BUF_SIZE] __cacheline_aligned;
/arch/x86/kernel/
Ddoublefault.c53 struct x86_hw_tss doublefault_tss __cacheline_aligned = { variable
Dhpet.c787 static union hpet_lock hpet __cacheline_aligned = { variable
/arch/mips/vr41xx/common/
Dirq.c31 static irq_cascade_t irq_cascade[NR_IRQS] __cacheline_aligned;
/arch/arm64/kernel/
Dsetup.c93 u64 __cacheline_aligned boot_args[4];
/arch/mn10300/kernel/
Dsmp.c92 struct mn10300_cpuinfo cpu_data[NR_CPUS] __cacheline_aligned;
1077 __cacheline_aligned; in hotplug_cpu_nmi_call_function() local
/arch/m32r/kernel/
Dsmpboot.c84 struct cpuinfo_m32r cpu_data[NR_CPUS] __cacheline_aligned;
/arch/sh/mm/
Dcache-sh5.c235 static unsigned char dummy_alloco_area[DUMMY_ALLOCO_AREA_SIZE] __cacheline_aligned = { 0, };
/arch/ia64/sn/kernel/sn2/
Dsn2_smp.c48 static __cacheline_aligned DEFINE_SPINLOCK(sn2_global_ptc_lock);
/arch/xtensa/kernel/
Dsmp.c192 unsigned long cpu_start_id __cacheline_aligned; variable
/arch/alpha/kernel/
Dsmp.c62 } ipi_data[NR_CPUS] __cacheline_aligned;
Dsmc37c669.c1094 static __cacheline_aligned DEFINE_SPINLOCK(smc_lock);
/arch/sparc/kernel/
Dtime_64.c196 static struct sparc64_tick_ops tick_operations __cacheline_aligned = { variable
/arch/powerpc/kernel/
Drtas.c58 char rtas_data_buf[RTAS_DATA_BUF_SIZE] __cacheline_aligned;
Dprom_init.c751 struct ibm_arch_vec __cacheline_aligned ibm_architecture_vec = {