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Searched refs:ack (Results 1 – 25 of 43) sorted by relevance

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/arch/m68k/coldfire/
Dintc-5272.c41 unsigned char ack; member
45 /*MCF_IRQ_SPURIOUS*/ { .icr = 0, .index = 0, .ack = 0, },
46 /*MCF_IRQ_EINT1*/ { .icr = MCFSIM_ICR1, .index = 28, .ack = 1, },
47 /*MCF_IRQ_EINT2*/ { .icr = MCFSIM_ICR1, .index = 24, .ack = 1, },
48 /*MCF_IRQ_EINT3*/ { .icr = MCFSIM_ICR1, .index = 20, .ack = 1, },
49 /*MCF_IRQ_EINT4*/ { .icr = MCFSIM_ICR1, .index = 16, .ack = 1, },
50 /*MCF_IRQ_TIMER1*/ { .icr = MCFSIM_ICR1, .index = 12, .ack = 0, },
51 /*MCF_IRQ_TIMER2*/ { .icr = MCFSIM_ICR1, .index = 8, .ack = 0, },
52 /*MCF_IRQ_TIMER3*/ { .icr = MCFSIM_ICR1, .index = 4, .ack = 0, },
53 /*MCF_IRQ_TIMER4*/ { .icr = MCFSIM_ICR1, .index = 0, .ack = 0, },
[all …]
/arch/powerpc/kernel/
Dsmp-tbsync.c31 volatile int ack; member
57 tbsync->ack = 1; in smp_generic_take_timebase()
65 tbsync->ack = 0; in smp_generic_take_timebase()
95 while (tbsync->ack) in start_contest()
103 while (!tbsync->ack) in start_contest()
124 while (!tbsync->ack) in smp_generic_give_timebase()
165 while (tbsync->ack) in smp_generic_give_timebase()
/arch/powerpc/platforms/cell/
Dinterrupt.c109 unsigned long bits, ack; in iic_ioexc_cascade() local
117 ack = bits & IIC_ISR_EDGE_MASK; in iic_ioexc_cascade()
118 if (ack) in iic_ioexc_cascade()
119 out_be64(&node_iic->iic_is, ack); in iic_ioexc_cascade()
130 ack = bits & ~IIC_ISR_EDGE_MASK; in iic_ioexc_cascade()
131 if (ack) in iic_ioexc_cascade()
132 out_be64(&node_iic->iic_is, ack); in iic_ioexc_cascade()
/arch/powerpc/sysdev/
Dipic.c150 .ack = IPIC_SEPNR,
158 .ack = IPIC_SEPNR,
166 .ack = IPIC_SEPNR,
174 .ack = IPIC_SEPNR,
182 .ack = IPIC_SEPNR,
190 .ack = IPIC_SEPNR,
198 .ack = IPIC_SEPNR,
318 .ack = IPIC_SEPNR,
570 ipic_write(ipic->regs, ipic_info[src].ack, temp); in ipic_ack_irq()
593 ipic_write(ipic->regs, ipic_info[src].ack, temp); in ipic_mask_irq_and_ack()
[all …]
Dipic.h50 u8 ack; /* pending register offset from base if the irq member
/arch/cris/arch-v10/drivers/
Di2c.c270 int ack = 1; in i2c_getack() local
309 ack = 0; in i2c_getack()
311 if(!ack){ in i2c_getack()
313 ack = 1; in i2c_getack()
340 return ack; in i2c_getack()
/arch/powerpc/kvm/
Dbook3s_xive_template.c17 u16 ack; in GLUE() local
38 ack = be16_to_cpu(__x_readw(__x_tima + TM_SPC_ACK_OS_REG)); in GLUE()
46 if (!((ack >> 8) & TM_QW1_NSR_EO)) in GLUE()
50 cppr = ack & 0xff; in GLUE()
/arch/powerpc/platforms/powermac/
Dpic.c44 unsigned int ack; member
91 out_le32(&pmac_irq_hw[i]->ack, bit); in pmac_mask_and_ack_irq()
111 out_le32(&pmac_irq_hw[i]->ack, bit); in pmac_ack_irq()
112 (void)in_le32(&pmac_irq_hw[i]->ack); in pmac_ack_irq()
155 out_le32(&pmac_irq_hw[i]->ack, bit); in pmac_startup_irq()
Dlow_i2c.c246 u8 ack; in kw_i2c_handle_interrupt() local
265 ack = kw_read_reg(reg_status); in kw_i2c_handle_interrupt()
266 if (ack & KW_I2C_STAT_BUSY) in kw_i2c_handle_interrupt()
276 ack = kw_read_reg(reg_status); in kw_i2c_handle_interrupt()
281 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) { in kw_i2c_handle_interrupt()
312 ack = kw_read_reg(reg_status); in kw_i2c_handle_interrupt()
313 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) { in kw_i2c_handle_interrupt()
/arch/powerpc/sysdev/xive/
Dspapr.c470 u16 ack; in xive_spapr_update_pending() local
479 ack = be16_to_cpu(__raw_readw(xive_tima + TM_SPC_ACK_OS_REG)); in xive_spapr_update_pending()
488 cppr = ack & 0xff; in xive_spapr_update_pending()
489 nsr = ack >> 8; in xive_spapr_update_pending()
Dnative.c341 u16 ack; in xive_native_update_pending() local
344 ack = be16_to_cpu(__raw_readw(xive_tima + TM_SPC_ACK_HV_REG)); in xive_native_update_pending()
353 cppr = ack & 0xff; in xive_native_update_pending()
354 he = GETFIELD(TM_QW3_NSR_HE, (ack >> 8)); in xive_native_update_pending()
/arch/cris/arch-v32/mach-a3/
Darbiter.c534 reg_marb_foo_bp_rw_ack ack = {0}; in crisv32_foo_arbiter_irq() local
569 REG_WR(marb_foo_bp, watch->instance, rw_ack, ack); in crisv32_foo_arbiter_irq()
590 reg_marb_bar_bp_rw_ack ack = {0}; in crisv32_bar_arbiter_irq() local
625 REG_WR(marb_bar_bp, watch->instance, rw_ack, ack); in crisv32_bar_arbiter_irq()
/arch/cris/arch-v32/kernel/
Dtime.c211 reg_timer_rw_ack_intr ack = { .tmr0 = 1 }; in crisv32_timer_interrupt() local
219 REG_WR(timer, timer_base, rw_ack_intr, ack); in crisv32_timer_interrupt()
/arch/x86/events/intel/
Dknc.c208 static inline void knc_pmu_ack_status(u64 ack) in knc_pmu_ack_status() argument
210 wrmsrl(MSR_KNC_IA32_PERF_GLOBAL_OVF_CONTROL, ack); in knc_pmu_ack_status()
/arch/arm/mach-davinci/
Dirq.c66 ct->regs.ack = IRQ_REG0_OFFSET; in davinci_alloc_gc()
/arch/sparc/kernel/
Dleon_pci_grpci2.c505 int i, ack = 0; in grpci2_pci_flow_irq() local
514 ack = 1; in grpci2_pci_flow_irq()
525 ack = 1; in grpci2_pci_flow_irq()
535 ack = 1; in grpci2_pci_flow_irq()
543 if (ack) in grpci2_pci_flow_irq()
Dleon_pci_grpci1.c364 int i, ack = 0; in grpci1_pci_flow_irq() local
373 ack = 1; in grpci1_pci_flow_irq()
383 ack = 1; in grpci1_pci_flow_irq()
391 if (ack) in grpci1_pci_flow_irq()
/arch/cris/arch-v32/mach-fs/
Darbiter.c359 reg_marb_bp_rw_ack ack = { 0 }; in crisv32_arbiter_irq() local
396 REG_WR(marb_bp, watch->instance, rw_ack, ack); in crisv32_arbiter_irq()
/arch/mips/include/asm/sn/sn0/
Dhubio.h543 ack: 1, /* indicates data ack received */ member
591 ack: 1, /* indicates data ack received */ member
890 ack: 1, /* 17: Data ack received. */ member
/arch/arm/mach-omap2/
Dprm44xx.c47 .ack = OMAP4_PRM_IRQSTATUS_MPU_OFFSET,
225 i * 4, omap4_prcm_irq_setup.ack + i * 4); in omap44xx_prm_read_pending_irqs()
731 omap4_prcm_irq_setup.ack = AM43XX_PRM_IRQSTATUS_MPU_OFFSET; in omap44xx_prm_init()
Dprm_common.c339 ct->regs.ack = irq_setup->ack + i * 4; in omap_prcm_register_chain_handler()
Dprcm-common.h502 u16 ack; member
Dprm3xxx.c45 .ack = OMAP3_PRM_IRQSTATUS_MPU_OFFSET,
/arch/arm/mach-imx/
Davic.c130 ct->regs.ack = ct->regs.mask; in avic_init_gc()
/arch/mips/include/asm/octeon/
Dcvmx-pcsx-defs.h413 uint64_t ack:1; member
427 uint64_t ack:1;
887 uint64_t ack:1; member
899 uint64_t ack:1;

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