| /arch/arm64/kernel/ |
| D | reloc_test_syms.S | 25 adr x0, 0f
57 adr x0, sym64_rel
62 adr x1, 0f
70 adr x1, 0f
78 adr x1, 0f
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| D | efi-entry.S | 87 adr x0, entry
88 adr x1, entry_end
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| /arch/arm/mach-netx/ |
| D | xc.c | 83 static int xc_check_ptr(struct xc *x, unsigned long adr, unsigned int size) in xc_check_ptr() argument
85 if (adr >= NETX_PA_XMAC(x->no) && in xc_check_ptr()
86 adr + size < NETX_PA_XMAC(x->no) + XMAC_MEM_SIZE) in xc_check_ptr()
89 if (adr >= NETX_PA_XPEC(x->no) && in xc_check_ptr()
90 adr + size < NETX_PA_XPEC(x->no) + XPEC_MEM_SIZE) in xc_check_ptr()
100 unsigned int val, adr; in xc_patch() local
105 adr = *data++; in xc_patch()
107 if (xc_check_ptr(x, adr, 4) < 0) in xc_patch()
110 writel(val, (void __iomem *)io_p2v(adr)); in xc_patch()
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| /arch/mips/pci/ |
| D | ops-nile4.c | 21 u32 adr, mask, err; in nile4_pcibios_config_access() local
50 adr = in nile4_pcibios_config_access()
55 adr = KSEG1ADDR(PCI_WINDOW1) | (busnum << 16) | (devfn << 8) | in nile4_pcibios_config_access()
59 *(u32 *) adr = *val; in nile4_pcibios_config_access()
61 *val = *(u32 *) adr; in nile4_pcibios_config_access()
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| /arch/powerpc/include/asm/ |
| D | processor.h | 389 #define GET_FPEXC_CTL(tsk, adr) get_fpexc_mode((tsk), (adr)) argument
392 extern int get_fpexc_mode(struct task_struct *tsk, unsigned long adr);
395 #define GET_ENDIAN(tsk, adr) get_endian((tsk), (adr)) argument
398 extern int get_endian(struct task_struct *tsk, unsigned long adr);
401 #define GET_UNALIGN_CTL(tsk, adr) get_unalign_ctl((tsk), (adr)) argument
404 extern int get_unalign_ctl(struct task_struct *tsk, unsigned long adr);
|
| /arch/arm/mach-exynos/ |
| D | sleep.S | 65 adr r0, _cp15_save_power
68 adr r0, _cp15_save_diag
75 adr r0, 1f
96 adr r0, 1f
|
| /arch/m32r/include/asm/ |
| D | cacheflush.h | 23 #define flush_icache_user_range(vma,pg,adr,len) _flush_cache_copyback_all() argument
29 #define flush_icache_user_range(vma,pg,adr,len) smp_flush_cache_all() argument
44 #define flush_icache_user_range(vma,pg,adr,len) _flush_cache_all() argument
58 #define flush_icache_user_range(vma,pg,adr,len) do { } while (0) argument
|
| /arch/mips/include/asm/txx9/ |
| D | tx4927.h | 216 static inline void txx9_clear64(__u64 __iomem *adr, __u64 bits) in txx9_clear64() argument
222 ____raw_writeq(____raw_readq(adr) & ~bits, adr); in txx9_clear64()
227 static inline void txx9_set64(__u64 __iomem *adr, __u64 bits) in txx9_set64() argument
233 ____raw_writeq(____raw_readq(adr) | bits, adr); in txx9_set64()
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| /arch/ia64/sn/kernel/ |
| D | iomv.c | 75 volatile unsigned long *adr = pda->pio_write_status_addr; in __sn_mmiowb() local
78 while ((*adr & SH_PIO_WRITE_STATUS_PENDING_WRITE_COUNT_MASK) != val) in __sn_mmiowb()
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| D | io_acpi_init.c | 242 unsigned long long adr; in get_host_devfn() local
276 status = acpi_evaluate_integer(child, METHOD_NAME__ADR, NULL, &adr); in get_host_devfn()
285 slot = (adr >> 16) & 0xffff; in get_host_devfn()
286 function = adr & 0xffff; in get_host_devfn()
303 unsigned long long adr; in find_matching_device() local
313 &adr); in find_matching_device()
335 slot = (adr >> 16) & 0xffff; in find_matching_device()
336 function = adr & 0xffff; in find_matching_device()
|
| /arch/arm/kernel/ |
| D | head-common.S | 82 adr r3, __mmap_switched_data
153 adr r3, __lookup_processor_type_data
182 adr r0, str_lpae
194 adr r0, str_p1
198 adr r0, str_p2
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| D | hyp-stub.S | 45 adr \reg2, .L__boot_cpu_mode_offset
57 adr \reg2, .L__boot_cpu_mode_offset
129 W(adr) r7, __hyp_stub_vectors
|
| /arch/arm/mach-lpc32xx/ |
| D | suspend.S | 41 adr r0, tmp_stack_end
45 adr WORK1_REG, reg_bases
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| /arch/arm/mach-netx/include/mach/ |
| D | netx-regs.h | 169 #define PHY_CONTROL_PHY_ADDRESS(adr) ((adr) & 0xf) argument
252 #define MIIMU_REGADDR(adr) (((adr) & 0x1f) << 6) argument
253 #define MIIMU_PHYADDR(adr) (((adr) & 0x1f) << 11) argument
|
| /arch/unicore32/lib/ |
| D | backtrace.S | 40 adr r1, 1b
100 1006: adr r0, .Lbad
146 adr r0, .Lfp
152 adr r0, .Lcr
|
| /arch/mn10300/include/asm/ |
| D | cacheflush.h | 150 #define flush_icache_user_range(vma, pg, adr, len) \ argument
151 flush_icache_range(adr, adr + len)
|
| /arch/arm/lib/ |
| D | io-acorn.S | 30 adr r0, .Liosl_warning
|
| /arch/arm/vdso/ |
| D | datapage.S | 11 adr r0, .L_vdso_data_ptr
|
| /arch/tile/include/asm/ |
| D | processor.h | 236 #define GET_UNALIGN_CTL(tsk, adr) get_unalign_ctl((tsk), (adr)) argument
239 extern int get_unalign_ctl(struct task_struct *tsk, unsigned long adr);
|
| /arch/arm/mach-zx/ |
| D | headsmp.S | 17 adr r1, zx_secondary_startup_pa
|
| /arch/arm/mach-tegra/ |
| D | sleep-tegra20.S | 362 adr r2, tegra20_sdram_pad_address
363 adr r4, tegra20_sdram_pad_save
384 adr r4, tegra20_sclk_save
522 adr r2, tegra20_sdram_pad_address
523 adr r3, tegra20_sdram_pad_safe
524 adr r4, tegra20_sdram_pad_save
544 adr r2, tegra20_sclk_save
|
| /arch/arm/mach-socfpga/ |
| D | headsmp.S | 25 adr r0, 1f
|
| /arch/arm/mach-sti/ |
| D | headsmp.S | 27 adr r4, 1f
|
| /arch/arm/mach-prima2/ |
| D | headsmp.S | 20 adr r4, 1f
|
| /arch/arm/mach-imx/ |
| D | headsmp.S | 21 adr r0, diag_reg_offset
|