Searched refs:before (Results 1 – 25 of 104) sorted by relevance
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/arch/powerpc/lib/ |
D | rheap.c | 154 rh_block_t *before; in attach_free_block() local 168 before = NULL; in attach_free_block() 182 before = blk; in attach_free_block() 188 if (before != NULL && after != NULL) in attach_free_block() 193 if (before && s != (before->start + before->size)) in attach_free_block() 194 before = NULL; in attach_free_block() 200 if (before == NULL && after == NULL) { in attach_free_block() 214 if (before != NULL && after == NULL) { in attach_free_block() 215 before->size += size; in attach_free_block() 220 if (before == NULL && after != NULL) { in attach_free_block() [all …]
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/arch/unicore32/ |
D | Kconfig.debug | 12 early before the console code is initialized. For normal operation 24 executes before the console is initialized.
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/arch/m68k/hp300/ |
D | README.hp300 | 12 The LANCE driver works after a fashion but only if you reset the chip before
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/arch/nios2/ |
D | Kconfig.debug | 25 early before the console code is initialized.
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/arch/arm/boot/compressed/ |
D | head-xscale.S | 19 @ whatever state it is, before it is turned off.
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/arch/arm/lib/ |
D | csumpartial.S | 25 td1 .req r4 @ save before use 26 td2 .req r5 @ save before use
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/arch/cris/boot/compressed/ |
D | head_v10.S | 28 ;; We need to initialze DRAM registers before we start using the DRAM 60 ;; before unpacking). It is at _edata, but in flash.
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/arch/tile/ |
D | Kconfig.debug | 13 early before the console code is initialized. For normal operation
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/arch/um/ |
D | Kconfig.debug | 40 early before the console code is initialized.
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/arch/m68k/fpsp040/ |
D | x_unfl.S | 64 | Clear dirty bit on dest resister in the frame before branching 98 | Clear dirty bit on dest resister in the frame before branching 119 | Clear dirty bit on dest resister in the frame before branching
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D | skeleton.S | 9 | before the jump instruction. If there no handling necessary, then 14 | the machine state will be identical to the state before 90 | swapped out before taking the exception, the exception taken on 148 | Clear dirty bit on dest resister in the frame before branching
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D | x_unimp.S | 56 | exception byte and condition codes are clear before proceeding
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D | binstr.S | 15 | The 64-bit binary is assumed to have a decimal point before 84 movel %d2,%d4 |copy the fraction before muls
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/arch/cris/ |
D | Kconfig.debug | 24 didn't before). The kernel halts when it boots, waiting for gdb if
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/arch/ia64/hp/sim/boot/ |
D | bootloader.lds | 21 can access them all, and initialized data all before uninitialized, so
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/arch/m68k/ |
D | Kconfig.debug | 26 early, i.e. before the normal console driver is loaded.
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/arch/arm/common/ |
D | vlock.S | 68 @ Control dependency implies strb not observable before previous ldrb.
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D | mcpm_head.S | 120 @ Control dependency implies strb not observable before previous ldrb. 142 @ If the outbound gave up before teardown started, skip cluster setup:
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/arch/mn10300/mm/ |
D | Kconfig.cache | 13 the affected cacheline to be read into the cache first before being 96 Set if we need the dcache flushing before the icache is invalidated.
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/arch/arm/nwfpe/ |
D | fpa11.inl | 42 /* clear SB, AB and DA bits before returning FPCR */
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/arch/arc/kernel/ |
D | entry-compact.S | 159 ; -L2 interrupts L1 (before L1 ISR could run) 236 ; icause1 needs to be read early, before calling tracing, which 364 ; things to what they were, before returning from L2 context
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/arch/m32r/kernel/ |
D | entry.S | 222 # perform work that needs to be done immediately before resumption
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/arch/x86/ |
D | Kconfig.debug | 28 early before the console code is initialized. For normal operation 41 early before the console code is initialized. For normal operation 54 early before the console code is initialized. 64 machine crashes very early before the regular console code is 96 Enable this if you want to dump the EFI page table before
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/arch/metag/lib/ |
D | memcpy.S | 83 ! Adjust the source pointer (A1.2) to the 8 byte boundary before its 115 ! Move data 4 bytes before we enter the main loop
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/arch/arm/mach-sa1100/ |
D | sleep.S | 50 @ Adjust memory timing before lowering CPU clock
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