/arch/sh/kernel/ |
D | process_64.c | 43 unsigned long long ah, al, bh, bl, ch, cl; in show_regs() local 50 bh = (regs->regs[18]) >> 32; in show_regs() 55 ah, al, bh, bl, ch, cl); in show_regs() 59 asm volatile ("getcon " __TEA ", %0" : "=r" (bh)); in show_regs() 61 bh = (bh) >> 32; in show_regs() 68 ah, al, bh, bl, ch, cl); in show_regs() 72 bh = (regs->regs[1]) >> 32; in show_regs() 77 ah, al, bh, bl, ch, cl); in show_regs() 81 bh = (regs->regs[4]) >> 32; in show_regs() 86 ah, al, bh, bl, ch, cl); in show_regs() [all …]
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/arch/powerpc/include/asm/ |
D | sfp-machine.h | 216 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \ argument 218 if (__builtin_constant_p (bh) && (bh) == 0) \ 221 else if (__builtin_constant_p (bh) && (bh) == ~(USItype) 0) \ 227 : "%r" (ah), "r" (bh), "%r" (al), "rI" (bl)); \ 239 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \ argument 243 : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\ 246 : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\ 247 else if (__builtin_constant_p (bh) && (bh) == 0) \ 250 else if (__builtin_constant_p (bh) && (bh) == ~(USItype) 0) \ 256 : "r" (ah), "r" (bh), "rI" (al), "r" (bl)); \
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/arch/alpha/math-emu/ |
D | sfp-util.h | 8 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \ argument 9 ((sl) = (al) + (bl), (sh) = (ah) + (bh) + ((sl) < (al))) 11 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \ argument 12 ((sl) = (al) - (bl), (sh) = (ah) - (bh) - ((al) < (bl)))
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/arch/sparc/math-emu/ |
D | sfp-util_32.h | 7 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \ argument 13 "rI" ((USItype)(bh)), \ 17 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \ argument 23 "rI" ((USItype)(bh)), \
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D | sfp-util_64.h | 15 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \ argument 24 "r" ((UDItype)(bh)), \ 29 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \ argument 38 "r" ((UDItype)(bh)), \
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/arch/sh/math-emu/ |
D | sfp-util.h | 6 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \ argument 10 (sh) = (ah) + (bh) + (__x < (al)); \ 14 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \ argument 18 (sh) = (ah) - (bh) - (__x > (al)); \
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/arch/x86/crypto/ |
D | blowfish-x86_64-asm_64.S | 55 #define RX1bh %bh 199 movzbl x ## bh, RT1d; \ 202 movzbl x ## bh, RT0d; \
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D | cast6-avx-x86_64-asm_64.S | 90 #define RGI4bh %bh 101 movzbl src ## bh, RID1d; \ 106 movzbl src ## bh, RID1d; \
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D | twofish-avx-x86_64-asm_64.S | 96 #define RGI4bh %bh 108 movzbl src ## bh, RID2d; \ 114 movzbl src ## bh, RID2d; \
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D | twofish-x86_64-asm_64-3way.S | 51 #define RAB1bh %bh 94 movzbl ab ## bh, tmp1 ## d; \
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D | cast5-avx-x86_64-asm_64.S | 90 #define RGI4bh %bh 101 movzbl src ## bh, RID1d; \ 106 movzbl src ## bh, RID1d; \
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D | camellia-x86_64-asm_64.S | 74 #define RAB1bh %bh 96 movzbl ab ## bh, tmp1 ## d; \
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D | aes-x86_64-asm_64.S | 29 #define R2H %bh
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D | aes-i586-asm_32.S | 66 #define ebxh bh
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D | twofish-x86_64-asm_64.S | 50 #define R1H %bh
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D | twofish-i586-asm_32.S | 54 #define R1H %bh
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D | des3_ede-asm_64.S | 63 #define RW1bh %bh
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/arch/x86/math-emu/ |
D | wm_shrx.S | 141 setne %bh 183 setne %bh
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/arch/x86/boot/ |
D | video-vesa.c | 172 ireg.bh = 0x08; in vesa_dac_set_8bits() 175 dac_size = oreg.bh; in vesa_dac_set_8bits()
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D | video.c | 54 boot_params.screen_info.orig_video_page = oreg.bh; in store_video_mode()
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D | boot.h | 264 u8 bl, bh, ebx2, ebx3; member
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